JPH11214447A - Mounting structure for semiconductor device and mounting method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To relax thermal stresses concentrating on solder bumps and to thereby prevent break of the solder bumps due to thermal fatigue, by providing a mounting board and solder bumps to be mounted on electrodes of the mounting board having the solder bumps with uniform voids. SOLUTION: A wet back step is performed by setting a wet back melting temperature to a temperature lower than the melting point +20 deg.C and higher than the melting point +10 deg.C of solder. Countless voids 14 are uniformly formed within a molten solder bump 15. Let us think about the case where a thermal load is applied to a semiconductor device 11 to thereby produce a thermal stress at the bump 15. A gas is present within each void 14, and if it is assumed, e.g. that air is present within each void, the modulus of elasticity of each void is 0.33 MPa, which is a value negligible compared with that of the solder. It means that the voids 14 have formed free surfaces at all the parts of the bump 15, and thus any displacements within the bump 15 are absorbed by the voids 14. As a result, the capability of relaxing produced thermal stresses is increased, and thus the life of the solder bump against thermal fatigue can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure of a semiconductor device in which solder bumps are used for connection terminals and a mounting method thereof.

[0002]

2. Description of the Related Art Conventionally, there have been the following semiconductor devices in which solder bumps are used for connection terminals. FIGS. 3 and 4 are cross-sectional views of a solder bump portion of such a conventional semiconductor device. As shown in FIG. 3, when the solder bump 5 of the semiconductor device 1 itself is melted and connected to the mounting substrate 3, or as shown in FIG. 7 may be connected by melting, and the inside of the bump is commonly filled with metal.

[0003]

However, the conventional structure described above has the following problems. When a thermal load is applied after connecting the semiconductor device 1 with the solder bumps 5, 6, and 7 on the mounting substrate 3, a thermal stress is generated due to a difference in thermal expansion coefficient between the semiconductor device 1 and the mounting substrate 3.
At this time, most of the thermal stress is alleviated by the filling resin 2, but the thermal stress that cannot be alleviated by the filling resin 2 concentrates on the solder bumps 5, 6, and 7 to generate distortion. If this thermal load is repeated several times, strain accumulates, and the solder bumps 5, 6, and 7 eventually break due to thermal fatigue failure.

The present invention provides a mounting structure of a semiconductor device and a mounting method thereof, which can eliminate the above-mentioned problems, reduce thermal stress concentrated on solder bumps, and prevent thermal fatigue damage of solder bumps. The purpose is to:

[0005]

In order to achieve the above object, the present invention provides: [1] In a mounting structure of a semiconductor device having a solder bump, a mounting substrate and an electrode mounted on an electrode of the mounting substrate are provided. Thus, a semiconductor device having solder bumps having voids is provided.

[2] In a mounting structure of a semiconductor device having solder bumps, a mounting board, a bump serving as an electrode of a high melting point solder accurately mounted on an electrode of the mounting board, and a low melting point connection solder having a void Are provided. [3] In the method of mounting a semiconductor device having solder bumps, when forming a solder electrode on a semiconductor device mounted on an electrode of a mounting substrate, the melting temperature of wet back is set to the melting point +
The semiconductor device is mounted on the mounting substrate by forming a void uniformly in the bump at a temperature of 20 ° C. or less and 10 ° C. or more, and relaxing the thermal stress by the void in the bump when thermal stress is applied. It is something to do.

[4] In the method of mounting a semiconductor device having solder bumps, a high melting point solder electrode is formed on a semiconductor device mounted on an electrode of a mounting board, and a low melting point connection solder is formed on the mounting board electrode. When applying, when mounting the semiconductor device on the mounting board, the positions of the electrodes of the mounting board and the bumps serving as the electrodes of the high melting point solder are accurately aligned,
A void is formed in the low melting point connection solder.

[0008]

Embodiments of the present invention will be described below in detail. FIG. 1 is a sectional view showing a mounting structure of a semiconductor device according to a first embodiment of the present invention. In this figure,
11 is a semiconductor device, 12 is a filling resin, 13 is a mounting board,
14 is a void and 15 is a solder bump.

First, solder bumps 15 are formed on the electrodes of the semiconductor device 11 by plating with a material such as a tin-lead alloy.
As a forming method, for example, there is a method of forming by electroplating in the order of tin and lead using Ni on the electrode as an anode. After plating, an operation of melting the solder material and shaping the shape (hereinafter, referred to as wet back) is performed. Normally, at the time of wet back, a temperature around the melting point of the solder material + 40 ° C. is applied. In this case, a temperature of + 20 ° C. or less + 10 ° C. or more is applied. For example, in the case of 95: 5 = Pb: Sn, the melting point is 314 ° C., so that the normal wet back temperature is around 355 ° C., and the temperature is set to 324 to 330 ° C. In the case of 63: 37 = Pb: Sn, the melting point is Is 183 ° C
Therefore, the process is performed at 193 to 203 ° C. where the normal wet back temperature is around 220 ° C.

When wet back is performed by this method, countless voids 14 are formed in the solder bumps 15 after melting. The voids 14 are uniformly present in the solder bumps 15.
With this configuration, when a thermal load is applied to the semiconductor device 11 and a thermal stress is generated in the solder bump 15, when the void 14 exists in the solder bump 15 to which the thermal stress is applied, Since the inside is a gas, for example,
When the content is considered to be air, the elastic modulus is 0.33 MPa, which is negligible compared to the elastic modulus of the solder material. The void 14 has created a free surface everywhere in the solder bump 15, and any displacement in the solder bump 15 is absorbed by the void 14. That is, it has the same properties as the sponge, and the stress absorption coefficient increases. The apparent modulus of elasticity is reduced, and its own deformability is also improved.

As described above, according to the first embodiment, the ability to alleviate the generated thermal stress is increased, so that the fatigue life can be improved as compared with a normal solder bump.
In addition, a micro X-ray inspection machine (for example, manufactured by Media X Tech) is used for the measurement of voids. Using this inspection machine, the X-ray photograph of the bump is shaded, the proportion of the voids is detected from the binarized photograph, and finally the area is determined. More specifically, the bump is transmitted by X-rays from immediately above the wafer using the inspection device. If there is a void, the area looks whiter than the black area where the surrounding solder is clogged, so the volume of the void in the bump is calculated by integrating the area of the area and the degree of shading. , The amount of voids can be measured.

Next, a second embodiment of the present invention will be described. FIG. 2 is a sectional view showing a mounting structure of a semiconductor device according to a second embodiment of the present invention. In this figure, 21 is a semiconductor device, 22 is a filling resin, 23 is a mounting board, 24 is a high melting point solder bump, 25 is a low melting point solder bump, 26 is a void, 2
Reference numeral 7 denotes an electrode of the mounting board.

In this embodiment, a low melting point solder 25 such as a tin-lead eutectic alloy is formed in advance on an electrode 27 of a mounting substrate 23, and a semiconductor device 2 having a high melting point solder bump 24 is formed thereon.
1 is implemented. When the high melting point solder bump 24 is connected to the electrode 27 on which the low melting point solder bump 25 is formed in advance, the generation of the void 26 can be suppressed by displacing the high melting point solder bump 24 from the electrode 27 by about 1/3. There is a report. Therefore, if the high melting point solder bumps 24 are accurately mounted on the electrodes 27, voids 26 will be generated in the low melting point solder 25 to be melted.

With this configuration, the semiconductor device 21
When a thermal load is applied to the solder bumps 24 and 25 to generate a thermal stress, the low melting point solder bump 2 to which the thermal stress is applied is applied.
Since the void 26 is present in the space 5, the void 26 is a gas. For example, when the content is air, the elastic modulus is 0.33 MPa, which is negligible compared to the elastic modulus of the solder material. It is.

The void 26 forms a free surface everywhere in the low melting point solder bump 25, and any displacement in the solder bump is absorbed by the void 26. That is, it has the same properties as the sponge, and the stress absorption coefficient increases. The apparent elastic modulus is reduced, and the deformability of the device itself is improved. As described above, according to the second embodiment, the ability to alleviate the generated thermal stress is increased, so that the thermal fatigue life can be improved as compared with a normal solder bump.

It should be noted that the present invention is not limited to the above embodiment, and various modifications can be made based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

[0017]

As described above, according to the present invention, the following effects can be obtained. (1) According to the first or third aspect of the present invention, since voids are generated in the solder bumps, the ability to alleviate the generated thermal stress is increased, so that the thermal fatigue life is longer than that of ordinary solder bumps. Can be improved. (2) According to the second or fourth aspect of the invention, the high-melting-point solder bumps are accurately positioned on the electrodes of the mounting board, and voids are generated in the low-melting-point connection solder bumps, thereby reducing the generated thermal stress. Therefore, the thermal fatigue life can be improved as compared with ordinary solder bumps.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a mounting structure of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a mounting structure of a semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a mounting structure of a conventional first semiconductor device.

FIG. 4 is a sectional view showing a mounting structure of a conventional second semiconductor device.

[Explanation of symbols]

 11, 21 Semiconductor device 12, 22 Filling resin 13, 23 Mounting board 14, 26 Void 15 Solder bump 24 High melting point solder bump 25 Low melting point solder bump 27 Electrode of mounting board

Claims (4)

[Claims] 1. A mounting structure of a semiconductor device having a solder bump, comprising: (a) a mounting substrate; and (b) a semiconductor device having a solder bump having a uniform void mounted on an electrode of the mounting substrate. Semiconductor device mounting structure. 2. A mounting structure for a semiconductor device having solder bumps, comprising: (a) a mounting board; (b) a bump serving as an electrode of a high melting point solder that is accurately mounted on an electrode of the mounting board; A) mounting structure of a semiconductor device having solder bumps, comprising: a low-melting connection solder having voids; 3. A method of mounting a semiconductor device having solder bumps, wherein (a) when forming a solder electrode on a semiconductor device mounted on an electrode of a mounting substrate, the melting temperature of wet back is set to a melting point + 20 ° C. or less. C. or higher to uniformly form voids in the bumps, and (b) mounting the semiconductor device on the mounting substrate by relaxing the thermal stress by the voids in the bumps when thermal stress is applied. A method for mounting a semiconductor device having solder bumps, the method comprising: 4. A method of mounting a semiconductor device having solder bumps, comprising: (a) forming a high-melting-point solder electrode on a semiconductor device mounted on an electrode of a mounting board; (B) when mounting the semiconductor device on the mounting board, precisely aligning the bumps serving as the electrodes of the high melting point solder with the electrodes of the mounting board; A method of mounting a semiconductor device, wherein a void is formed in a semiconductor device.