JP3671999B2 - Semiconductor device, manufacturing method thereof, and semiconductor mounting apparatus - Google Patents

Semiconductor device, manufacturing method thereof, and semiconductor mounting apparatus Download PDF

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Publication number
JP3671999B2
JP3671999B2 JP06436898A JP6436898A JP3671999B2 JP 3671999 B2 JP3671999 B2 JP 3671999B2 JP 06436898 A JP06436898 A JP 06436898A JP 6436898 A JP6436898 A JP 6436898A JP 3671999 B2 JP3671999 B2 JP 3671999B2
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protruding electrode
electrode
semiconductor device
electrode portion
protruding
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JPH11251472A (en
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和彦 阿部
幸一 岡
聡文 木村
克己 手塚
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Fujifilm Business Innovation Corp
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Fuji Xerox Co Ltd
Fujifilm Business Innovation Corp
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps

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  • Wire Bonding (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、半導体装置およびその製造方法ならびに半導体実装装置に係り、特に、インターポーザ基板の一方の主面に半導体素子が搭載され、他方の主面に突起電極が形成された半導体装置およびその製造方法、ならびに回路基板上に前記半導体装置が突起電極を介して実装された半導体実装装置に関する。
【0002】
【従来の技術】
電子機器の高集積化に伴って様々な半導体装置が提案されているが、その中でも、BGA(ボール・グリッド・アレイ)あるいはLGA(ランド・グリッド・アレイ)と称される半導体装置が注目されている。
【0003】
これらの半導体装置では、インターポーザ(あるいはチップ・キャリア)基板の表面に半導体素子が搭載され、外部接続用電極パッドが裏面に形成されることから、従来の半導体装置であるQFP(クワッド・フラット・パッケージ)と比較した場合、そのサイズを大幅に縮小できるという利点がある。さらに、外部接続用電極パッドのピッチも、QFPの0.3〜0.5mmに対して1.27〜1.5mmと広くできるため、回路基板への実装が容易になるという利点もある。
【0004】
図7は、従来の一般的なBGAの実装状態における構成を示した断面図であり、図8は、その一部分を拡大した断面図である。BGA10は、インターポーザ基板2の表面に半導体素子1を搭載して構成され、BGA10が実装される回路基板3と前記インターポーザ基板2とは、インターポーザ基板2の裏面に予め形成された突起電極4を介して、電気的および機械的に接続される。インターポーザ基板2と突起電極4とは、インターポーザ基板2の裏面に形成された電極パッド5を介して接続され、回路基板3と突起電極4とは、回路基板3の表面に形成された電極パッド6を介して接続される。
【0005】
BGA10に関しては、その使用目的や要求性能によって多くのパッケージ構造が提案されている。その中でも、高発熱半導体素子に対応しなけれならないBGAや、インターポーザ基板2に高密度・高精細配線が要求されるBGAでは、インターポーザ基板2としてアルミナセラミックス等のセラミックス基板を用いることが提案されている。しかしながら、アルミナセラミックス等からなるインターポーザ基板2では、その熱膨張係数が6〜7ppm/℃程度であるのに対して、BGA10が実装される回路基板3は一般的にガラスエポキシから構成され、その熱膨張係数は15〜20ppm/℃程度である。
【0006】
このように両者の熱膨張係数が大きく異なると、BGA10を回路基板3に搭載した半導体実装装置では、半導体素子1の動作時に発生する熱により両者の熱膨張係数の差に起因した大きな熱応力が発生する。この熱応力は、BGA10と回路基板3との間の突起電極4に集中し、最悪の場合は突起電極4の接合部およびその近傍に疲労破壊が生じる。
【0007】
一般的に、熱膨張係数の差に起因する応力は、BGA10および回路基板3と突起電極4との接合界面付近の外周部分に集中するため、疲労破壊もこの部分から生じることが多い。
【0008】
このような問題点を解決するためには、例えば特開平8−316628号公報では、突起電極4を鼓状に形成して変形し易くすることで接合界面付近の応力を緩和する方法が提案されている。また、Sn5−Pb95やSnl−Pb97.5−Agl.5のような高融点はんだ(融点300℃以上)が耐熱疲労性に優れることに着目すれば、突起電極4を高融点のはんだ金属で形成することも考えられる。
【0009】
【発明が解決しようとする課題】
上記したように、▲1▼突起電極4を鼓状に形成すること、▲2▼突起電極4を高融点のはんだ金属で形成すること、が疲労破壊を防止する上で効果的であることから、鼓状の突起電極4を高融点のはんだ金属で形成すれば、疲労破壊に対する耐力が飛躍的に向上するものと期待できる。しかしながら、突起電極4はBGAを回路基板3へはんだ付けする際に溶融する必要があるために、突起電極4には、熱疲労特性に優れる高融点はんだを使用することができないという問題があった。
【0010】
なお、特開平8−222573号公報では、高融点はんだと低融点はんだとを組み合わせた突起電極について開示しているが、加熱後は突起電極形状が球形となるために応力を十分に緩和することができない。また、特開平9−205096号公報では、高融点はんだで形成した円柱状突起電極の特定部分に低融点はんだの突起電極を形成する方法が示されているが、はんだ付け品質を良くするためにフラックスを使用して低融点はんだの突起電極を溶融すると、突起電極の側面にまで低融点はんだが流れてしまい、突起電極が球形状となってしまうという問題があった。
【0011】
本発明の目的は、上記した従来技術の問題点を解決し、突起電極の接合部およびその近傍の疲労寿命や接合強度が大幅に向上した半導体装置およびその製造方法ならびに半導体実装装置を提供することにある。
【0012】
【課題を解決するための手段】
上記した目的を達成するために、本発明では以下のような手段を講じた。
【0013】
(1) 絶縁性基板の一方の主面に搭載された半導体素子と他方の主面に形成された電極パッドとが電気的に接続され、前記電極パッド上に突起電極が形成された半導体装置において、前記突起電極を、前記電極パッド上に形成された第1の突起電極部と、前記第1の突起電極部の先端に、これよりも低融点の金属材料で形成された第2の突起電極部とによって構成し、その先端と前記電極パッド側の端部との間にくびれ部を有する略鼓状とし、記絶縁性基板の他方の主面には、前記第1の突起電極部の少なくとも一部が覆われるように絶縁膜を形成した。
【0014】
(2) 絶縁性基板の一方の主面に搭載された半導体素子と他方の主面に形成された電極パッドとが電気的に接続され、前記電極パッド上に突起電極が形成された半導体装置の製造方法において、絶縁性基板の他方の主面に絶縁膜を形成する工程と、前記電極パッドが露出するように、前記絶縁膜の表面側が狭まった逆テーパ孔を開口する工程と、前記逆テーパ孔に金属材料を充填して第1の突起電極部を形成する工程と、前記第1の突起電極部上に、これよりも低融点の金属材料で第2の突起電極部を形成する工程とを設けた。
【0015】
(3) 絶縁性基板の一方の主面に半導体素子が搭載され、他方の主面の第1の電極パッド上に突起電極が形成された半導体装置を、表面に第2の電極パッドが形成された回路基板上に、前記突起電極と第2の電極パッドとが接合されるように実装してなる半導体実装装置において、前記突起電極を、前記第1の電極パッド上に形成された第1の突起電極部と、前記第1の突起電極部の先端に、これよりも低融点の金属材料で形成された第2の突起電極部とによって構成し、その先端と前記第1の電極パッド側の端部との間にくびれ部を有する略鼓状とし、前記絶縁性基板の他方の主面には、前記第1の突起電極部の少なくとも一部が覆われるように絶縁膜を形成した。
【0016】
上記した構成(1) によれば、突起電極は、その先端のみが低融点金属で形成され、当該先端と電極パッド側との間には、耐熱疲労性に優れた高融点金属によるくびれ部が形成された鼓形状となる。
【0017】
上記した構成(2) によれば、先端のみが低融点金属で形成され、当該先端と電極パッド側との間に、耐熱疲労性に優れた高融点金属によるくびれ部を有する略鼓状の突起電極が形成される。
【0018】
上記した構成(3) によれば、一方の主面に半導体素子が搭載された半導体装置が突起電極を介して回路基板上に実装された半導体実装装置において、その突起電極を、その先端のみが低融点金属で形成され、耐熱疲労性に優れた高融点金属によるくびれ部を当該先端と電極パッド側との間に有する鼓形状にすることができる。
【0019】
【発明の実施の形態】
以下、図面を参照して本発明を詳細に説明する。図1は、本発明の第1実施形態である半導体装置(BGA)およびその突起電極の形成方法を示した断面図であり、前記と同一の符号は同一または同等部分を表している。
【0020】
本実施形態では、インターポーザ基板2としてアルミナセラミック製の基板を利用し、はじめに、タングステン、モリブデン等の高融点金属によって電極パッド5が形成された主面に感光性のレジスト層7を形成する[同図(a) ]。前記レジスト層7は、その後の接合工程における熱に耐え得る十分な耐熱性を有している。なお、電極パッド5の表面には、はんだ付け性を向上させる目的でNi,Au等のバリアメタル層(図示せず)を形成しても良い。
【0021】
次いで、フォトマスク10を用いた周知の露光・現像工程により、電極パッド5上の不要なレジスト7を除去する[同図(b) ]。この時、露光工程おいて意図的にフォーカスをずらし(具体的には、合焦点位置をレジスト7の表面よりも光源側にずらす)、露光光の回折散乱を発生させることにより、レジスト層7の断面形状を、その表面側が狭くなるような逆テーパ状にする[同図(c) ]。
【0022】
次いで、耐熱疲労特性に優れた高融点はんだSn5−Pb95(融点約310℃)による第1の突起電極部8を、例えば電解めっきにより電極パッド5上に形成する[同図(d) ]。前記レジスト層7内での第1の突起電極部8は、当該電極パッド5から鉛直方向へ離れるにしたがって細くなる円錐形状もしくは角錐形状となる。
【0023】
次いで、前記第1の突起電極部8上に、クリーム状またはプリフォーム状の低融点はんだSn63−Pb37(融点183℃)を、例えばスクリーン印刷またはデイスペンサにより所定量だけ供給[同図(e) ]した後、全体を前記第1の突起電極部8の融点を超えない温度で加熱することにより、第2の突起電極部9を略球状に形成する[同図(f) ]。この結果、インターポーザ基板2の一方の主面には、回路基板に接合される側の先端のみが低融点金属で形成され、当該先端と電極パッド5側との間に、高融点金属によるくびれ部を有する略鼓状の突起電極30が形成される。
【0024】
また、本実施形態によれば、第1の突起電極部8の側面の一部あるいは全体が、第2の突起電極部9を形成する際に与えられる温度領域において耐熱性を有する絶縁膜7で被覆されているので、第2の突起電極部9を形成する低融点はんだが第1の突起電極部8側へ流れて球形状となることが防止される。
【0025】
図2は、本発明の第2実施形態である半導体装置(BGA)およびその突起電極の形成方法を示した断面図であり、前記と同一の符号は同一または同等部分を表している。
【0026】
本実施形態では、はじめに電極パッド5が形成されたインターポーザ基板2の主面に感光性のレジスト層7aを薄く形成する[同図(a) ]。次いで、フォトマスク10aを用いた周知の露光・現像工程により、電極パッド5上の不要なレジストを除去する[同図 (b),(c)]。次いで、再び全面にレジスト層7bを形成した後、前記フォトマスク10aに設けた開口よりも小さい開口を有するフォトマスク10bを用いて前記と同様に、電極パッド5上の不要なレジストを除去する[同図(d),(e) ]。
【0027】
さらに、再び全面にレジスト層7cを形成した後、前記フォトマスク10bに設けた開口よりも小さい開口を有するフォトマスク10cを用いて前記と同様に電極パッド5上の不要なレジストを除去する[同図(d),(e) ]。以下同様に、所望の厚さのレジスト7が形成されるまで上記した処理を繰り返して逆テーパ状の孔を開設する。その後は、前記第1実施形態と同様にして第1および第2の電極部8、9を形成して鼓状の突起電極30を完成する。
【0028】
図3は、本発明の第3実施形態である半導体装置(BGA)およびその突起電極の形成方法を示した断面図であり、前記と同一の符号は同一または同等部分を表している。
【0029】
本実施形態では、はじめに、電極パッド5が形成されたインターポーザ基板2の主面に感光性のレジスト層7を形成する[同図(a) ]。次いで、フォトマスク10を用いた周知の露光・現像工程により、電極パッド5上の不要なレジスト7を除去する[同図(b) ]。この時、露光工程おいて意図的にフォーカスをずらして光の回折散乱を発生させることにより、レジスト層7の断面形状を、その表面側が狭くなるような逆テーパ状にする[同図(c) ]。
【0030】
次いで、電極パッド5上に高融点はんだSn5−Pb95による第1の突起電極部8aを、例えば電解めっきにより形成する[同図(d) ]。このとき、上記した第1および第2実施形態では、高融点はんだがレジスト層7の開口部から盛り上がるように形成したが、本実施形態では、高融点はんだがレジスト層7の開口部外へ露出しないように、前記めっき時間を短くする。
【0031】
次いで、前記第1の突起電極部8a上に、クリーム状またはプリフォーム状の低融点はんだSn63−Pb37を、例えばスクリーン印刷またはデイスペンサにより所定量だけ供給[同図(e) ]した後、全体を前記第1の突起電極部8aの融点を超えない温度で加熱することにより、第2の突起電極部9aを略球状に形成する[同図(f) ]。この結果、インターポーザ基板2の一方の主面には、回路基板3に接合される側の先端が低融点半田で形成され、当該先端と電極パッド5側との間にくびれ部を有する略鼓状の突起電極30が形成される。
【0032】
前記第1および第2実施形態のように、第1の突起電極部8をレジスト層7よりも厚く形成すると、レジスト層7からはみ出した部分がマッシュルーム状となり、その形状がめっき条件の変動によって大きく変化してしまう。これに対して、本実施形態のように、第1の突起電極部8aをレジスト層7よりも薄く形成すれば、その形状を比較的容易にコントロールすることができる。
【0033】
なお、上記した各実施形態では、第1の突起電極部8、8aの側面を覆うように、レジスト層7をインターポーザ基板2の全面に被着するものとして説明したが、図6に示したように、各第1の突起電極部8,8aの周囲のみが覆われるように、機械的研磨やレーザー照射などの物理的方法あるいはエッチングなどの化学的方法によって不要部分を除去することで島状に形成しても良い。
【0034】
このような構造とすることにより、熱膨張係数差による応力が加わった時に、レジスト層7が第1の突起電極部8、8aを水平方向に固定する力が弱まって突起電極30の柔軟性が向上するので、応力緩和効果がさらに向上する。また、上記した構成によれば、比較的柔軟性に劣る絶縁材料をレジスト7として使用することが可能になる。
【0035】
図4は、上記した各半導体装置(BGA)が突起電極30を介して実装された半導体実装装置の拡大断面図であり、前記と同一の符号は同一または同等部分を表している。ここでは、前記図3に関して説明した第3実施形態のBGAが搭載された半導体実装装置を例して説明する。
【0036】
本実施形態では、回路基板3側の電極パッド6上に、前記突起電極30の第2の突起電極部9aが接合されている。前記電極パッド6の面積は、少なくとも前記突起電極30のくびれ部での断面積よりも小さくないようにすることが望ましい。このような構成によれば、電極パッド6と第2の突起電極部9aとの角度θが、少なくとも極端な鋭角とならないので、疲労寿命や接合強度が大幅に向上する。
【0037】
これに対して、図5に示したように、電極パッド6の面積を小さくすると、前記角度θが極端な鋭角を示すので、電極パッド6と突起電極30との接合部における疲労寿命や強度を向上させることが難しくなる。
【0038】
なお、上記した各実施形態では、セラミックス基板で構成されるBGAを用いて説明したが、本発明はこれのみに限定されるものではなく、突起電極を利用して回路基板に実装される。例えばフリップチップ構造の半導体装置にも同様に適用することができる。
【0039】
さらに、上記した各実施形態では第1の突起電極の電極材としてSn5−Pb95はんだを採用し、第2の突起電極の電極材としてSn63−Pb37はんだを採用したが、第1の突起電極としては、Au,Cu,Ni等の融点が300℃以上ではんだ付けが可能な金属単体あるいは合金を採用することができる。同様に、第2の突起電極としては、SnおよびPb以外にIn、Bi等を添加した金属材料を用いても良い。
【0040】
【発明の効果】
本発明によれば、以下のような効果が達成される。
(1) 突起電極を、その主要部が疲労破壊に対する耐力に優れた高融点材料で形成された鼓状にすることができるので、突起電極の疲労寿命や接合強度が大幅に向上する。
(2) 突起電極の側面を柔軟性を有する樹脂材料で覆うようにしたので、突起電極の水平方向に関する柔軟性が向上する。
(3) 突起電極が接合される回路基板側の電極パッドの面積を、少なくとも鼓状突起電極のくびれ部での断面積よりも大きくし、接合面の角度が極端な鋭角とならないようにしたので、突起電極と回路基板との接合面における疲労寿命や接合強度が大幅に向上する。
【図面の簡単な説明】
【図1】本発明の第1実施形態である半導体装置およびその突起電極の形成方法を示した断面図である。
【図2】本発明の第2実施形態である半導体装置およびその突起電極の形成方法を示した断面図である。
【図3】本発明の第3実施形態である半導体装置およびその突起電極の形成方法を示した断面図である。
【図4】本発明の第4実施形態である半導体実装装置の主要部の断面図である。
【図5】本発明の第4実施形態である半導体実装装置の主要部の断面図である。
【図6】本発明の変形例の断面図である。
【図7】従来の半導体実装装置の断面図である。
【図8】従来の半導体実装装置の主要部の拡大断面図である。
【符号の説明】
2…インターポーザ基板、5、6…電極パッド、7…レジスト層、10…フォトマスク、8…第1の突起電極、9…第2の突起電極
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, a manufacturing method thereof, and a semiconductor mounting device, and more particularly, a semiconductor device in which a semiconductor element is mounted on one main surface of an interposer substrate and a protruding electrode is formed on the other main surface, and a manufacturing method thereof. In addition, the present invention relates to a semiconductor mounting apparatus in which the semiconductor device is mounted on a circuit board via a protruding electrode.
[0002]
[Prior art]
Various semiconductor devices have been proposed as electronic devices have been highly integrated. Among them, semiconductor devices called BGA (Ball Grid Array) or LGA (Land Grid Array) have attracted attention. Yes.
[0003]
In these semiconductor devices, a semiconductor element is mounted on the front surface of an interposer (or chip carrier) substrate, and electrode pads for external connection are formed on the back surface. Therefore, QFP (quad flat package), which is a conventional semiconductor device, is provided. ) Has the advantage that the size can be greatly reduced. Furthermore, since the pitch of the electrode pads for external connection can be increased from 1.27 to 1.5 mm with respect to the QFP of 0.3 to 0.5 mm, there is an advantage that the mounting on the circuit board becomes easy.
[0004]
FIG. 7 is a cross-sectional view showing a configuration of a conventional general BGA mounted state, and FIG. 8 is an enlarged cross-sectional view of a part thereof. The BGA 10 is configured by mounting the semiconductor element 1 on the surface of the interposer substrate 2, and the circuit substrate 3 on which the BGA 10 is mounted and the interposer substrate 2 are provided via a protruding electrode 4 formed in advance on the back surface of the interposer substrate 2. Electrically and mechanically connected. The interposer substrate 2 and the protruding electrode 4 are connected via an electrode pad 5 formed on the back surface of the interposer substrate 2, and the circuit board 3 and the protruding electrode 4 are electrode pads 6 formed on the surface of the circuit substrate 3. Connected through.
[0005]
Regarding the BGA 10, many package structures have been proposed depending on the purpose of use and required performance. Among them, it is proposed to use a ceramic substrate such as alumina ceramic as the interposer substrate 2 in BGA that must correspond to high heat-generating semiconductor elements and BGA that requires high-density and high-definition wiring in the interposer substrate 2. . However, the interposer substrate 2 made of alumina ceramic or the like has a thermal expansion coefficient of about 6 to 7 ppm / ° C., whereas the circuit board 3 on which the BGA 10 is mounted is generally made of glass epoxy and its thermal The expansion coefficient is about 15 to 20 ppm / ° C.
[0006]
Thus, if the thermal expansion coefficients of the two are greatly different, in the semiconductor mounting apparatus in which the BGA 10 is mounted on the circuit board 3, a large thermal stress due to the difference between the thermal expansion coefficients of the two due to the heat generated during the operation of the semiconductor element 1. Occur. This thermal stress is concentrated on the protruding electrode 4 between the BGA 10 and the circuit board 3, and in the worst case, fatigue fracture occurs at the joint portion of the protruding electrode 4 and in the vicinity thereof.
[0007]
In general, stress caused by the difference in thermal expansion coefficient is concentrated on the outer peripheral portion near the bonding interface between the BGA 10 and the circuit board 3 and the protruding electrode 4, so that fatigue failure often occurs from this portion.
[0008]
In order to solve such problems, for example, Japanese Patent Application Laid-Open No. 8-316628 proposes a method of relaxing the stress near the joint interface by forming the protruding electrode 4 in a drum shape to facilitate deformation. ing. Sn5-Pb95 and Snl-Pb97.5-Agl. Focusing on the fact that a high melting point solder such as 5 (melting point 300 ° C. or higher) is excellent in heat fatigue resistance, it is conceivable to form the bump electrode 4 with a high melting point solder metal.
[0009]
[Problems to be solved by the invention]
As described above, (1) forming the protruding electrode 4 in a drum shape and (2) forming the protruding electrode 4 with a high melting point solder metal are effective in preventing fatigue failure. If the drum-shaped protruding electrode 4 is formed of a high melting point solder metal, it can be expected that the resistance to fatigue failure will be drastically improved. However, since the protruding electrode 4 needs to be melted when the BGA is soldered to the circuit board 3, the protruding electrode 4 has a problem that a high melting point solder having excellent thermal fatigue characteristics cannot be used. .
[0010]
JP-A-8-222573 discloses a bump electrode in which a high melting point solder and a low melting point solder are combined. However, since the bump electrode shape becomes spherical after heating, the stress should be sufficiently relaxed. I can't. Japanese Patent Application Laid-Open No. 9-205096 discloses a method of forming a low melting point solder bump electrode on a specific portion of a cylindrical projection electrode formed of a high melting point solder. In order to improve soldering quality, When the protruding electrode of the low melting point solder is melted using the flux, the low melting point solder flows to the side surface of the protruding electrode, and there is a problem that the protruding electrode becomes spherical.
[0011]
An object of the present invention is to solve the above-described problems of the prior art and provide a semiconductor device, a manufacturing method thereof, and a semiconductor mounting device in which the fatigue life and bonding strength of the joint portion of the bump electrode and the vicinity thereof are greatly improved. It is in.
[0012]
[Means for Solving the Problems]
In order to achieve the above object, the present invention takes the following measures.
[0013]
(1) In a semiconductor device in which a semiconductor element mounted on one main surface of an insulating substrate and an electrode pad formed on the other main surface are electrically connected, and a protruding electrode is formed on the electrode pad The protruding electrode includes a first protruding electrode portion formed on the electrode pad and a second protruding electrode formed at a tip of the first protruding electrode portion with a metal material having a melting point lower than that of the first protruding electrode portion. And a substantially drum shape having a constricted portion between the tip and the end on the electrode pad side, and the other main surface of the insulating substrate has at least the first protruding electrode portion. An insulating film was formed so as to be partially covered.
[0014]
(2) A semiconductor device in which a semiconductor element mounted on one main surface of an insulating substrate and an electrode pad formed on the other main surface are electrically connected, and a protruding electrode is formed on the electrode pad. In the manufacturing method, a step of forming an insulating film on the other main surface of the insulating substrate, a step of opening a reverse taper hole in which the surface side of the insulating film is narrowed so that the electrode pad is exposed, and the reverse taper A step of filling the hole with a metal material to form a first protruding electrode portion; a step of forming a second protruding electrode portion on the first protruding electrode portion with a metal material having a melting point lower than that; Was provided.
[0015]
(3) A semiconductor device in which a semiconductor element is mounted on one main surface of an insulating substrate and a protruding electrode is formed on the first electrode pad on the other main surface, and a second electrode pad is formed on the surface. In a semiconductor mounting apparatus in which the protruding electrode and the second electrode pad are mounted on the circuit board, the protruding electrode is formed on the first electrode pad. A protruding electrode portion and a second protruding electrode portion made of a metal material having a lower melting point than the first protruding electrode portion, and a tip of the protruding electrode portion and the first electrode pad side. An approximately drum shape having a constricted portion between the end portions and an insulating film was formed on the other main surface of the insulating substrate so as to cover at least a part of the first protruding electrode portion.
[0016]
According to the above configuration (1), only the tip of the protruding electrode is formed of a low melting point metal, and a constriction portion of the high melting point metal excellent in heat fatigue resistance is formed between the tip and the electrode pad side. The formed drum shape.
[0017]
According to the configuration (2), only the tip is formed of a low melting point metal, and between the tip and the electrode pad side, a substantially drum-shaped protrusion having a constricted portion made of a high melting point metal having excellent heat fatigue resistance. An electrode is formed.
[0018]
According to the above configuration (3), in the semiconductor mounting apparatus in which the semiconductor device having the semiconductor element mounted on one main surface is mounted on the circuit board via the protruding electrode, the protruding electrode has only the tip. It can be formed into a drum shape having a constriction portion formed of a low melting point metal and having a high melting point metal excellent in heat fatigue resistance between the tip and the electrode pad side.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view showing a semiconductor device (BGA) according to a first embodiment of the present invention and a method of forming a protruding electrode thereof. The same reference numerals as those described above represent the same or equivalent parts.
[0020]
In this embodiment, an alumina ceramic substrate is used as the interposer substrate 2, and first, a photosensitive resist layer 7 is formed on the main surface on which the electrode pad 5 is formed of a high melting point metal such as tungsten or molybdenum [same as above]. Figure (a)]. The resist layer 7 has sufficient heat resistance to withstand the heat in the subsequent bonding process. A barrier metal layer (not shown) such as Ni or Au may be formed on the surface of the electrode pad 5 for the purpose of improving solderability.
[0021]
Next, unnecessary resist 7 on the electrode pad 5 is removed by a well-known exposure / development process using the photomask 10 [FIG. At this time, the focus is intentionally shifted in the exposure process (specifically, the focal point position is shifted to the light source side with respect to the surface of the resist 7), and the diffraction scattering of the exposure light is generated, whereby the resist layer 7. The cross-sectional shape is made into an inverse taper shape so that the surface side becomes narrower [(c)].
[0022]
Next, a first protruding electrode portion 8 made of high melting point solder Sn5-Pb95 (melting point: about 310 ° C.) excellent in heat fatigue resistance is formed on the electrode pad 5 by, for example, electrolytic plating [(d)] in the figure. The first protruding electrode portion 8 in the resist layer 7 has a conical shape or a pyramidal shape that becomes thinner as the distance from the electrode pad 5 increases in the vertical direction.
[0023]
Next, a predetermined amount of cream-like or preform-like low-melting-point solder Sn63-Pb37 (melting point 183 ° C.) is supplied onto the first protruding electrode portion 8 by, for example, screen printing or a dispenser [FIG. After that, the whole is heated at a temperature not exceeding the melting point of the first protruding electrode portion 8, thereby forming the second protruding electrode portion 9 in a substantially spherical shape [FIG. As a result, only one end of the interposer substrate 2 that is bonded to the circuit board is formed of a low melting point metal on the main surface, and a constricted portion of the high melting point metal is formed between the end and the electrode pad 5 side. A substantially drum-like projecting electrode 30 having the shape is formed.
[0024]
In addition, according to the present embodiment, a part or the whole of the side surface of the first protruding electrode portion 8 is the insulating film 7 having heat resistance in the temperature range given when the second protruding electrode portion 9 is formed. Since it is covered, the low melting point solder forming the second protruding electrode portion 9 is prevented from flowing into the first protruding electrode portion 8 side and becoming spherical.
[0025]
FIG. 2 is a cross-sectional view showing a method of forming a semiconductor device (BGA) and a protruding electrode thereof according to a second embodiment of the present invention. The same reference numerals as those described above represent the same or equivalent parts.
[0026]
In the present embodiment, a photosensitive resist layer 7a is first thinly formed on the main surface of the interposer substrate 2 on which the electrode pads 5 are formed [FIG. Next, unnecessary resist on the electrode pad 5 is removed by a well-known exposure / development process using the photomask 10a [(b), (c) in the figure]. Next, after the resist layer 7b is formed again on the entire surface, unnecessary resist on the electrode pad 5 is removed using the photomask 10b having an opening smaller than the opening provided in the photomask 10a in the same manner as described above [ (D), (e)].
[0027]
Further, after the resist layer 7c is formed again on the entire surface, unnecessary resist on the electrode pad 5 is removed in the same manner as described above using the photomask 10c having an opening smaller than the opening provided in the photomask 10b. Figure (d), (e)]. Similarly, the above-described process is repeated until a resist 7 having a desired thickness is formed to open a reverse tapered hole. Thereafter, similarly to the first embodiment, the first and second electrode portions 8 and 9 are formed to complete the drum-shaped protruding electrode 30.
[0028]
FIG. 3 is a cross-sectional view showing a method of forming a semiconductor device (BGA) and a protruding electrode thereof according to a third embodiment of the present invention, and the same reference numerals as those described above represent the same or equivalent parts.
[0029]
In the present embodiment, first, a photosensitive resist layer 7 is formed on the main surface of the interposer substrate 2 on which the electrode pads 5 are formed [FIG. Next, unnecessary resist 7 on the electrode pad 5 is removed by a well-known exposure / development process using the photomask 10 [FIG. At this time, by intentionally shifting the focus in the exposure process to generate diffraction and scattering of light, the cross-sectional shape of the resist layer 7 is made into a reverse taper shape so that the surface side becomes narrow [FIG. ].
[0030]
Next, a first protruding electrode portion 8a made of high melting point solder Sn5-Pb95 is formed on the electrode pad 5 by, for example, electrolytic plating [(d)] in the figure. At this time, in the first and second embodiments described above, the high melting point solder is formed so as to rise from the opening of the resist layer 7, but in this embodiment, the high melting point solder is exposed outside the opening of the resist layer 7. Therefore, the plating time is shortened.
[0031]
Next, a predetermined amount of cream-like or preform-like low-melting-point solder Sn63-Pb37 is supplied onto the first protruding electrode portion 8a by, for example, screen printing or a dispenser [FIG. By heating at a temperature not exceeding the melting point of the first protruding electrode portion 8a, the second protruding electrode portion 9a is formed in a substantially spherical shape [FIG. As a result, on one main surface of the interposer substrate 2, the tip to be joined to the circuit board 3 is formed of low melting point solder, and a substantially drum shape having a constricted portion between the tip and the electrode pad 5 side. The protruding electrode 30 is formed.
[0032]
When the first protruding electrode portion 8 is formed thicker than the resist layer 7 as in the first and second embodiments, the portion that protrudes from the resist layer 7 becomes a mushroom shape, and the shape becomes larger due to variations in plating conditions. It will change. On the other hand, if the first protruding electrode portion 8a is formed thinner than the resist layer 7 as in this embodiment, the shape can be controlled relatively easily.
[0033]
In each of the above-described embodiments, the resist layer 7 is applied to the entire surface of the interposer substrate 2 so as to cover the side surfaces of the first protruding electrode portions 8 and 8a. However, as shown in FIG. In addition, an unnecessary portion is removed by a physical method such as mechanical polishing or laser irradiation or a chemical method such as etching so that only the periphery of each of the first protruding electrode portions 8 and 8a is covered. It may be formed.
[0034]
With such a structure, when the stress due to the difference in thermal expansion coefficient is applied, the force with which the resist layer 7 fixes the first protruding electrode portions 8 and 8a in the horizontal direction is weakened, and the protruding electrode 30 is flexible. Since it improves, the stress relaxation effect further improves. Moreover, according to the above-described configuration, it is possible to use an insulating material having relatively low flexibility as the resist 7.
[0035]
FIG. 4 is an enlarged cross-sectional view of a semiconductor mounting apparatus in which each of the semiconductor devices (BGA) described above is mounted via the protruding electrodes 30, and the same reference numerals as those described above represent the same or equivalent parts. Here, a semiconductor mounting apparatus on which the BGA of the third embodiment described with reference to FIG. 3 is mounted will be described as an example.
[0036]
In the present embodiment, the second protruding electrode portion 9a of the protruding electrode 30 is bonded onto the electrode pad 6 on the circuit board 3 side. It is desirable that the area of the electrode pad 6 is not smaller than at least the cross-sectional area of the constricted portion of the protruding electrode 30. According to such a configuration, since the angle θ between the electrode pad 6 and the second protruding electrode portion 9a does not become at least an extreme acute angle, the fatigue life and the bonding strength are greatly improved.
[0037]
On the other hand, as shown in FIG. 5, when the area of the electrode pad 6 is reduced, the angle θ exhibits an extremely acute angle. Therefore, the fatigue life and strength at the joint between the electrode pad 6 and the protruding electrode 30 are reduced. It becomes difficult to improve.
[0038]
In each of the above-described embodiments, description has been made using a BGA made of a ceramic substrate. However, the present invention is not limited to this, and is mounted on a circuit board using a protruding electrode. For example, the present invention can be similarly applied to a semiconductor device having a flip chip structure.
[0039]
Further, in each of the above-described embodiments, Sn5-Pb95 solder is used as the electrode material of the first protruding electrode, and Sn63-Pb37 solder is used as the electrode material of the second protruding electrode. However, as the first protruding electrode, It is possible to employ a single metal or alloy that can be soldered at a melting point of 300 ° C. or higher, such as Au, Cu, and Ni. Similarly, as the second protruding electrode, a metal material to which In, Bi, or the like is added in addition to Sn and Pb may be used.
[0040]
【The invention's effect】
According to the present invention, the following effects are achieved.
(1) Since the protruding electrode can be formed into a drum shape whose main part is made of a high melting point material having excellent resistance to fatigue fracture, the fatigue life and bonding strength of the protruding electrode are greatly improved.
(2) Since the side surface of the protruding electrode is covered with a flexible resin material, the flexibility of the protruding electrode in the horizontal direction is improved.
(3) The area of the electrode pad on the circuit board side where the protruding electrode is bonded is at least larger than the cross-sectional area of the constricted portion of the drum-shaped protruding electrode, so that the angle of the bonding surface does not become an extremely acute angle. The fatigue life and the bonding strength at the bonding surface between the protruding electrode and the circuit board are greatly improved.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a method for forming a semiconductor device and a protruding electrode thereof according to a first embodiment of the present invention.
FIG. 2 is a cross-sectional view showing a method for forming a semiconductor device and a protruding electrode thereof according to a second embodiment of the present invention.
FIG. 3 is a cross-sectional view showing a method of forming a semiconductor device and a protruding electrode thereof according to a third embodiment of the present invention.
FIG. 4 is a cross-sectional view of a main part of a semiconductor mounting apparatus according to a fourth embodiment of the present invention.
FIG. 5 is a cross-sectional view of a main part of a semiconductor mounting apparatus according to a fourth embodiment of the present invention.
FIG. 6 is a cross-sectional view of a modified example of the present invention.
FIG. 7 is a cross-sectional view of a conventional semiconductor mounting apparatus.
FIG. 8 is an enlarged cross-sectional view of a main part of a conventional semiconductor mounting apparatus.
[Explanation of symbols]
2 ... interposer substrate, 5, 6 ... electrode pad, 7 ... resist layer, 10 ... photomask, 8 ... first protruding electrode, 9 ... second protruding electrode

Claims (8)

絶縁性基板の一方の主面に搭載された半導体素子と他方の主面に形成された電極パッドとが電気的に接続され、前記電極パッド上に突起電極が形成された半導体装置において、前記突起電極は、前記電極パッド上に形成された第1の突起電極部と、前記第1の突起電極部の先端に、これよりも低融点の金属材料で形成された第2の突起電極部とによって構成され、前記第2の突起電極部の先端は略鼓状であり、前記絶縁性基板の他方の主面には絶縁膜が形成され、前記第1の突起電極部は前記絶縁膜よりも薄く形成されたことを特徴とする半導体装置。In a semiconductor device in which a semiconductor element mounted on one main surface of an insulating substrate and an electrode pad formed on the other main surface are electrically connected, and a protruding electrode is formed on the electrode pad, the protrusion The electrode includes a first protruding electrode portion formed on the electrode pad, and a second protruding electrode portion formed of a metal material having a lower melting point than the first protruding electrode portion at the tip of the first protruding electrode portion. And the tip of the second protruding electrode portion is substantially drum-shaped, an insulating film is formed on the other main surface of the insulating substrate , and the first protruding electrode portion is thinner than the insulating film. wherein a formed. 前記第1の突起電極部は、前記電極パッドから鉛直方向に離れるにしたがって細くなる略円錐形状および略角錐形状のいずれかであることを特徴とする請求項1に記載の半導体装置。2. The semiconductor device according to claim 1, wherein the first protruding electrode portion has one of a substantially conical shape and a substantially pyramid shape that become narrower as the distance from the electrode pad increases in the vertical direction. 前記第2の突起電極部は略球状体であり、前記突起電極は、第1および第2の突起電極部の接合部近傍がくびれた略鼓状であることを特徴とする請求項1または2に記載の半導体装置。The said 2nd projecting electrode part is a substantially spherical body, and the said projecting electrode is a substantially drum shape with which the junction part vicinity of the 1st and 2nd projecting electrode part was constricted. A semiconductor device according to 1. 絶縁性基板の一方の主面に搭載された半導体素子と他方の主面に形成された電極パッドとが電気的に接続され、前記電極パッド上に突起電極が形成された半導体装置の製造方法において、絶縁性基板の他方の主面に絶縁膜を形成する工程と、前記電極パッドが露出するように、前記絶縁膜の表面側が狭まった逆テーパ孔を開口する工程と、前記逆テーパ孔に前記絶縁膜よりも薄く金属材料を充填して第1の突起電極部を形成する工程と、前記第1の突起電極部上に、これよりも低融点の金属材料で第2の突起電極部を形成する工程とからなることを特徴とする半導体装置の製造方法。In a method of manufacturing a semiconductor device in which a semiconductor element mounted on one main surface of an insulating substrate is electrically connected to an electrode pad formed on the other main surface, and a protruding electrode is formed on the electrode pad. a step of forming an insulating film on the other major surface of the insulating substrate, so that the electrode pad is exposed, and a step of opening the inverse tapered bore surface side is narrowed in the insulating film, the said reverse tapered hole Forming a first protruding electrode portion by filling a metal material thinner than the insulating film, and forming a second protruding electrode portion on the first protruding electrode portion with a metal material having a melting point lower than that of the first protruding electrode portion; A method for manufacturing a semiconductor device comprising the steps of: 前記絶縁膜はポジ形のホトレジストで形成され、前記逆テーパ孔は、前記ホトレジスト上にホトマスクを形成する工程と、前記ホトマスクの前記電極パッドと対向する位置に開口を形成する工程と、前記ホトマスクの開口部から前記ホトレジストを合焦点位置よりも後で露光する工程とからなることを特徴とする請求項4に記載の半導体装置の製造方法。The insulating film is formed of a positive photoresist, and the reverse tapered hole includes a step of forming a photomask on the photoresist, a step of forming an opening at a position facing the electrode pad of the photomask, 5. The method of manufacturing a semiconductor device according to claim 4, further comprising the step of exposing the photoresist through the opening after the in-focus position. 前記逆テーパ孔は、相対的に径の小さい開口を有する絶縁膜の上に径の大きい開口を有する絶縁膜を、各開口の中心が略一致するように積層して形成されることを特徴とする請求項4に記載の半導体装置の製造方法。The reverse tapered hole is formed by stacking an insulating film having a large diameter opening on an insulating film having an opening having a relatively small diameter so that the centers of the openings are substantially coincident with each other. A method for manufacturing a semiconductor device according to claim 4. 絶縁性基板の一方の主面に半導体素子が搭載され、他方の主面の第1の電極パッド上に突起電極が形成された半導体装置を、表面に第2の電極パッドが形成された回路基板上に、前記突起電極と第2の電極パッドとが接合されるように実装してなる半導体実装装置において、前記突起電極は、前記第1の電極パッド上に形成された第1の突起電極部と、前記第1の突起電極部の先端に、これよりも低融点の金属材料で形成された第2の突起電極部とによって構成され、前記絶縁性基板の他方の主面には絶縁膜が形成され、前記第1の突起電極部が前記絶縁膜よりも薄く形成されたことを特徴とする半導体装置。A semiconductor device in which a semiconductor element is mounted on one main surface of an insulating substrate and a protruding electrode is formed on a first electrode pad on the other main surface, and a circuit substrate on which a second electrode pad is formed on the surface In the semiconductor mounting apparatus, wherein the protruding electrode is mounted so that the protruding electrode and the second electrode pad are bonded to each other, the protruding electrode is a first protruding electrode portion formed on the first electrode pad. And a second protruding electrode portion made of a metal material having a lower melting point than the first protruding electrode portion, and an insulating film is formed on the other main surface of the insulating substrate. A semiconductor device , wherein the first protruding electrode portion is formed thinner than the insulating film . 前記第2の電極パッドは、前記突起電極のくびれ部の断面積よりも小さくないことを特徴とする請求項7に記載の半導体実装装置。The semiconductor mounting apparatus according to claim 7, wherein the second electrode pad is not smaller than a cross-sectional area of a constricted portion of the protruding electrode.
JP06436898A 1998-02-27 1998-02-27 Semiconductor device, manufacturing method thereof, and semiconductor mounting apparatus Expired - Fee Related JP3671999B2 (en)

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