JPH11186011A - Ceramic board - Google Patents

Ceramic board

Info

Publication number
JPH11186011A
JPH11186011A JP9355289A JP35528997A JPH11186011A JP H11186011 A JPH11186011 A JP H11186011A JP 9355289 A JP9355289 A JP 9355289A JP 35528997 A JP35528997 A JP 35528997A JP H11186011 A JPH11186011 A JP H11186011A
Authority
JP
Japan
Prior art keywords
ceramic substrate
groove
depth
dividing
divided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9355289A
Other languages
Japanese (ja)
Other versions
JP3526527B2 (en
Inventor
Tadahisa Yamamoto
忠寿 山本
Takeshi Furuno
剛 古野
Minoru Yamada
實 山田
Satoshi Kosugi
敏 小杉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP35528997A priority Critical patent/JP3526527B2/en
Publication of JPH11186011A publication Critical patent/JPH11186011A/en
Application granted granted Critical
Publication of JP3526527B2 publication Critical patent/JP3526527B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Ceramic Capacitors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

PROBLEM TO BE SOLVED: To make dividing property of a ceramic board extremely satisfactory, even when the ceramic board is composed of dielectric which is comparatively fragile, and more surely prevent cracks of the ceramic board at the time of carrying. SOLUTION: In a ceramic board 1, through-holes 2 are formed, and a plurality of first dividing trenches 3 which reach the through-holes 2 and a plurality of second dividing trenches 4 which do not reach the through-holes 2 are formed on a surface. In the first dividing trenches 3, at least the regions in the vicinities of the through-holes 2 are formed shallower than the second dividing trenches 4. The depth of the first dividing trenches 3 is set to be 70-90% of the depth of the second dividing trenches 4.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、チップ抵抗器や高
周波デバイス,厚膜混成集積回路,アイソレータ,チッ
プコンデンサ等の電子部品を“多数個取り”によって製
造する際に用いる分割溝付きのセラミック基板に関する
ものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic substrate with a divided groove used when manufacturing electronic components such as chip resistors, high-frequency devices, thick-film hybrid integrated circuits, isolators, chip capacitors, etc. by "multi-piece". It is about.

【0002】[0002]

【従来の技術】従来より、チップ抵抗器等の電子部品を
“多数個取り”によって製造するのに分割溝付きのセラ
ミック基板が用いられている。
2. Description of the Related Art Conventionally, a ceramic substrate having a divided groove has been used to manufacture electronic components such as chip resistors by "multiple-piece".

【0003】かかるセラミック基板は、その分割によっ
て得られる個々の単体チップが電子部品の母材として機
能するものであり、例えば、セラミックグリーンシート
の一主面に、縦横方向に一定深さの分割溝を複数ずつ設
けたものを高温で焼成することにより製作される。
In such a ceramic substrate, each single chip obtained by the division functions as a base material of an electronic component. For example, a division groove having a certain depth in the vertical and horizontal directions is formed on one main surface of a ceramic green sheet. Are manufactured by firing at a high temperature those provided with a plurality of.

【0004】そして、このようなセラミック基板を用い
た電子部品の“多数個取り”は、まずセラミック基板の
一主面又は両面に導電ペースト等を所定パターンに塗布
するとともにこれを高温で焼き付けて導体パターン等を
形成し、しかる後、前記セラミック基板を外力の印加に
より分割溝に沿って縦方向、横方向に順次、分割し、複
数の単体チップとなすことにより行われる。
[0004] In order to "multi-piece" electronic components using such a ceramic substrate, first, a conductive paste or the like is applied to one main surface or both surfaces of the ceramic substrate in a predetermined pattern and is baked at a high temperature to form a conductor. A pattern or the like is formed, and thereafter, the ceramic substrate is sequentially divided in a vertical direction and a horizontal direction along a division groove by application of an external force, thereby forming a plurality of single chips.

【0005】尚、前記セラミック基板の分割溝は、複数
の刃が植設されている金型をセラミックグリーンシート
の一主面に所定の押圧力で押し当てることにより形成さ
れ、このような分割溝は、前述した分割の際にセラミッ
ク基板を比較的容易に分割することができるように、所
定の深さで、例えば、セラミック基板が厚み0.60m
mのMg・Ca・Ti系誘電体から成る場合、0.20
mmの深さでもって全て等しく形成される。
[0005] The dividing grooves of the ceramic substrate are formed by pressing a mold having a plurality of blades implanted against one main surface of the ceramic green sheet with a predetermined pressing force. The ceramic substrate has a predetermined depth, for example, a thickness of 0.60 m so that the ceramic substrate can be relatively easily divided at the time of the above-mentioned division.
0.20 in the case of m.
They are all equally formed with a depth of mm.

【0006】また最近では、電子部品の製作にあたり必
要な箇所にのみ端面印刷を行ったりするため、図7に示
す如く、セラミック基板の分割によって得られる単体チ
ップ11の端面に半円柱状の切り欠き12を設けたもの
がある。このような単体チップ11を得るためのセラミ
ック基板には、一部の分割溝上に円形のスルーホールが
形成されており、かかるセラミック基板を分割溝に沿っ
て分割することで単体チップ11の端面に前述のような
半円柱状の切り欠き12を設けるようにしている。
Recently, in order to print an end face only on a part necessary for manufacturing an electronic component, a semi-cylindrical notch is formed in an end face of a single chip 11 obtained by dividing a ceramic substrate as shown in FIG. 12 is provided. In a ceramic substrate for obtaining such a single chip 11, a circular through hole is formed on a part of the dividing groove, and by dividing the ceramic substrate along the dividing groove, an end face of the single chip 11 is formed. The semi-cylindrical notch 12 as described above is provided.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、この従
来のセラミック基板においては、全ての分割溝が等しい
深さで形成されているため、これらの分割溝のうち、ス
ルーホールを配置させたものと、そうでないものとでは
その部分の機械的強度が大きく異なっている。即ち、セ
ラミック基板の分割溝は、通常、分割の際にあまり大き
な外力を印加しなくても良いようにある程度深く形成さ
れており、このような分割溝上にスルーホールを配置さ
せると、その部分のセラミック基板の機械的強度が極端
に低くなってしまう。このため、セラミック基板の搬送
時等にセラミック基板に大きな振動や衝撃等が印加され
ると、スルーホール上を通過する分割溝のところでセラ
ミック基板に割れが生じ、セラミック基板の信頼性を大
きく低下させる欠点を有していた。
However, in this conventional ceramic substrate, since all the dividing grooves are formed at the same depth, of these dividing grooves, one having a through-hole arranged therein and The mechanical strength of that part is significantly different from that of the other parts. That is, the dividing groove of the ceramic substrate is usually formed to a certain depth so that it is not necessary to apply an excessively large external force at the time of division. The mechanical strength of the ceramic substrate becomes extremely low. For this reason, when a large vibration or impact is applied to the ceramic substrate during the transfer of the ceramic substrate or the like, the ceramic substrate is cracked at the divided groove passing over the through hole, and the reliability of the ceramic substrate is greatly reduced. Had disadvantages.

【0008】[0008]

【課題を解決しようとする課題】本発明は上記欠点に鑑
み案出されたもので、本発明のセラミック基板は、スル
ーホールを有し、且つ一主面に前記スルーホールに通じ
る複数の第1分割溝とスルーホールに通じない複数の第
2分割溝とが設けられているセラミック基板であって、
前記第1分割溝は、少なくとも前記スルーホールに近接
した領域の深さが前記第2分割溝に比し浅く形成されて
いることを特徴とするものである。
SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and a ceramic substrate of the present invention has a through hole, and has a plurality of first through holes connected to the through hole on one main surface. A ceramic substrate provided with a dividing groove and a plurality of second dividing grooves not communicating with the through holes,
The first dividing groove is characterized in that at least a depth of a region near the through hole is formed shallower than that of the second dividing groove.

【0009】また本発明のセラミック基板は、前記第1
分割溝の深さが、前記第2分割溝の深さの70%〜90
%であることを特徴とするものである。
Further, the ceramic substrate of the present invention is characterized in that:
The depth of the dividing groove is 70% to 90% of the depth of the second dividing groove.
%.

【0010】即ち、本発明によれば、スルーホール上を
通過する第1分割溝の深さを、スルーホール上を通過し
ない第2分割溝の深さよりも浅くなしておくことによ
り、セラミック基板の第1分割溝が設けられている箇所
に適度な機械的強度を与えることができ、従って、搬送
時等の振動や衝撃によるセラミック基板の割れが有効に
防止され、セラミック基板の信頼性を向上させることが
可能となる。
That is, according to the present invention, the depth of the first divided groove passing over the through-hole is made smaller than the depth of the second divided groove not passing over the through-hole. Appropriate mechanical strength can be given to the portion where the first division groove is provided, and therefore, cracking of the ceramic substrate due to vibration or impact during transportation or the like is effectively prevented, and the reliability of the ceramic substrate is improved. It becomes possible.

【0011】また前述の第1分割溝はスルーホールに通
じるように形成されているため、セラミック基板を分割
溝に沿って正確に分割することができる。これにより、
セラミック基板の分割によって得られる各単体チップの
エッジにはチッピングが生じにくく、電子部品の歩留り
も向上される利点がある。
Further, since the first dividing groove is formed so as to communicate with the through hole, the ceramic substrate can be accurately divided along the dividing groove. This allows
There is an advantage that chipping hardly occurs at the edge of each single chip obtained by dividing the ceramic substrate, and the yield of electronic components is also improved.

【0012】更に本発明によれば、前記第1分割溝の深
さを第2分割溝の深さの70%〜90%とすることで、
セラミック基板が比較的脆い誘電体から成っている場合
であっても、セラミック基板の分割性を極めて良好とし
た上、搬送時等におけるセラミック基板の割れをより確
実に防止することができる。
Further, according to the present invention, the depth of the first dividing groove is set to 70% to 90% of the depth of the second dividing groove,
Even when the ceramic substrate is made of a relatively brittle dielectric, the splitting of the ceramic substrate can be made extremely good, and the ceramic substrate can be more reliably prevented from cracking during transportation or the like.

【0013】[0013]

【発明の実施の形態】以下、本発明を添付図面に基づい
て詳細に説明する。図1は本発明のセラミック基板の一
形態を示す斜視図であり、1はセラミック基板、2はス
ルーホール、3は第1分割溝、4は第2分割溝である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a perspective view showing one embodiment of the ceramic substrate of the present invention, wherein 1 is a ceramic substrate, 2 is a through hole, 3 is a first division groove, and 4 is a second division groove.

【0014】前記セラミック基板1は、アルミナセラミ
ックスやジルコニア,ムライト,フォルステライト,M
g・Ca・Ti系誘電体,Ba・Mg・W系誘電体,B
a・Ti系誘電体,Ba・Nd・Ti系誘電体等のセラ
ミックス材料から成り、その厚みは用途に応じて適宜設
定され、四角形状をなすように形成される。
The ceramic substrate 1 is made of alumina ceramic, zirconia, mullite, forsterite, M
g-Ca-Ti dielectric, Ba-Mg-W dielectric, B
It is made of a ceramic material such as an a.Ti-based dielectric or a Ba.Nd.Ti-based dielectric, and its thickness is appropriately set according to the application, and is formed in a square shape.

【0015】また前記セラミック基板1は複数のスルー
ホール2を有し、その一主面には縦横方向に複数ずつ分
割溝3,4が設けられる。
The ceramic substrate 1 has a plurality of through-holes 2 and one of its main surfaces is provided with a plurality of divided grooves 3 and 4 in the vertical and horizontal directions.

【0016】前記スルーホール2は、例えば、縦横方向
に3列ずつ、計9個がマトリクス状に配列しており、こ
れらのスルーホール2は、セラミック基板1を分割溝
3,4に沿って分割した際、得られる単体チップの端面
に半円柱状もしくは矩形柱状の切り欠きが形成されるよ
うにする作用を為す。
The through holes 2 are, for example, arranged in a matrix of nine rows and three rows in the vertical and horizontal directions. These through holes 2 divide the ceramic substrate 1 along the dividing grooves 3 and 4. In this case, a semi-cylindrical or rectangular column-shaped notch is formed on the end face of the obtained single chip.

【0017】また一方、セラミック基板1の一主面に設
けられる複数の分割溝3,4は、スルーホール2に通じ
る第1分割溝3と、スルーホール2には通じない複数の
第2分割溝4とで構成される。
On the other hand, the plurality of divided grooves 3 and 4 provided on one main surface of the ceramic substrate 1 include a first divided groove 3 communicating with the through hole 2 and a plurality of second divided grooves not communicating with the through hole 2. And 4.

【0018】前記分割溝3,4は、セラミック基板1に
外力を印加してこれを複数の単体チップに分割したり、
或いは、セラミック基板1の周縁部分に設けられるダミ
ー部1aを切り離したりする際、その作業を容易かつ正
確に行うためのものであり、各々が断面V字状をなすよ
うに所定の深さでもって形成される。
The dividing grooves 3 and 4 apply an external force to the ceramic substrate 1 to divide the ceramic substrate 1 into a plurality of single chips,
Alternatively, when the dummy portion 1a provided on the peripheral portion of the ceramic substrate 1 is cut off, the operation is performed easily and accurately, and each of the dummy portions 1a has a predetermined depth so as to form a V-shaped cross section. It is formed.

【0019】そして、これらの分割溝3,4は、第1分
割溝3と第2分割溝4で、その深さが異なるように形成
される。具体的には、図2(a)(b)に示す如く、第
1分割溝3の深さD1 が第2分割溝4の深さD2 の70
%〜90%の深さとなるように形成され、例えば、セラ
ミック基板1の厚みが0.60mm、第2分割溝4の深
さが0.20mmの場合、第1分割溝3の深さは0.1
4〜0.18mmの範囲内に設定される。
The first and second divisional grooves 3 and 4 are formed to have different depths. Specifically, as shown in FIGS. 2A and 2B, the depth D 1 of the first dividing groove 3 is 70 times the depth D 2 of the second dividing groove 4.
% To 90%. For example, when the thickness of the ceramic substrate 1 is 0.60 mm and the depth of the second division groove 4 is 0.20 mm, the depth of the first division groove 3 is 0%. .1
It is set within the range of 4 to 0.18 mm.

【0020】このように、スルーホール2上を通過する
第1分割溝3の深さD1 をスルーホール2上を通過しな
い第2分割溝4の深さD2 よりも浅くなしておくことに
より、セラミック基板1の第1分割溝3が設けられてい
る箇所に適度な機械的強度を与えることができる。従っ
て、搬送時等の振動や衝撃によるセラミック基板1の割
れが有効に防止され、セラミック基板1の信頼性を向上
させることが可能となる。
As described above, the depth D 1 of the first divided groove 3 passing through the through hole 2 is made smaller than the depth D 2 of the second divided groove 4 not passing through the through hole 2. In addition, appropriate mechanical strength can be given to the portion of the ceramic substrate 1 where the first division groove 3 is provided. Therefore, cracking of the ceramic substrate 1 due to vibration or impact during transportation or the like is effectively prevented, and the reliability of the ceramic substrate 1 can be improved.

【0021】しかも、前記第1分割溝3はセラミック基
板1の一主面においてスルーホール2に通じているた
め、セラミック基板1を分割溝3に沿って正確に分割す
ることができ、各単体チップのエッジにチッピングが生
じるのを有効に防止することができる。これにより、セ
ラミック基板1の分割によって得られる電子部品の歩留
りも大幅に向上する。
Further, since the first dividing groove 3 communicates with the through hole 2 on one main surface of the ceramic substrate 1, the ceramic substrate 1 can be accurately divided along the dividing groove 3, and each single chip Chipping can be effectively prevented from occurring at the edge of. As a result, the yield of electronic components obtained by dividing the ceramic substrate 1 is greatly improved.

【0022】また前記第1分割溝3は、その深さD1
第2分割溝4の深さD2 の70%以上とすることで、セ
ラミック基板1がMg・Ca・Ti系誘電体,Ba・M
g・W系誘電体,Ba・Ti系誘電体,Ba・Nd・T
i系誘電体等の比較的脆い誘電体材料から成っている場
合であっても、セラミック基板1の機械的強度を上げて
セラミック基板1の割れを確実に防止することができ、
また前記深さD1 を深さD2 の90%以下とすること
で、セラミック基板1の分割性を極めて良好になし、チ
ッピングの発生を有効に防止できる利点がある。従って
第1分割溝3の深さD1 は第2分割溝4の深さD2 の7
0%〜90%の範囲内に設定することが好ましい。
The first divided groove 3 has a depth D 1 equal to or greater than 70% of a depth D 2 of the second divided groove 4, so that the ceramic substrate 1 is made of a Mg.Ca.Ti based dielectric. Ba ・ M
g-W dielectric, Ba-Ti dielectric, Ba-Nd-T
Even when the ceramic substrate 1 is made of a relatively brittle dielectric material such as an i-type dielectric, the mechanical strength of the ceramic substrate 1 can be increased to reliably prevent the ceramic substrate 1 from cracking.
Further, by setting the depth D 1 to 90% or less of the depth D 2 , there is an advantage that the dividing property of the ceramic substrate 1 is extremely excellent, and the occurrence of chipping can be effectively prevented. Therefore, the depth D 1 of the first division groove 3 is 7 times the depth D 2 of the second division groove 4.
It is preferable to set within the range of 0% to 90%.

【0023】更に前記分割溝3,4は、その角度θ1
θ2 を40°以上になしておくことで、セラミック基板
1の搬送時の振動等による割れの発生をより有効に防止
することができ、また分割溝3,4の角度θ1 ,θ2
70°以下になしておくことで、セラミック基板1の分
割の際にセラミック基板1が分割溝3,4に沿って割れ
るようになすことができる。従って分割溝3,4の角度
θ1 ,θ2 は40°〜70°の範囲内に設定するのが好
ましい。
Further, the dividing grooves 3 and 4 have their angles θ 1 ,
By setting θ 2 to 40 ° or more, it is possible to more effectively prevent the occurrence of cracks due to vibration or the like during the transfer of the ceramic substrate 1, and to set the angles θ 1 , θ 2 of the dividing grooves 3, 4. By setting the angle at 70 ° or less, the ceramic substrate 1 can be broken along the division grooves 3 and 4 when the ceramic substrate 1 is divided. Therefore, it is preferable that the angles θ 1 and θ 2 of the dividing grooves 3 and 4 be set in the range of 40 ° to 70 °.

【0024】このようなセラミック基板1を製造するに
は、例えば、セラミック基板1がアルミナセラミックス
から成る場合、まず、アルミナ、シリカ、マグネシア等
のセラミックス原料粉末に適当な有機溶剤、溶媒を添加
混合して泥漿状と成すとともにこれを従来周知のドクタ
ーブレード法やカレンダーロール法等を採用することに
よってセラミックグリーンシートを形成し、次に前記セ
ラミックグリーンシートを所定形状に打ち抜き加工した
上、その一主面に、複数のパンチや複数の刃が一体的に
植設されている金型を所定の押圧力で押し当てることに
よってセラミックグリーンシートに複数のスルーホール
2と複数の第1分割溝3と複数の第2分割溝4とを同時
に形成する。このとき、金型に植設される複数の刃は、
第1分割溝3の深さD1 が第2分割溝4の深さD2 の深
さよりも所定の深さだけ浅くなるように、第1分割溝3
を形成するための刃の位置を第2分割溝4を形成するた
めの刃の位置よりも例えば、0.02〜0.06mmだ
け低く配置しておく。そして最後に前記セラミックグリ
ーンシートを所定条件で焼成することにより製品として
のセラミック基板1が完成する。尚、セラミック基板1
は、上述の製法以外に、粉末プレス成形法等によっても
製作することができ、この場合、セラミックス原料粉末
に適当な有機溶剤、溶媒を添加混合し、しかる後、これ
を乾燥・造粒したものを粉体のまま所定の金型内に充填
し、更に加圧及び加熱することによって製作される。ま
たスルーホール2や第1分割溝3,第2分割溝4は金型
の内面をこれらに応じて所定形状に加工しておくことに
より同時に形成される。
In order to manufacture such a ceramic substrate 1, for example, when the ceramic substrate 1 is made of alumina ceramics, first, an appropriate organic solvent and a solvent are added to a ceramic raw material powder such as alumina, silica, magnesia and the like. A ceramic green sheet is formed by adopting a conventionally known doctor blade method, a calender roll method, or the like, and then the ceramic green sheet is punched into a predetermined shape. A plurality of through holes 2, a plurality of first divided grooves 3 and a plurality of first divided grooves 3 are pressed against a ceramic green sheet by pressing a mold having a plurality of punches and a plurality of blades integrally implanted with a predetermined pressing force. The second dividing groove 4 is formed at the same time. At this time, the plurality of blades implanted in the mold
The first division groove 3 is formed such that the depth D 1 of the first division groove 3 is smaller by a predetermined depth than the depth D 2 of the second division groove 4.
Is arranged lower than the position of the blade for forming the second divided groove 4 by, for example, 0.02 to 0.06 mm. Finally, the ceramic green sheet is fired under predetermined conditions to complete the ceramic substrate 1 as a product. The ceramic substrate 1
In addition to the above-mentioned manufacturing method, it can also be manufactured by a powder press molding method or the like.In this case, an appropriate organic solvent and a solvent are added to and mixed with the ceramic raw material powder, and then dried and granulated. Is filled in a predetermined mold as a powder, and further pressurized and heated. Further, the through hole 2, the first divided groove 3, and the second divided groove 4 are formed at the same time by processing the inner surface of the mold into a predetermined shape according to these.

【0025】そして上述のセラミック基板1を電子部品
の“多数個取り”に使用する場合は、まず、セラミック
基板1の一主面又は両面に導電ペースト等を所定パター
ンに塗布するとともにこれを高温で焼き付けることによ
って導体パターンを形成し、しかる後、前記セラミック
基板1に所定の治具を用いて外力を印加し、セラミック
基板1を第1分割溝3及び第2分割溝4に沿って縦方
向、横方向に順次、分割することによって行われ、これ
によって図3のような単体チップが同時に複数個、製作
される。
When the above-mentioned ceramic substrate 1 is used for "multiple-piece" production of electronic components, first, a conductive paste or the like is applied to one main surface or both surfaces of the ceramic substrate 1 in a predetermined pattern, and this is heated at a high temperature. A conductive pattern is formed by baking, and thereafter, an external force is applied to the ceramic substrate 1 using a predetermined jig to vertically move the ceramic substrate 1 along the first divided groove 3 and the second divided groove 4, The division is performed sequentially in the horizontal direction, whereby a plurality of single chips as shown in FIG. 3 are manufactured at the same time.

【0026】このとき、セラミック基板1のダミー部1
aに設けられる第1分割溝3の先端をダミー部1aの途
中、具体的には、第1分割溝3の形成方向に1/4〜3
/4のところで止めるようにしておけば、その部分の機
械的強度が向上するため、搬送時等の振動や衝撃による
セラミック基板1の割れがより確実に防止されるように
なり、セラミック基板1の信頼性が更に向上される。従
ってセラミック基板1のダミー部1aに設けられる第1
分割溝3をダミー部1aの途中1/4〜3/4のところ
で止めるようにしておくことが好ましい。
At this time, the dummy portion 1 of the ceramic substrate 1
a in the middle of the dummy portion 1a, specifically, in the direction in which the first divided groove 3 is formed,
By stopping at / 4, the mechanical strength of that portion is improved, so that cracking of the ceramic substrate 1 due to vibration or impact during transportation or the like is more reliably prevented, and the ceramic substrate 1 Reliability is further improved. Therefore, the first portion provided on the dummy portion 1a of the ceramic substrate 1
It is preferable that the dividing groove 3 be stopped at 1 / to / of the middle of the dummy portion 1a.

【0027】尚、本発明は上述の形態に限定されるもの
ではなく、本発明の要旨を逸脱しない範囲において種々
の変更、改良等が可能である。
The present invention is not limited to the above-described embodiment, and various changes and improvements can be made without departing from the gist of the present invention.

【0028】例えば、上述の形態においては第1分割溝
3の深さD1 をその全体にわたって第2分割溝4の深さ
2 よりも浅くしたが、これに代えて、図4に示す如
く、第1分割溝3の深さD1 をスルーホール2に近接す
る領域のみ第2分割溝4の深さD2 よりも浅く形成し、
それ以外の部位は第2分割溝4と同じ深さで形成するよ
うにしても構わない。この場合、第1分割溝3を形成す
るための刃は第1分割溝3の形状に応じた形になしてお
く。
For example, in the embodiment described above, the depth D 1 of the first divided groove 3 is made shallower than the depth D 2 of the second divided groove 4 as a whole, but instead, as shown in FIG. The depth D 1 of the first division groove 3 is formed to be shallower than the depth D 2 of the second division groove 4 only in a region adjacent to the through hole 2;
Other parts may be formed at the same depth as the second division groove 4. In this case, the blade for forming the first division groove 3 is formed in a shape corresponding to the shape of the first division groove 3.

【0029】また上述の形態においては1個のスルーホ
ール2を第1分割溝3によって2つに分割されるように
なしたが、図5に示す如く、1個のスルーホール2を縦
横方向の第1分割溝3によって4つに分割するような実
施形態にも本発明は適用可能である。
Further, in the above-described embodiment, one through hole 2 is divided into two by the first dividing groove 3. However, as shown in FIG. The present invention is also applicable to an embodiment in which the first divided groove 3 divides the light into four.

【0030】更に図6(a)に示す如く、セラミック基
板1の一主面に設けられる分割溝3’の稜線部に曲率半
径0.01〜0.5mmのR面を設けたり、図6(b)
に示す如く、分割溝3”の稜線部にC面を設けるように
すれば、グリーンシートの成形時に、分割溝3”の周囲
にクラックが発生するのを有効に防止できる利点もあ
る。
Further, as shown in FIG. 6A, an R surface having a radius of curvature of 0.01 to 0.5 mm is provided at the ridge line of the dividing groove 3 'provided on one main surface of the ceramic substrate 1, or as shown in FIG. b)
As shown in the above, if the C-plane is provided at the ridge of the dividing groove 3 ", there is also an advantage that cracks can be effectively prevented from being generated around the dividing groove 3" when the green sheet is formed.

【0031】(実験例)図1のセラミック基板1と同様
に、径5.5mmのスルーホールを9個有した厚み0.
60mm、35mm×35mmのBa・Nd・Ti系誘
電体基板をサンプルとして用い、スルーホールに通じる
第1分割溝の深さD1 をスルーホールに通じない第2分
割溝の深さD2 に対して種々変化させ、それぞれに関
し、工程中の割れ発生率と、実際に分割を行ったときの
分割性について調べた。その結果を表1に示す。尚、第
2分割溝の深さD2 の深さは全て0.20mmに固定
し、サンプルの数は100個ずつとし、これらを総合評
価して○△×の3段階に分けた。
(Experimental Example) As in the case of the ceramic substrate 1 shown in FIG.
Using a Ba / Nd / Ti based dielectric substrate of 60 mm, 35 mm × 35 mm as a sample, the depth D 1 of the first division groove leading to the through hole is set to the depth D 2 of the second division groove not leading to the through hole. In each case, the crack occurrence rate during the process and the splitting property when actually splitting were examined. Table 1 shows the results. The depth of the depth D 2 of the second dividing grooves are all fixed to 0.20 mm, the number of samples is set to one by 100, and divided into these three stages of the overall evaluation to ○ △ ×.

【0032】[0032]

【表1】 [Table 1]

【0033】以上の結果より明らかなように、第1分割
溝の深さD1 は割れ発生率の観点からは、第2分割溝の
深さD2 の90%以下とするのが好ましく、また分割性
の観点からは、第2分割溝の深さD2 の70%以上とす
るのが好ましい。
As is clear from the above results, the depth D 1 of the first divisional groove is preferably set to 90% or less of the depth D 2 of the second divisional groove from the viewpoint of the crack occurrence rate. from the viewpoint of dividing properties, preferably the second divided more than 70% of the depth D 2 of the groove.

【0034】従って、第1分割溝の深さD1 を、工程中
の割れ発生率の低減、分割性等の観点から総合的に勘案
すると、第2分割溝の深さD2 の70%〜90%の範囲
に設定することが最適であることが判る。
Therefore, when the depth D 1 of the first divided groove is comprehensively taken into consideration from the viewpoint of the reduction of the rate of occurrence of cracks in the process and the division property, the depth D 1 is 70% or less of the depth D 2 of the second divided groove. It can be seen that setting the range to 90% is optimal.

【0035】[0035]

【発明の効果】本発明のセラミック基板によれば、スル
ーホール上を通過する第1分割溝の深さを、スルーホー
ル上を通過しない第2分割溝の深さよりも浅くなしてお
くことにより、セラミック基板の第1分割溝が設けられ
ている箇所に適度な機械的強度を与えることができ、従
って、搬送時等の振動や衝撃によるセラミック基板の割
れが有効に防止され、セラミック基板の信頼性を向上さ
せることが可能となる。また本発明のセラミック基板に
よれば、前記第1分割溝がスルーホールに通じるように
形成されているため、セラミック基板の分割時に各単体
チップのエッジ等にはチッピングが生じにくく、セラミ
ック基板の分割によって得られる電子部品の歩留りも向
上される利点がある。
According to the ceramic substrate of the present invention, the depth of the first divided groove passing over the through hole is made smaller than the depth of the second divided groove not passing over the through hole. Appropriate mechanical strength can be imparted to the portion of the ceramic substrate where the first division groove is provided. Therefore, cracking of the ceramic substrate due to vibration or impact during transportation or the like is effectively prevented, and the reliability of the ceramic substrate is improved. Can be improved. Further, according to the ceramic substrate of the present invention, since the first division groove is formed so as to communicate with the through hole, chipping hardly occurs at the edge of each single chip at the time of division of the ceramic substrate. Therefore, there is an advantage that the yield of electronic components obtained by the method is also improved.

【0036】更に本発明のセラミック基板によれば、前
記第1分割溝の深さを第2分割溝の深さの70%〜90
%とすることで、セラミック基板が比較的脆い誘電体材
料から成っている場合であっても、セラミック基板を複
数の単体チップに分割する際の分割性を極めて良好とし
た上、搬送時等におけるセラミック基板の割れをより確
実に防止することができる。
Further, according to the ceramic substrate of the present invention, the depth of the first division groove is set to 70% to 90% of the depth of the second division groove.
%, When the ceramic substrate is made of a relatively fragile dielectric material, the splitting ability when dividing the ceramic substrate into a plurality of single chips is extremely good, and when the ceramic substrate is transported, etc. Cracking of the ceramic substrate can be more reliably prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のセラミック基板の一形態を示す斜視図
である。
FIG. 1 is a perspective view showing one embodiment of a ceramic substrate of the present invention.

【図2】(a)は第1分割溝の部分断面図、(b)は第
2分割溝の部分断面図である。
2A is a partial sectional view of a first dividing groove, and FIG. 2B is a partial sectional view of a second dividing groove.

【図3】図1のセラミック基板を分割して得られる単体
チップの斜視図である。
FIG. 3 is a perspective view of a single chip obtained by dividing the ceramic substrate of FIG. 1;

【図4】本発明のセラミック基板の他の実施形態を示す
断面図である。
FIG. 4 is a sectional view showing another embodiment of the ceramic substrate of the present invention.

【図5】本発明のセラミック基板の他の実施形態を示す
斜視図である。
FIG. 5 is a perspective view showing another embodiment of the ceramic substrate of the present invention.

【図6】(a)及び(b)は本発明のセラミック基板の
変形例を示す部分断面図である。
FIGS. 6A and 6B are partial cross-sectional views showing a modification of the ceramic substrate of the present invention.

【図7】従来のセラミック基板を分割して得られる単体
チップの斜視図である。
FIG. 7 is a perspective view of a single chip obtained by dividing a conventional ceramic substrate.

【符号の説明】[Explanation of symbols]

1・・・セラミック基板 2・・・スルーホール 3・・・第1分割溝 4・・・第2分割溝 DESCRIPTION OF SYMBOLS 1 ... Ceramic substrate 2 ... Through hole 3 ... 1st division groove 4 ... 2nd division groove

───────────────────────────────────────────────────── フロントページの続き (72)発明者 小杉 敏 滋賀県蒲生郡蒲生町川合10番地の1 京セ ラ株式会社滋賀工場内 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Satoshi Kosugi 10-1 Kawai, Gamo-cho, Gamo-gun, Shiga Prefecture

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】スルーホールを有し、且つ一主面に前記ス
ルーホールに通じる複数の第1分割溝とスルーホールに
通じない複数の第2分割溝とが設けられているセラミッ
ク基板であって、前記第1分割溝は、少なくとも前記ス
ルーホールに近接した領域の深さが前記第2分割溝に比
し浅く形成されていることを特徴とするセラミック基
板。
1. A ceramic substrate having a through hole and having, on one main surface, a plurality of first division grooves communicating with the through hole and a plurality of second division grooves not communicating with the through hole. A ceramic substrate, wherein the first divisional groove is formed to have a depth at least in a region close to the through hole shallower than that of the second divisional groove.
【請求項2】前記第1分割溝の深さが、前記第2分割溝
の深さの70%〜90%であることを特徴とする請求項
1に記載のセラミック基板。
2. The ceramic substrate according to claim 1, wherein the depth of the first division groove is 70% to 90% of the depth of the second division groove.
JP35528997A 1997-12-24 1997-12-24 Ceramic substrate Expired - Fee Related JP3526527B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35528997A JP3526527B2 (en) 1997-12-24 1997-12-24 Ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35528997A JP3526527B2 (en) 1997-12-24 1997-12-24 Ceramic substrate

Publications (2)

Publication Number Publication Date
JPH11186011A true JPH11186011A (en) 1999-07-09
JP3526527B2 JP3526527B2 (en) 2004-05-17

Family

ID=18443059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35528997A Expired - Fee Related JP3526527B2 (en) 1997-12-24 1997-12-24 Ceramic substrate

Country Status (1)

Country Link
JP (1) JP3526527B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20100129710A (en) * 2009-06-01 2010-12-09 니혼도꾸슈도교 가부시키가이샤 Method for manufacturing ceramic capacitor
JP2012151359A (en) * 2011-01-20 2012-08-09 Dainippon Printing Co Ltd Capacitor built-in wiring board, method of manufacturing capacitor built-in wiring board, and capacitor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20100129710A (en) * 2009-06-01 2010-12-09 니혼도꾸슈도교 가부시키가이샤 Method for manufacturing ceramic capacitor
JP2012151359A (en) * 2011-01-20 2012-08-09 Dainippon Printing Co Ltd Capacitor built-in wiring board, method of manufacturing capacitor built-in wiring board, and capacitor

Also Published As

Publication number Publication date
JP3526527B2 (en) 2004-05-17

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