JP2001332857A - Manufacturing method for wiring board - Google Patents

Manufacturing method for wiring board

Info

Publication number
JP2001332857A
JP2001332857A JP2000150055A JP2000150055A JP2001332857A JP 2001332857 A JP2001332857 A JP 2001332857A JP 2000150055 A JP2000150055 A JP 2000150055A JP 2000150055 A JP2000150055 A JP 2000150055A JP 2001332857 A JP2001332857 A JP 2001332857A
Authority
JP
Japan
Prior art keywords
ceramic
dividing groove
dividing
ceramic substrate
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000150055A
Other languages
Japanese (ja)
Inventor
Hiroshi Matsudera
拓 松寺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000150055A priority Critical patent/JP2001332857A/en
Publication of JP2001332857A publication Critical patent/JP2001332857A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To solve the problem that burrs, chips, etc., are formed and an outward appearance defect is generated when a ceramic substrate is parted into individual wiring boards. SOLUTION: When one ceramic substrate 7 are cut and parted along parting grooves 6 to form many wiring boards 9, plural cavities 5 are formed vertically side by side in areas of the ceramic substrate 7 right below the parting grooves 6, within a range defined by 0.24×(t-c1-c2)<=nd<=0.38×(t-c1-c2) and d<=0.62×1+log(c1/w)} (t: thickness (mm) of insulating base body, c1: depth (mm) of parting groove on cutting start point side, c2: depth (mm) of parting groove on cutting end-point side, w: maximum opening width (mm) of parting groove, n: number of cavities, d: vertical internal diameter (mm) of each cavity part).

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体素子や容量素
子、抵抗器等の電子部品が搭載される配線基板の製造方
法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a wiring board on which electronic components such as a semiconductor element, a capacitor, and a resistor are mounted.

【0002】[0002]

【従来の技術】従来、半導体素子や容量素子、抵抗器等
の電子部品が搭載される配線基板は酸化アルミニウム質
焼結体等の電気絶縁材料から成る絶縁基体の内部及び表
面にタングステン、モリブデン等の高融点金属材料から
成る配線導体層を形成した構造を有しており、絶縁基体
表面に半導体素子や容量素子、抵抗器等の電子部品を搭
載するとともに各電子部品の電極を配線導体に電気的に
接続するようになっている。
2. Description of the Related Art Conventionally, a wiring board on which electronic components such as a semiconductor element, a capacitor element, and a resistor are mounted has an insulating base made of an electrically insulating material such as an aluminum oxide sintered body, and has tungsten, molybdenum, etc. It has a structure in which a wiring conductor layer made of a high melting point metal material is formed, and electronic components such as semiconductor elements, capacitance elements, and resistors are mounted on the surface of the insulating base, and the electrodes of each electronic component are electrically connected to the wiring conductor. Connection is made.

【0003】かかる配線基板は、一般に、セラミックス
の積層技術及びスクリーン印刷等の厚膜形成技術を採用
することにより製作され、また、特に表面実装用等の小
型の配線基板では、量産性を考慮して多数個を集約させ
た多数個取りの形態で製作したセラミック基板を分割す
る方法で製作されており、具体的には以下の方法によっ
て製作される。即ち、 (1)まず、酸化アルミニウム(Al23)、酸化珪素
(SiO2)、酸化マグネシウム(MgO)、酸化カル
シウム(CaO)等から成るセラミックス原料粉末に有
機溶剤、溶媒を添加混合して泥漿物を作り、これを従来
周知のドクターブレード法やカレンダーロール法等によ
りシート状に成形して配線基板の絶縁基体となる領域を
多数有する広面積のセラミックグリーンシート(セラミ
ック生シート)を複数枚得る。 (2)次に、タングステン、モリブデン等の金属の粉末
に有機溶剤、溶媒を添加して得た導電ペーストを、スク
リーン印刷法により、前記少なくとも1枚のセラミック
グリーンシートの各絶縁基体となる領域に所定パターン
に印刷塗付して配線用導体を被着形成する。 (3)次に、前記セラミックグリーンシートを上下に積
層して生セラミック成形体となし、この生セラミック成
形体の上面および/または下面に、前記絶縁基体となる
領域を区画する仮想線に沿って金属製の刃を押圧するこ
とにより分割溝を形成し、該分割溝によって前記絶縁基
体となる領域を区画する。 (4)そして最後に、前記生セラミック成形体を焼成
し、絶縁基体に配線導体を形成した配線基板を多数有す
るセラミック基板を得るとともに、該セラミック基板を
前記分割溝に沿って切断し、多数の配線基板を個々に分
割することにより、所定パターンの配線導体を有する個
々の配線基板が形成される。
Such a wiring board is generally manufactured by employing a technique of laminating ceramics and a technique of forming a thick film such as screen printing, and especially in a small-sized wiring board for surface mounting or the like, mass production is taken into consideration. It is manufactured by a method of dividing a ceramic substrate manufactured in a multi-piece form in which a large number of pieces are integrated, and specifically manufactured by the following method. That is, (1) First, an organic solvent and a solvent are added to and mixed with a ceramic raw material powder composed of aluminum oxide (Al 2 O 3 ), silicon oxide (SiO 2 ), magnesium oxide (MgO), calcium oxide (CaO) and the like. A plurality of wide-area ceramic green sheets (green ceramic sheets) having a large number of regions serving as insulating bases of a wiring board are formed by forming a slurry and forming the same into a sheet by a well-known doctor blade method, a calendar roll method, or the like. obtain. (2) Next, a conductive paste obtained by adding an organic solvent and a solvent to a powder of a metal such as tungsten or molybdenum is applied by screen printing to the at least one ceramic green sheet in a region to be each insulating substrate. A wiring conductor is adhered and formed by printing on a predetermined pattern. (3) Next, the ceramic green sheets are stacked up and down to form a green ceramic molded body, and on the upper surface and / or lower surface of the green ceramic molded body, along a virtual line defining the region to be the insulating base. A division groove is formed by pressing a metal blade, and the division groove is used to divide the region to be the insulating base. (4) Finally, the green ceramic molded body is fired to obtain a ceramic substrate having a large number of wiring boards in which wiring conductors are formed on an insulating base, and the ceramic substrate is cut along the dividing grooves to obtain a large number of pieces. By individually dividing the wiring boards, individual wiring boards having a predetermined pattern of wiring conductors are formed.

【0004】なお、上記セラミック基板の切断は、通
常、分割線に沿ってセラミック基板を撓ませて分割溝の
底部に曲げ応力を集中させ、分割溝の底部に小さな亀裂
を生じさせるとともにこの亀裂をセラミック基板の内部
を介して底面にまで進行させることによって行われる。
In the cutting of the ceramic substrate, usually, the ceramic substrate is bent along the dividing line to concentrate the bending stress on the bottom of the dividing groove, thereby generating a small crack at the bottom of the dividing groove and forming the crack. This is performed by advancing to the bottom through the inside of the ceramic substrate.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記従
来の製造方法では、セラミック基板を分割溝に沿って分
割する際、セラミック基板を形成する焼結粒子の形状、
物性等にばらつきがあることから亀裂の進行方向が不均
一となり、その結果、セラミック基板を正確に分割溝に
沿って分割することができず、形成された個々の配線基
板にはバリやカケ等が形成されて外形不良を発生してし
まうという問題があった。
However, according to the above-mentioned conventional manufacturing method, when the ceramic substrate is divided along the dividing grooves, the shape of the sintered particles forming the ceramic substrate is reduced.
Due to variations in physical properties, etc., the crack propagation direction becomes uneven, and as a result, the ceramic substrate cannot be accurately divided along the dividing grooves, and the formed individual wiring substrate has burrs, chips, etc. Is formed to cause a defective outer shape.

【0006】また特に、配線基板が小型で配線導体が高
密度に形成されているような場合、発生したバリやカケ
が小さなものであったとしても配線基板の外寸(外形寸
法)が規格値から大きく外れたり、配線導体に断線等の
重大な不具合を生じたりしてしまう。
In particular, when the wiring board is small and the wiring conductors are formed at a high density, the outer size (outer dimension) of the wiring board is the standard value even if the generated burrs and chips are small. Of the wiring conductor, or a serious problem such as disconnection of the wiring conductor occurs.

【0007】本発明は、上記問題点に鑑み案出されたも
のであり、その目的は、セラミック基板を分割溝に沿っ
てバリやカケ等を発生することなく確実、かつ綺麗に切
断することを可能とし、所定の配線導体、所定の外形寸
法を有する配線基板を一度に多数個形成することができ
る配線基板の製造方法を提供することにある。
The present invention has been devised in view of the above problems, and an object of the present invention is to cut a ceramic substrate along a dividing groove reliably and neatly without generating burrs and chips. It is an object of the present invention to provide a method of manufacturing a wiring board, which is capable of forming a large number of wiring boards having predetermined wiring conductors and predetermined external dimensions at a time.

【0008】[0008]

【課題を解決するための手段】本発明は、(1)配線基
板の絶縁基体となる領域を多数有する広面積のセラミッ
クグリーンシートを複数枚準備するとともに、前記少な
くとも1枚のセラミックグリーンシートの各絶縁基体と
なる領域に配線用導体を被着形成する工程と、(2)前
記複数のセラミックグリーンシートを上下に積層し、生
セラミック成形体となす工程と(3)前記生セラミック
成形体の上面および/または下面に分割溝を形成し、該
分割溝によって前記絶縁基体となる領域を区画する工程
と、(4)前記分割溝が形成された生セラミック成形体
を焼成し、絶縁基体に配線導体を形成した配線基板を多
数有するセラミック基板を得るとともに、該セラミック
基板を前記分割溝に沿って切断し、多数の配線基板を個
々に分割する工程とを具備する配線基板の製造方法であ
って、前記セラミック基板は前記分割溝の直下領域の内
部に複数個の空洞部が上下に並んで、かつ下記式(1)
(2)を満足させるようにして形成されていることを特
徴とするものである。 (式1)0.24×(t−c1−c2)≦nd≦0.38×(t−c1−c2) (式2)d≦0.62×{1+log(c1/w)} ただし、 t:絶縁基体の厚み(mm) c1:切断起点側の分割溝の深さ(mm) c2:切断終点側の分割溝の深さ(mm) w:分割溝の最大開口幅(mm) n:空洞部の個数 d:各空洞部の上下方向の内径(mm) また本発明は、前記複数個の空洞部は、それぞれ略円筒
形で、かつ前記分割溝と平行となるようにして形成され
ていることを特徴とするものである。
According to the present invention, there is provided (1) a method of preparing a plurality of wide-area ceramic green sheets having a large number of regions serving as insulating bases of a wiring board; (2) a step of laminating the plurality of ceramic green sheets one above the other to form a green ceramic molded body, and (3) an upper surface of the green ceramic molded body. And / or forming a dividing groove on the lower surface, and dividing the region serving as the insulating base by the dividing groove; and (4) firing the green ceramic molded body having the dividing groove formed thereon, and forming a wiring conductor on the insulating base. Obtaining a ceramic substrate having a large number of wiring boards on which a plurality of wiring boards are formed, cutting the ceramic substrate along the division grooves, and individually dividing the large number of wiring boards. A method of manufacturing a wiring board having a said ceramic substrate is aligned plurality of hollow portion up and down inside the region immediately below the dividing grooves, and the following formula (1)
It is characterized by being formed so as to satisfy (2). (Equation 1) 0.24 × (t−c1−c2) ≦ nd ≦ 0.38 × (t−c1−c2) (Equation 2) d ≦ 0.62 × {1 + log (c1 / w)} where t : The thickness of the insulating substrate (mm) c1: the depth of the dividing groove on the cutting start side (mm) c2: the depth of the dividing groove on the cutting end side (mm) w: the maximum opening width of the dividing groove (mm) n: cavity Number of parts d: vertical inner diameter (mm) of each cavity part In the present invention, the plurality of cavities are each substantially cylindrical and formed so as to be parallel to the dividing groove. It is characterized by the following.

【0009】本発明の配線基板の製造方法によれば、セ
ラミック基板に設けた分割溝の直下領域に位置する内部
に所定条件の複数個の空洞部を形成したことから、セラ
ミック基板に撓みによる曲げ応力を印加し、分割溝に沿
って切断する際、分割溝の底部に形成された小さな亀裂
の進行方向は、曲げ応力が各空洞部の上端部および下端
部に集中することにより逐次矯正されてセラミック基板
の分割溝の直下方向となり、その結果、セラミック基板
を分割溝に沿ってバリやカケ等を発生することなく確
実、かつ綺麗に切断することが可能となり、所定の配線
導体、所定の外形寸法を有する配線基板を一度に多数個
形成することができる。
According to the method of manufacturing a wiring board of the present invention, since a plurality of cavities under predetermined conditions are formed inside a region located immediately below the dividing groove provided in the ceramic substrate, the ceramic substrate is bent by bending. When applying stress and cutting along the dividing groove, the traveling direction of small cracks formed at the bottom of the dividing groove is sequentially corrected by bending stress concentrated on the upper end and lower end of each cavity. It is directly below the dividing groove of the ceramic substrate, and as a result, it is possible to cut the ceramic substrate along the dividing groove reliably and neatly without generating burrs, chips, etc. A large number of wiring boards having dimensions can be formed at one time.

【0010】また本発明の配線基板の製造方法によれ
ば、前記空洞部をセラミック基板の厚みに対する最適な
条件、即ち、0.24×(t−c1−c2)≦nd≦
0.38×(t−c1−c2)かつd≦0.62×{1
+log(c1/w)}(t:絶縁基体の厚み(m
m)、c1:切断起点側の分割溝の深さ(mm)、c
2:切断終点側の分割溝の深さ(mm)、w:分割溝の
最大開口幅(mm)、n:空洞部の個数、d:各空洞部
の上下方向の内径(mm))となるような範囲に特定し
たことから、セラミック基板の分割溝形成部位の機械的
強度を良好に維持しつつ、分割溝に沿ってバリやカケ等
を発生することなく確実、かつ綺麗に切断することが可
能で、所定の配線導体、所定の外形寸法を有する配線基
板を一度に多数個形成することができる。
Further, according to the method of manufacturing a wiring board of the present invention, the cavity is formed in an optimum condition for the thickness of the ceramic substrate, that is, 0.24 × (t−c1−c2) ≦ nd ≦.
0.38 × (t−c1−c2) and d ≦ 0.62 × {1
+ Log (c1 / w)} (t: thickness of insulating substrate (m
m), c1: Depth (mm) of the dividing groove on the cutting start side, c
2: the depth (mm) of the dividing groove on the cutting end point side, w: the maximum opening width (mm) of the dividing groove, n: the number of cavities, d: the vertical inner diameter (mm) of each cavity. From the specified range, the ceramic substrate can be cut reliably and neatly without generating burrs, chips, etc. along the dividing groove while maintaining good mechanical strength of the dividing groove forming portion of the ceramic substrate. It is possible to form a large number of wiring boards having predetermined wiring conductors and predetermined external dimensions at one time.

【0011】[0011]

【発明の実施の形態】次に、本発明の配線基板の製造方
法を図1に示す実施例に基づき詳細に説明する。
Next, a method for manufacturing a wiring board according to the present invention will be described in detail with reference to the embodiment shown in FIG.

【0012】まず、図1(a)に示す如く、絶縁基体と
なる領域Aを多数する絶縁基体となる領域Aを区画する
仮想線に沿って上面/及び又は下面に空洞部となる凹部
2を形成するとともに、少なくとも1枚のセラミックグ
リーンシートの絶縁基体となる領域Aに所定パターンの
配線用導体3を形成する。
First, as shown in FIG. 1A, a concave portion 2 serving as a cavity is formed on an upper surface and / or a lower surface along an imaginary line defining a region A serving as an insulating base, which includes a plurality of regions A serving as an insulating base. At the same time, a wiring conductor 3 having a predetermined pattern is formed in a region A serving as an insulating base of at least one ceramic green sheet.

【0013】前記セラミックグリーンシート1は、例え
ば、絶縁基体が酸化アルミニウム質焼結体で形成されて
いる場合、酸化アルミニウム(Al23)、酸化珪素
(SiO2)、酸化マグネシウム(MgO)、酸化カル
シウム(CaO)等のセラミックス粉末、ガラス粉末、
酸化モリブデン等の着色用助剤粉末等から成る原料粉末
に有機溶剤、溶媒を添加混合して泥漿物を作り、これを
従来周知のドクターブレード法やカレンダーロール法等
によりシート状に成形することによって形成される。
For example, when the insulating substrate is formed of an aluminum oxide sintered body, the ceramic green sheet 1 may be made of aluminum oxide (Al 2 O 3 ), silicon oxide (SiO 2 ), magnesium oxide (MgO), Ceramic powder such as calcium oxide (CaO), glass powder,
An organic solvent and a solvent are added to and mixed with a raw material powder comprising a coloring auxiliary powder such as molybdenum oxide to form a slurry, which is formed into a sheet by a conventionally known doctor blade method, a calendar roll method, or the like. It is formed.

【0014】また前記凹部2は、セラミックグリーンシ
ート1の厚み方向に略半円状をなしており、例えば、セ
ラミックグリーンシート1の所定部位に略円柱状をなす
棒状の金属製部材を所定深さにまで押圧することによっ
て形成される。
The recess 2 has a substantially semicircular shape in the thickness direction of the ceramic green sheet 1. For example, a rod-shaped metal member having a substantially cylindrical shape is formed at a predetermined position on the ceramic green sheet 1 by a predetermined depth. Formed by pressing up to.

【0015】更に前記配線用導体3は、タングステン、
モリブデン、マンガン、銅、銀等の金属粉末から成り、
タングステン等の金属粉末に適当な有機バインダーや溶
剤を添加混合して得た金属ペーストをセラミックグリー
ンシート1の絶縁基体となる領域Aに従来周知のスクリ
ーン印刷法により所定パターンに印刷塗布することによ
って形成される。
Further, the wiring conductor 3 is made of tungsten,
Made of metal powder such as molybdenum, manganese, copper, silver, etc.
A metal paste obtained by adding and mixing an appropriate organic binder and a solvent to a metal powder such as tungsten is formed by printing and applying a predetermined pattern on a region A serving as an insulating substrate of the ceramic green sheet 1 by a conventionally known screen printing method. Is done.

【0016】次に、図1(b)に示す如く、複数枚のセ
ラミックグリーンシート1を各々の上下面に設けた空洞
部となる凹部2が互いに向かい合うようにして上下に積
層し、これによって各絶縁基体となる領域Aに配線用導
体3を有し、複数個上下に並んだ空洞部5を内部に有す
る生セラミック成形体4を形成する。
Next, as shown in FIG. 1 (b), a plurality of ceramic green sheets 1 are stacked one on top of the other so that concave portions 2 serving as cavities provided on the upper and lower surfaces thereof face each other. A green ceramic molded body 4 having a wiring conductor 3 in a region A serving as an insulating base and having a plurality of vertically arranged cavities 5 therein is formed.

【0017】次に、図1(c)に示す如く、前記生セラ
ミック成形体4の上面および下面で、絶縁基体となる領
域Aを区画する仮想線に沿って分割溝6を形成する。
Next, as shown in FIG. 1 (c), a division groove 6 is formed on the upper and lower surfaces of the green ceramic molded body 4 along an imaginary line dividing an area A to be an insulating base.

【0018】前記分割溝6は、例えば、金属製の刃を生
セラミック成形体2の上面および下面に所定の深さまで
押し込むことにより形成され、この場合、形成された分
割溝6はV字状等、ほぼ刃の縦断面と同様の断面形を有
している。
The dividing groove 6 is formed, for example, by pushing a metal blade into the upper and lower surfaces of the green ceramic molded body 2 to a predetermined depth. In this case, the formed dividing groove 6 has a V-shape or the like. Has a cross-sectional shape substantially similar to the longitudinal cross-section of the blade.

【0019】また前記分割溝6は、通常、後の工程でセ
ラミック基板を分割溝に沿って容易に切断できるように
するために、生セラミック成形体4の外周縁まで達する
ようにして形成される。
The dividing groove 6 is usually formed so as to reach the outer peripheral edge of the green ceramic molded body 4 so that the ceramic substrate can be easily cut along the dividing groove in a later step. .

【0020】次に、前記生セラミック成形体4を、例え
ば、還元雰囲気中約1600℃の温度で焼成し、図1
(d)に示す如く、絶縁基体Bに所定パターンの配線導
体8が形成された配線基板9を多数有するとともに、各
配線基板9が分割溝6で区画されて成り、かつ前記分割
溝6直下(直上)の内部に所定条件の複数個の空洞部5
が上下に並んで配設されているセラミック基板7を得
る。
Next, the green ceramic molded body 4 is fired, for example, in a reducing atmosphere at a temperature of about 1600 ° C.
As shown in (d), the insulating substrate B has a large number of wiring boards 9 on which wiring conductors 8 of a predetermined pattern are formed, and each wiring board 9 is divided by the dividing grooves 6 and is directly below the dividing grooves 6 ( (Directly above) a plurality of hollow portions 5 under predetermined conditions
Are obtained to obtain a ceramic substrate 7 arranged vertically.

【0021】そして最後に、前記セラミック基板7を前
記分割溝6に沿って切断すれば、図1(e)に示す如
く、絶縁基体Bに所定パターンの配線導体8が被着形成
された個々の配線基板9が形成される。
Finally, when the ceramic substrate 7 is cut along the dividing grooves 6, each of the individual conductors having a predetermined pattern of the wiring conductors 8 attached to the insulating substrate B is formed as shown in FIG. The wiring board 9 is formed.

【0022】なお、前記セラミック基板7の切断は、分
割溝6に沿ってセラミック基板7を撓ませて分割溝6の
底部に曲げ応力を集中させ、分割溝6の底部に小さな亀
裂を生じさせるとともにこの亀裂をセラミック基板7の
内部に進行させることによって行われる。この場合、セ
ラミック基板7は分割溝6の直下領域の内部に、複数個
の空洞部5が上下に並んで形成されていることから亀裂
の進行方向は、曲げ応力が各空洞部5のそれぞれの上端
部および下端部に集中することにより、短い進行距離ご
とに逐次矯正されて常にセラミック基板7の分割溝6の
直下方向となり、その結果、セラミック基板7を分割溝
6に沿ってバリやカケ等を発生することなく確実、かつ
綺麗に切断することが可能となり、所定の配線導体8、
所定の外形寸法を有する配線基板9を一度に多数個形成
することができる。
The cutting of the ceramic substrate 7 deflects the ceramic substrate 7 along the dividing groove 6 to concentrate bending stress on the bottom of the dividing groove 6, thereby causing a small crack at the bottom of the dividing groove 6. The crack is formed by advancing the crack inside the ceramic substrate 7. In this case, since the plurality of cavities 5 are formed in the ceramic substrate 7 in the region immediately below the dividing groove 6 in a vertical direction, the bending direction is such that bending stress is applied to each of the cavities 5. By concentrating at the upper end and the lower end, it is sequentially corrected for each short traveling distance, and is always in a direction directly below the dividing groove 6 of the ceramic substrate 7. As a result, the ceramic substrate 7 is moved along the dividing groove 6 such as burrs and chips. Can be cut reliably and neatly without generating a predetermined wiring conductor 8,
A large number of wiring boards 9 having predetermined external dimensions can be formed at one time.

【0023】また、前記複数個の空洞部5は、上下方向
の内径の合計を分割溝6形成部位における絶縁基体1の
厚みに対する最適な大きさ、即ち、0.24×(t−c
1−c2)≦n・d≦0.38×(t−c1−c2)と
なるような範囲に特定するとともに、個々の上下方向の
内径の上限値を、d≦0.62×{1+log(c1/
w)}となるような範囲に特定したことから(ただし、
t:絶縁基体の厚み(mm)、c1:切断起点側の分割
溝6の深さ(mm)、c2:切断終点側の分割溝6の深
さ(mm)、w:分割溝6の最大開口幅(mm)、n:
空洞部5の個数、d:各空洞部5の上下方向の内径(m
m))、セラミック基板の分割溝形成部位の機械的強度
を良好に維持しつつ、分割溝に沿ってバリやカケ等を発
生することなく確実、かつ綺麗に切断することができ
る。
The plurality of cavities 5 have a total sum of the inner diameters in the vertical direction that is the optimum size for the thickness of the insulating substrate 1 at the portion where the division groove 6 is formed, that is, 0.24 × (t−c).
1−c2) ≦ n · d ≦ 0.38 × (t−c1−c2), and the upper limit of the inner diameter in the vertical direction is d ≦ 0.62 × {1 + log ( c1 /
w) Since it was specified in the range that な る (however,
t: thickness of the insulating base (mm), c1: depth (mm) of the dividing groove 6 on the starting point of cutting, c2: depth (mm) of the dividing groove 6 on the ending point of cutting, w: maximum opening of the dividing groove 6 Width (mm), n:
Number of cavities 5, d: vertical inner diameter of each cavity 5 (m
m)), while maintaining the mechanical strength of the divided groove forming portion of the ceramic substrate in good condition, it is possible to cut reliably and neatly without generating burrs and chips along the divided grooves.

【0024】なお、n・d<0.24×(t−c1−c
2)、即ち、空洞部5の上下方向の内径の合計が、分割
溝6形成部位における絶縁基体の厚みの24%未満とな
ると、亀裂の進行方向を良好に矯正することができず、
得られた配線基板9にバリやカケを生じてしまい、n・
d>0.36×(t−c1−c2)、即ち、空洞部5の
上下方向の内径の合計が、分割溝6形成部位における絶
縁基体の厚みの36%を超えるようになると、分割溝形
成部位における絶縁基体1の機械的強度が劣化し、搬
送、取扱いの際に加わる衝撃等により割れてしまう。従
って、前記空洞部5は、0.24×(t−c1−c2)
≦n・d≦0.38×(t−c1−c2)となるような
範囲とする必要がある。
Note that nd <0.24 × (t−c1−c)
2) In other words, if the total of the inner diameters of the hollow portion 5 in the vertical direction is less than 24% of the thickness of the insulating base at the portion where the division groove 6 is formed, it is not possible to satisfactorily correct the crack propagation direction,
Burrs and chips are generated on the obtained wiring board 9 and n.
When d> 0.36 × (t−c1−c2), that is, when the sum of the vertical inner diameters of the cavity portions 5 exceeds 36% of the thickness of the insulating base at the division groove 6 formation site, the division groove formation is performed. The mechanical strength of the insulating substrate 1 at the site is deteriorated, and the insulating substrate 1 is broken by an impact applied during transportation and handling. Therefore, the hollow portion 5 is 0.24 × (t−c1−c2).
≦ nd · 0.38 × (t−c1−c2).

【0025】また、個々の空洞部5の上下方向の内径d
を、d>0.62×{1+log(c1/w)}と大き
くした場合も、絶縁基体1の機械的強度が低下してしま
い、搬送、取扱いの際に加わる衝撃等により割れてしま
う。従って、前記空洞部5は、d≦0.62×{1+l
og(c1/w)}となるような範囲とする必要があ
る。
The vertical inner diameter d of each hollow portion 5
Is larger than d> 0.62 × {1 + log (c1 / w)}, the mechanical strength of the insulating substrate 1 is reduced, and the insulating substrate 1 is broken by an impact applied during transportation and handling. Therefore, the hollow part 5 is d ≦ 0.62 × {1 + 1
og (c1 / w)}.

【0026】更にまた、前記空洞部5は、それぞれ略円
柱状とするとともに分割溝6と上下に平行になるように
して形成しておくとセラミック基板7に撓みによる曲げ
応力を印加し、分割溝6に沿って切断する際、曲げ応力
を各空洞部の上端部および下端部に集中させ易くなって
亀裂の進行方向をより一層正確に分割線6の直下方向に
矯正させることができる。
Furthermore, if the cavity 5 is formed in a substantially columnar shape, and is formed so as to be vertically parallel to the dividing groove 6, a bending stress due to bending is applied to the ceramic substrate 7, and When cutting along the line 6, the bending stress can be easily concentrated on the upper end and the lower end of each cavity, so that the direction of progress of the crack can be corrected more accurately right below the dividing line 6.

【0027】かくして得られた配線基板9は、絶縁基体
Bの上面に半導体素子や容量素子、抵抗器等の電子部品
が搭載されるとともに各電子部品の電極が配線導体8に
電気的に接続され、これによって各電子部品はその各々
が配線導体8を介して互いに電気的に接続されるととも
に外部電気回路に接続されることとなる。なお本発明は
上述の実施例に限定されるものではなく、本発明の要旨
を逸脱しない範囲であれば種々の変更は可能であり、例
えば、上述の実施例では空洞部を3個形成したもので説
明したがセラミック基板7の厚み等に応じて空洞部を4
個以上形成してもよく、分割溝6を生セラミック成形体
4の上面または下面のみに形成したり、上下の分割溝6
の深さを異ならせたりしてもよい。
On the wiring board 9 thus obtained, electronic components such as semiconductor elements, capacitance elements and resistors are mounted on the upper surface of the insulating base B, and the electrodes of each electronic component are electrically connected to the wiring conductor 8. Thus, each of the electronic components is electrically connected to each other via the wiring conductor 8 and connected to an external electric circuit. It should be noted that the present invention is not limited to the above-described embodiment, and various modifications are possible without departing from the gist of the present invention. For example, in the above-described embodiment, three hollow portions are formed. As described in the above, the cavity is formed by 4 depending on the thickness of the ceramic substrate 7 or the like.
One or more divided grooves 6 may be formed on the upper or lower surface of the green ceramic molded body 4, or the upper and lower divided grooves 6 may be formed.
May be made different in depth.

【0028】[0028]

【発明の効果】本発明の配線基板の製造方法によれば、
セラミック基板に設けた分割溝の直下領域に位置する内
部に所定条件の複数個の空洞部を形成したことから、セ
ラミック基板に撓みによる曲げ応力を印加し、分割溝に
沿って切断する際、分割溝の底部に形成された小さな亀
裂の進行方向は、曲げ応力が各空洞部の上端部および下
端部に集中することにより逐次矯正されてセラミック基
板の分割溝の直下方向となり、その結果、セラミック基
板を分割溝に沿ってバリやカケ等を発生することなく確
実、かつ綺麗に切断することが可能となり、所定の配線
導体、所定の外形寸法を有する配線基板を一度に多数個
形成することができる。
According to the method of manufacturing a wiring board of the present invention,
Since a plurality of cavities under predetermined conditions are formed inside the region located immediately below the dividing groove provided in the ceramic substrate, bending stress due to bending is applied to the ceramic substrate, and when cutting along the dividing groove, the dividing is performed. The traveling direction of the small cracks formed at the bottom of the groove is gradually corrected by the bending stress being concentrated on the upper end and the lower end of each cavity, and is directed directly below the divided groove of the ceramic substrate. Can be cut reliably and neatly without generating burrs, chips, etc. along the dividing grooves, and a large number of wiring boards having predetermined wiring conductors and predetermined external dimensions can be formed at a time. .

【0029】また本発明の配線基板の製造方法によれ
ば、前記空洞部をセラミック基板の厚みに対する最適な
条件、即ち、0.24×(t−c1−c2)≦nd≦
0.38×(t−c1−c2)かつd≦0.62×{1
+log(c1/w)}(t:絶縁基体の厚み(m
m)、c1:切断起点側の分割溝の深さ(mm)、c
2:切断終点側の分割溝の深さ(mm)、w:分割溝の
最大開口幅(mm)、n:空洞部の個数、d:各空洞部
の上下方向の内径(mm))となるような範囲に特定し
たことから、セラミック基板の分割溝形成部位の機械的
強度を良好に維持しつつ、分割溝に沿ってバリやカケ等
を発生することなく確実、かつ綺麗に切断することが可
能で、所定の配線導体、所定の外形寸法を有する配線基
板を一度に多数個形成することができる。
Further, according to the method of manufacturing a wiring board of the present invention, the cavity is formed in an optimum condition for the thickness of the ceramic substrate, that is, 0.24 × (t−c1−c2) ≦ nd ≦.
0.38 × (t−c1−c2) and d ≦ 0.62 × {1
+ Log (c1 / w)} (t: thickness of insulating substrate (m
m), c1: Depth (mm) of the dividing groove on the cutting start side, c
2: the depth (mm) of the dividing groove on the cutting end point side, w: the maximum opening width (mm) of the dividing groove, n: the number of cavities, d: the vertical inner diameter (mm) of each cavity. From the specified range, the ceramic substrate can be cut reliably and neatly without generating burrs, chips, etc. along the dividing groove while maintaining good mechanical strength of the dividing groove forming portion of the ceramic substrate. It is possible to form a large number of wiring boards having predetermined wiring conductors and predetermined external dimensions at one time.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)乃至(e)は本発明の配線基板の製造方
法を説明するための工程毎の断面図である。
FIGS. 1A to 1E are cross-sectional views for explaining steps of a method for manufacturing a wiring board according to the present invention.

【符号の説明】[Explanation of symbols]

1・・・・セラミックグリーンシート 2・・・・凹部 3・・・・配線用導体 A・・・・絶縁基体となる領域 4・・・・生セラミック成形体 5・・・・空洞部 6・・・・分割溝 7・・・・セラミック基板 B・・・・絶縁基体 8・・・・配線導体 9・・・・配線基板 DESCRIPTION OF SYMBOLS 1 ... Ceramic green sheet 2 ... Depression 3 ... Wiring conductor A ... Area to be an insulating base 4 ... Green ceramic molded body 5 ... Cavity 6 ... ... Division groove 7 ... Ceramic substrate B ... Insulating substrate 8 ... Wiring conductor 9 ... Wiring board

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】(1)配線基板の絶縁基体となる領域を多
数有する広面積のセラミックグリーンシートを複数枚準
備するとともに、前記少なくとも1枚のセラミックグリ
ーンシートの各絶縁基体となる領域に配線用導体を被着
形成する工程と、(2)前記複数のセラミックグリーン
シートを上下に積層し、生セラミック成形体となす工程
と(3)前記生セラミック成形体の上面および/または
下面に分割溝を形成し、該分割溝によって前記絶縁基体
となる領域を区画する工程と、(4)前記分割溝が形成
された生セラミック成形体を焼成し、絶縁基体に配線導
体を形成した配線基板を多数有するセラミック基板を得
るとともに、該セラミック基板を前記分割溝に沿って曲
げ応力を加えることにより切断し、多数の配線基板を個
々に分割する工程、とを具備する配線基板の製造方法で
あって、前記セラミック基板は前記分割溝の直下領域の
内部に複数個の空洞部が上下に並んで、かつ下記式
(1)(2)を満足させるようにして形成されているこ
とを特徴とする配線基板の製造方法。 (式1)0.24×(t−c1−c2)≦n・d≦0.38×(t−c1−c2) (式2)d≦0.62×{1+log(c1/w)} ただし、 t:絶縁基体の厚み(mm) c1:切断起点側の分割溝の深さ(mm) c2:切断終点側の分割溝の深さ(mm) n:空洞部の個数 d:各空洞部の上下方向の内径
(1) A plurality of wide-area ceramic green sheets each having a large number of regions serving as insulating bases of a wiring board are prepared, and a wiring area is provided in each of the at least one ceramic green sheet as an insulating base. A step of applying and forming a conductor; (2) a step of laminating the plurality of ceramic green sheets up and down to form a green ceramic molded body; and (3) forming a dividing groove on an upper surface and / or a lower surface of the green ceramic molded body. Forming and dividing the region to be the insulating substrate by the dividing groove; and (4) firing a green ceramic molded body having the dividing groove formed thereon to form a large number of wiring substrates having wiring conductors formed on the insulating substrate. A step of obtaining a ceramic substrate, cutting the ceramic substrate by applying bending stress along the division groove, and dividing a large number of wiring substrates individually Wherein the ceramic substrate has a plurality of cavities vertically arranged inside a region immediately below the division groove and satisfies the following formulas (1) and (2). A method for manufacturing a wiring board, characterized by being formed as follows. (Equation 1) 0.24 × (t−c1−c2) ≦ nd · 0.33 × (t−c1−c2) (Equation 2) d ≦ 0.62 × {1 + log (c1 / w)} where T: Thickness of insulating substrate (mm) c1: Depth of dividing groove on cutting start side (mm) c2: Depth of dividing groove on cutting end point side (mm) n: Number of cavities d: Number of cavities Vertical inner diameter
【請求項2】前記複数個の空洞部は、それぞれ略円筒形
で、かつ前記分割溝と平行となるようにして形成されて
いることを特徴とする請求項1記載の配線基板の製造方
法。
2. The method according to claim 1, wherein the plurality of cavities are each formed in a substantially cylindrical shape and in parallel with the dividing groove.
JP2000150055A 2000-05-22 2000-05-22 Manufacturing method for wiring board Pending JP2001332857A (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
JP2000150055A JP2001332857A (en) 2000-05-22 2000-05-22 Manufacturing method for wiring board

Publications (1)

Publication Number Publication Date
JP2001332857A true JP2001332857A (en) 2001-11-30

Family

ID=18655826

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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JP2008016587A (en) * 2006-07-05 2008-01-24 Denso Corp Method of manufacturing ceramic laminated layer substrate
WO2008018227A1 (en) * 2006-08-07 2008-02-14 Murata Manufacturing Co., Ltd. Method of producing multilayer ceramic substrate
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JP2007294797A (en) * 2006-04-27 2007-11-08 Kyocera Corp Ceramic substrate, package for housing electronic component, electronic apparatus, and manufacturing method for them
JPWO2007138826A1 (en) * 2006-05-29 2009-10-01 株式会社村田製作所 Manufacturing method of ceramic multilayer substrate
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US8105453B2 (en) 2006-05-29 2012-01-31 Murata Manufacturing Co., Ltd. Method for producing multilayer ceramic substrate
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