JPH11176987A - High frequency power amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high frequency power amplifier which enables miniaturization and electrical characteristics to be adjusted easily with respect the dispersion of multilayered board characteristics with reduced manufacturing man- hours, thereby improving non-defective ratio of products, and is suited to the high volume production. SOLUTION: This amplifier comprises a multilayered board 22, having a ground electrode layer 23 beneath an uppermost insulation layer 22a, a strip line 26 which is formed on the board and electrically connected to a connection conductor leading a stripline 24 to the top face of the board 22, a power amplifier transistor 27 and chip components 28 which are mounted on the board 22 and electrically connected to the stripline 26, and a pad electrode 29 which is added to the stripline 26 on the board 22 and opposed to the ground electrode layer 23 via the uppermost insulation layer 22a. The pad electrode 29 is utilized for easy adjustment of the electrical characteristics.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency power amplifier for transmission used in a mobile communication device such as a mobile phone, and more particularly to a reduction in man-hours for manufacturing a product, an improvement in a non-defective product rate, and a reduction in size. The present invention relates to a high-frequency power amplifier described above.

[0002]

2. Description of the Related Art In recent years, there has been an increasing demand for miniaturization and weight reduction of semiconductor devices and electronic components used in mobile communication devices such as analog or digital cellular phones.

[0003] With the miniaturization, the occupied area of the drain line of the high-frequency power amplifying transistor conventionally formed on the substrate in the high-frequency power amplifier used in the transmission section cannot be ignored. Downsizing has been implemented by forming an inner layer.

In addition, the width and length of the microstrip line constituting the high-frequency circuit on the substrate of the high-frequency power amplifier vary from one production lot to another, and the electrical characteristics vary, thereby lowering the yield rate. In order to obtain the desired characteristics, change the capacitance value of the chip capacitors used for adjusting the electrical characteristics for each board lot, or prepare multiple mounting locations for the adjustment chip capacitors on the board in advance. It has been practiced to improve the non-defective product rate by mounting the semiconductor device at a desired mounting location.

Hereinafter, a conventional high frequency power amplifier will be described with reference to FIGS. 6 and 7. FIG. FIG. 6 is a plan view of a conventional high-frequency power amplifier 1, and FIG.
It is a sectional view taken on line -A '.

As shown in FIGS. 6 and 7, in a conventional high frequency power amplifier 1, a microstrip line 3 is formed on an upper surface of a multilayer substrate 2 made of a dielectric material. Chip components such as a chip capacitor 4, a chip resistor 5, and a trimmable resistor 6 are mounted and electrically connected to form an input matching circuit 7 and an output matching circuit 8.

Reference numeral 11 denotes a power amplifying transistor, and its drain line 9 has a length of about one quarter wavelength (about λ / 4) of a working frequency (about λ / 4) to prevent high frequency leakage, for example. This is a transmission line that uses an alumina ceramic substrate with a dielectric constant of about 9.6 and has a frequency of about 940 MHz and has a width of about 30 mm). Is provided with a ground electrode layer 10.

The power amplifying transistor 11 is mounted on a substrate with a bare chip using a silver paste or the like, and its electrodes are connected to electrode pads 13 on the multilayer substrate 2 by bonding wires 12 and further sealed by a sealing resin 14. ing. Further, in order to dissipate the heat generated by the power amplifying transistor 11, a large number of heat dissipating via conductors 15 for connecting the bottom surface of the transistor mounting portion and the back surface of the multilayer substrate 2 are provided.

In the high-frequency power amplifier 1 having such a configuration, there is a problem in that the line width and the line length of the microstrip line 3 vary from one production lot to another, resulting in variations in electrical characteristics. The influence of the variation of the microstrip line 3 constituting the circuit 8 is large.

[0010] Such a microstrip line 3 is usually formed by a printing technique, and if the printing accuracy is improved, the variation in characteristics can be reduced.
In practice, even with an accuracy of 20 to 30 μm, it is not possible to absorb the characteristic variation of each substrate lot. Therefore, in order to absorb the characteristic variation, it is desired to adjust the capacitance value of the chip capacitor 4 used for adjusting the electric characteristics for each substrate lot or to prepare a plurality of mounting electrodes 59 on the substrate in advance. The mounting position of the chip capacitor 3 for adjustment is changed by mounting the chip capacitor 3 at the mounting position where the characteristics are obtained, thereby changing the microstrip line 3.
By adjusting the line length, the deviation of the impedance of the output matching circuit 8 is corrected to absorb the characteristic variation,
The rate of non-defective products has been improved.

[0011]

However, in the conventional high-frequency power amplifier 1 having the above-described structure, only the drain line 9 is formed in an inner layer, so that the high-frequency power amplifier 1
In order to further reduce the size, the occupied area of the microstrip line 3 conventionally formed on the multilayer substrate 2 cannot be neglected. Therefore, a method of realizing the miniaturization by forming these layers as strip lines in the inner layer is also required. Can be considered. However, according to this method, the inductance component of the via conductor connecting the strip line to the electrode pad or the like on the upper surface of the multilayer substrate 2 and the distance between the upper and lower ground electrode layers sandwiching the strip line vary from manufacturing lot to manufacturing lot. There is a problem that the electrical characteristics vary.

In order to adjust the variation in the electric characteristics, it is necessary to change the capacitance value of the chip capacitor for adjustment as in the prior art. It is necessary to check and adjust the preceding input products, and to optimize the mounting position of the chip capacitors for adjustment for each production lot. Since it is necessary to determine the optimal capacitor value and mounting position for each lot, the number of manufacturing steps increases, the manufacturing process becomes complicated, and it is difficult to increase the non-defective product rate. There was a point. In addition, the chip capacitors for adjustment also need to have their capacitance values finely prepared in increments of, for example, 0.1 pF, which makes it difficult to manage their inventory, thereby increasing the number of man-hours for manufacturing products. Was.

The present invention has been made in view of the above circumstances, and an object of the present invention is to reduce the size of a multilayer substrate and easily adjust electric characteristics with respect to variations in characteristics of a multilayer substrate while reducing the number of manufacturing steps. It is an object of the present invention to provide a high-frequency power amplifier suitable for mass production, which can be carried out, thereby improving the non-defective rate as a product.

[0014]

A first high frequency power amplifier according to the present invention comprises a plurality of insulating layers mainly composed of glass, and a multilayer substrate having a ground electrode layer on the lower surface of the uppermost layer of the insulating layers. A microstrip line formed below the ground electrode layer in the multi-layer substrate, and a micro-connector formed on the multi-layer substrate and electrically connected to a connection conductor extending from the strip line to the upper surface of the multi-layer substrate. A strip line, a power amplifying transistor and a chip component mounted on the multilayer substrate and electrically connected to the microstrip line, and the insulating layer formed on the multilayer substrate in addition to the microstrip line. And a pad electrode opposed to the ground electrode layer via an uppermost layer.

The second high frequency power amplifier of the present invention comprises a plurality of insulating layers mainly composed of glass, a multilayer substrate having a ground electrode layer on the lower surface of the uppermost layer of the insulating layer, First and second strip lines formed below the ground electrode layer in the substrate and electrically connected to each other; and mounted on the multilayer substrate from the first strip line to the upper surface of the multilayer substrate. A power amplifying transistor electrically connected to the first connecting conductor to be derived; and a second connecting conductor mounted on the multilayer substrate and leading from the second strip line to the upper surface of the multilayer substrate. And a third connection conductor formed on the multilayer substrate and extending from the second strip line to the upper surface of the multilayer substrate. It is characterized in that it comprises a pad electrode which is opposed to the ground electrode layer via the uppermost layer of the insulating layer.

According to the high frequency power amplifier of the present invention, a drain bias line having a length of about a quarter wavelength (about λ / 4) of the power amplifying transistor is conventionally formed on the upper surface of the multilayer substrate. Instead of microstrip line,
Using a multilayer substrate consisting mainly of glass and forming a strip line inside the multilayer substrate, the drain bias line, which occupied a large surface area on the upper surface of the substrate, has been made into an internal layer inside the multilayer substrate. Therefore, the high-frequency power amplifier can be significantly reduced in size.

Further, since the drain bias line, which is a transmission line for high-frequency signals, is formed as a strip line inside the multilayer substrate, ground (ground) electrode layers exist above and below the signal lines of the transmission lines. Therefore, the configuration is less susceptible to the influence of electromagnetic noise entering the transmission line from the outside, and a configuration having good isolation characteristics is obtained. Furthermore, by arranging the ground electrode layers above and below the transmission line, which is a signal line, the magnetic field of the transmitted high-frequency signal is blocked between the ground electrode layers, so that the signal loss is reduced and the drain bias is reduced. The Q characteristic is improved as compared with the case where the line is formed by a microstrip line on the upper surface of the multilayer substrate (for example, from around 70).
About 90).

According to the first high frequency power amplifier of the present invention, a circuit is connected in parallel to an output matching circuit and an input matching circuit microstrip line composed of microstrip lines and chip components on the upper surface of the multilayer substrate. Since the pad electrode is added, a capacitor is formed between the pad electrode and a ground electrode layer inside the multilayer substrate facing the upper electrode through the uppermost layer of the insulating layer. The capacitance value can be changed by selectively cutting or cutting using a router or the like to change the capacitance value. In addition, by adding a plurality of such pad electrodes, the length of the microstrip line can be adjusted by selectively cutting the connection between the pad electrode and the microstrip line with a laser or a router. Therefore, by combining these, the electrical characteristics of the output matching circuit and the input matching circuit can be easily adjusted to the desired electrical characteristics even after assembling the product, and the electrical characteristics due to the variation among the production lots of the multilayer substrate are obtained. The high-frequency power amplifier can easily adjust the variation in characteristics after assembling the product.

According to the second high-frequency power amplifier of the present invention, the output matching circuit and the input matching circuit are constituted by the strip line formed inside the multilayer substrate and the chip component mounted on the upper surface of the substrate, thereby achieving the micro Since it is possible to further reduce the size as compared with the case of using a strip line, a pad electrode connected to the strip line in parallel with the circuit is formed on the upper surface of the substrate and added. A capacitor is formed between this and the ground electrode layer inside the multilayer substrate which is opposed via the uppermost layer of the insulating layer, and the electrical characteristics of the output matching circuit and the input matching circuit are similar to the first high frequency power amplifier. And the like can be easily adjusted to the desired electrical characteristics even after the product is assembled. The high-frequency power amplifier can be easily adjusted to variations in the sex after assembly of the product.

As described above, according to the high-frequency power amplifier of the present invention, as in the prior art, constants are determined for each production lot of a multilayer substrate, and sorted products such as chip capacitors and chip resistors that are sorted in fine units of 0.1 pF. Since the process to use is unnecessary and the electric characteristics can be adjusted by using a normal chip capacitor or the like, it is possible to reduce the number of manufacturing steps and the material cost, and also to reduce the cost as a product. The non-defective rate can also be improved.

Further, it is not necessary to change the mounting position of the chip capacitor or the like for each production lot of the multilayer substrate, so that the production process is simplified, so that there is no need for so-called advance confirmation, and the number of production steps can be reduced. At the same time, the non-defective rate as a product can be improved.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings. The following is merely an illustration of the present invention, and the present invention is not limited thereto, and various changes and improvements may be made without departing from the spirit of the present invention.

FIG. 1 is a sectional view similar to FIG. 7 showing an embodiment of a first high-frequency power amplifier according to the present invention, and FIG. 2 is an external view showing a state of an upper surface of the power amplifier with its case removed. It is a perspective view. In the high-frequency power amplifier 21 shown in these figures, reference numeral 22 denotes a multilayer substrate formed by laminating a plurality of insulating layers mainly composed of glass, and reference numeral 23 denotes a lower surface of the uppermost layer 22a of the insulating layers of the multilayer substrate 22. Ground electrode layer formed, 24
Is a strip line formed below the ground electrode layer 23 in the multilayer substrate 22, and 25 is a strip line
A connection conductor led out over the upper surface of the microstrip line formed on the multilayer substrate 22 and electrically connected to the connection conductor 25; 27 is mounted on the multilayer substrate 22 and electrically connected to the microstrip line 26 The power amplifying transistor 28 is mounted on the multilayer substrate 22 and chip components such as chip resistors and chip capacitors electrically connected to the microstrip line 26, and 29 is added to the microstrip line 26 on the multilayer substrate 22 The uppermost layer 22a of the insulating layer formed
The pad electrode is opposed to the ground electrode layer 23 through the pad. A capacitor is formed by the pad electrode 29 and the ground electrode layer 23 in the multilayer substrate 22 opposed to the pad electrode 29 via the uppermost layer 22a of the insulating layer. By changing the area of the pad electrode 29 on the upper surface of the multilayer substrate 22 by using a laser, a leuter, or the like, the capacitance value of a capacitor formed between the ground electrode layer 23 and the opposing ground electrode layer 23 can be changed. The output matching circuit or the input matching circuit formed by the line 26 and the chip component 28 can be adjusted to a desired electric characteristic, whereby the characteristic variation due to the variation of each production lot of the multilayer substrate 22 can be reduced. It can be adjusted while reducing the amount.

A bonding wire 30 connects each electrode (source / gate / drain) of the power amplifying transistor 27 and a strip line 24 as a drain bias line via a connection conductor 25 (for example, to the connection conductor 25). It is electrically connected (bonded to a conductor layer or the like which is electrically connected to the microstrip line 26 and is at least partially exposed on the upper surface of the multilayer substrate 22).

In this embodiment, the power amplifying transistor 27 is fixed to the mounting cavity 31 on the multilayer substrate 22 with a resin or solder-based connection paste 32 and sealed with a sealing resin 33. The cavity 31 has a depth of 0.3 mm in a stepwise manner in accordance with the size of the power amplifying transistor 27, for example, by stacking several layers of sheets on the upper surface side of the multilayer substrate 22 with openings having a predetermined shape. It is formed in the degree. Reference numeral 34 denotes a heat dissipation via conductor formed inside the multilayer substrate 22 below the power amplification transistor 27.

In the high-frequency power amplifier 21 of this embodiment, a strip line 24 as a drain bias line is provided.
Is formed between the upper and lower ground electrode layers 35 and 36 below the ground electrode layer 23. Stripline 24
Alternatively, the ground electrode layer 23 may be formed as an inner layer as an upper ground electrode layer.

Reference numeral 37 denotes a case. After the power amplifying transistor 27 and the chip component 28 are mounted on the multilayer substrate 22 and mounted thereon, a sealing resin or the like (not shown) is coated so as to cover the upper surface of the multilayer substrate 22. This completes the high-frequency power amplifier 21 and electrically connects to the connection lands of the external electric circuit through terminal electrodes 38 formed by using castellations on the upper surface periphery and side surfaces of the multilayer substrate 22. Connected to.

A conductor layer, a ground electrode layer 36 and the like may be extended from the terminal electrode 38 on the lower surface or the upper surface of the multilayer substrate 22 as required. Electrical connection with the connection land on the circuit board can be made more reliable.

The multilayer substrate 22 is a so-called low-temperature fired multilayer substrate containing glass as a main component. For example, an internal wiring pattern is printed on a green sheet of glass ceramics or the like having a thickness of about 0.14 to 0.16 mm, or a through hole or a via hole is formed. A laminate obtained by laminating a plurality of layers and firing the resultant is used, and those having an effective relative dielectric constant of about 8.1 are preferably used.

The strip line 24, the microstrip line 26, the ground electrode layers 23, 35, and 36 are formed by printing, for example, an Ag-based conductive paste on a green sheet of the multilayer substrate 22 before firing in a desired pattern, and simultaneously firing the paste. By doing so, it is formed inside the multilayer substrate 22 and on the front surface or the back surface. The thickness is set to, for example, about 10 to 20 μm according to desired transmission characteristics.

The connection conductor 25 is formed to extend from the strip line 24 to the upper surface of the multilayer substrate 22 so as to connect the strip line 24 and the microstrip line 26, and to connect the strip line 24 with the power amplification transistor 27 and the chip component 28.
Any of various shapes and structures can be used as long as they electrically connect to the substrate. For example, a method such as plating or printing and sintering of a conductive paste on the inside of a through hole provided in the multilayer substrate 22 can be used. Via holes formed by applying a conductive metal mainly composed of Ag or the like, or via holes filled with the conductive metal by a method such as printing and sintering of a conductive paste inside the through holes. Conductor),
The through-holes and via holes may have various cross-sectional shapes such as elliptical shapes, rectangular shapes, polygonal shapes, and plate shapes instead of circular shapes.

As the power amplifying transistor 27, for example, a high-frequency power amplifying FET (field effect transistor)
Is mounted in the cavity 31 and Au / Si
It is fixed and electrically connected by a connection paste 32 as a die attach material such as solder or Ag paste, and is led out to the upper surface of the multilayer substrate 22 by a bonding wire 30 made of Au or the like and having a thickness of about 25 μm. It is electrically connected to the strip line 24 and the microstrip line 26 via the connected connection conductor 25 or a conductor layer extended from the connection conductor 25.

As the chip component 28, a surface mount type chip resistor, chip capacitor or the like generally used as a circuit of the high frequency power amplifier 21 is used.

In order to form the terminal electrode 38, the end of each green sheet is placed at a desired position on the multilayer substrate 22 according to the circuit arrangement of the external circuit board on which the high-frequency power amplifier 21 is mounted. A notch having a depth of about 0.8 mm and a depth of about 0.6 to 0.8 mm is formed to form a recess to form a castellation.
May be formed in the recesses (side surfaces) by printing and baking the above-mentioned conductive paste or by metallizing.

The heat dissipating via conductor 34 may be the same as the via conductor as the connection conductor 25 described above, and the multilayer substrate 22 is removed from the cavity 31 at the mounting position of the power amplifying transistor 27 from the cavity 31. The heat generation from the power amplifying transistor 27 is conducted to the external circuit base via the conductor layer 36 serving as the ground electrode layer on the back surface of the multilayer substrate 22 to radiate heat.

The heat dissipating via conductor 34 is provided below the power amplification transistor 27 as shown in FIG.
The same number may be arranged from the top to the bottom of 22,
It may be arranged such that the number thereof is sequentially increased from below the power amplifying transistor 27 to the lower surface of the multilayer substrate 22 in accordance with diffusion of heat from the power amplifying transistor 27.

Further, since the heat dissipating property is improved as many heat dissipating via conductors 34 as possible are provided, the heat dissipating can be efficiently performed by disposing the via conductors 34 in a staggered shape so that the largest number can be set within the same area. It is preferable to be able to do so.

Next, the adjustment of electric characteristics by the pad electrode 29 for characteristic adjustment will be described in detail. FIG. 3 is an equivalent circuit diagram showing a circuit configuration of an output matching circuit section including the microstrip line 26, the chip component 28, the pad electrode 29, the ground electrode layer 23, and the like in the high-frequency power amplifier 21, and FIGS. The same parts as those in FIG. 2 are denoted by the same reference numerals.

In FIG. 3, C _{1 to} C ₄ are pad electrodes 29
Is a pattern capacitor formed by facing the ground electrode layer 23 via the uppermost layer 22a of the insulating layer.

When the width and length of the strip line 24 and the distance between the strip line 24 and the ground electrode layers 35 and 36 sandwiching the strip line 24 from above and below via an insulating layer change depending on the manufacturing lot of the multilayer substrate 22, the high frequency power amplifier is used. In the 21 electrical characteristics, the adjacent channel leakage power characteristics, current consumption characteristics, output power, and the like vary. Therefore, in order to absorb and adjust these variations, the pattern capacitor C formed by the pad electrode 29 and the ground electrode layer 23 added to the microstrip line 26 in a circuit parallel with the strip line 24.
_{1 to} C ₄ and the pattern capacitors C
Adjusting the electrical characteristics by adjusting the presence or absence of connection ₁ -C _4. For example, in order to cope with variations in ACP (adjacent channel leakage power) characteristics due to variations in the length of the strip line 24, the connection between the microstrip line 26 and the pad electrode 29 is selectively formed using a laser or a router. By cutting, the connection of the pad electrode 29 is lost and the microstrip line 26 is lengthened and its length is adjusted, so that the output matching impedance can be adjusted. Similarly, in order to cope with the suppression of the variation in the ACP characteristics, the area formed by the pad electrode 29 is changed by selectively shaving or cutting the area of the pad electrode 29 by using a laser or a router. By changing the value, the output matching impedance can be adjusted.

Next, a second high frequency power amplifier according to the present invention will be described with reference to FIGS. FIG. 4 is a sectional view similar to FIG. 1 showing an embodiment of the second high-frequency power amplifier according to the present invention, and FIG. 5 is a view similar to FIG. It is an external appearance perspective view of.

In the high-frequency power amplifier 41 shown in FIGS. 4 and 5, reference numeral 42 denotes a multilayer substrate formed by laminating a plurality of insulating layers mainly composed of glass, and reference numeral 43 denotes the uppermost insulating layer of the multilayer substrate 42. A ground electrode layer 44 formed on the lower surface of the upper layer 42a;
Is a first strip line formed below the ground electrode layer 43 in the multilayer substrate 42, 45 is a first connection conductor derived from the first strip line 44 to the upper surface of the multilayer substrate 42, 46 is a multilayer substrate A second strip line 47 formed inside 42 and electrically connected to the first strip line 44 is mounted on the multi-layer substrate 42 and electrically connected to the first connection conductor 45. Transistor 48 is a second connection conductor led out from the second strip line 46 to the upper surface of the multilayer substrate 42, and 49 is a second connection conductor mounted on the multilayer substrate 42
A chip component such as a chip resistor or a chip capacitor electrically connected to a second connection conductor 48 derived from the strip line 46 of the first embodiment is shown in FIG.
A third connection conductor 51 led out to the upper surface of 42 is formed on the multilayer substrate 42, is electrically connected to the third connection conductor 50, and faces the ground electrode layer 43 via the uppermost layer 42a of the insulating layer. This is the pad electrode. A capacitor is formed by the pad electrode 51 and the ground electrode layer 43 in the multilayer substrate 42 opposed to the pad electrode 51 via the uppermost layer 42a of the insulating layer. By changing the area of the pad electrode 51 on the upper surface of the multilayer substrate 42 by using a laser, a router, or the like, the capacitance value of the capacitor formed between the ground electrode layer 43 and the opposing ground electrode layer 43 can be changed. The output matching circuit or the input matching circuit constituted by the strip line 46 and the chip component 49 can be adjusted to desired electric characteristics,
As a result, it is possible to adjust the characteristic variation due to the variation of each production lot of the multilayer substrate 42 while reducing the number of manufacturing steps.

Reference numeral 52 denotes a bonding wire, which connects each electrode (source / gate / drain) of the power amplifying transistor 47 and the first strip line 44 as a drain bias line via a first connection conductor 45. (For example, first
Electrically connected to a conductor layer or the like which is electrically connected to the second strip line 46 and which is connected to the connection conductor 45 and at least a part of which is exposed on the upper surface of the multilayer substrate 42. I have.

In this embodiment, the power amplifying transistor 47 is fixed to the mounting cavity 53 on the multilayer substrate 42 with a resin or solder connection paste 54 and is sealed with a sealing resin 55. Note that the cavity 53 is formed in the same manner as the cavity 31 described above. Reference numeral 56 denotes a heat dissipating via conductor formed inside the multilayer substrate 42 below the power amplifying transistor 47.

In the high frequency power amplifier 41 of the present embodiment, the first strip line 44 as a drain bias line is formed below the ground electrode layer 43 and between the upper and lower ground electrode layers 57 and 58. ing. The first strip line 44 may also be formed as an inner layer with the ground electrode layer 43 as the upper ground electrode layer, similarly to the above-described strip line 24.

In the present embodiment, the second strip line 46 is also formed with the ground electrode layer 43 as the upper ground electrode layer. However, like the first strip line 44, another ground electrode layer 57 is formed on the second strip line 46. The first strip line 44 and the second strip line 46 may be formed in the same layer to form an inner layer.

Reference numeral 59 denotes a case. After the power amplifying transistor 47 and the chip component 49 are mounted and mounted on the multilayer substrate 42, a sealing resin or the like (not shown) is coated so as to cover the upper surface of the multilayer substrate 42. This completes the high-frequency power amplifier 41, and electrically connects to the connection lands of the external electric circuit through the terminal electrodes 60 formed by using castellations around the upper surface and side surfaces of the multilayer substrate 42. Connected to.

Note that a conductor layer, a ground electrode layer 58 and the like may be provided on the lower surface or the upper surface of the multilayer substrate 42 from the terminal electrode 60 if desired.

The multilayer substrate 42 is similar to the multilayer substrate 22 described above.
The first strip line 44, the second strip line 46, the ground electrode layers 43, 57, 58, etc.
The first connection conductor 45, the second connection conductor 48, and the third connection conductor 50 are the same as the first connection conductor, similarly to the strip line 24, the microstrip line 26, and the ground electrode layers 23, 35, and 36 of FIG. Similarly to the terminal electrode 45, the terminal electrode 60 may be formed in the same manner as the terminal electrode 38 described above, and the heat dissipation via conductor 56 may be formed in the same manner as the heat dissipation via conductor 34 described above.

The power amplifying transistor 47 is mounted in the cavity 53 and fixed and electrically connected by the connection paste 54 as a die attach material. It is electrically connected to the first strip line 44 and the second strip line 46 via the first connection conductor 45 led out to the upper surface or a conductor layer extended therefrom.

With the pad electrode 51 for characteristic adjustment formed in this way, the characteristic can be easily adjusted similarly to the pad electrode 29 described above.
In FIG. 41, an equivalent circuit diagram showing the circuit configuration of the output matching circuit section composed of the second strip line 46, the chip component 49, the pad electrode 51, the ground electrode layer 43, and the like is the same as FIG. It is the same as described above. In FIG. 3, reference numerals corresponding to each part of the high-frequency power amplifier 41 are also given.

As described above, according to the high frequency power amplifiers 21 and 41 of the present invention, the power amplifiers 21 and 41 are formed on the multilayer substrates 22 and 42, and are grounded via the uppermost layers 22a and 42a of the insulating layers of the multilayer substrates 22 and 42. the combination of the selection of the electrode layers 23, 43 and adjustment of the opposing capacitance value of the pattern capacitor C ₁ -C ₄ by the pad electrode 29, 51 and pattern the capacitor C ₁ -C ₄ connection, high-frequency power amplifier 21, 41 Even after assembling, it is possible to easily absorb and adjust the characteristic variation of each production lot of the multilayer substrates 22 and 42.

[0053]

As described above, according to the high-frequency power amplifier of the present invention, the drain bias line of the power amplifying transistor is formed as an inner layer by forming a strip line inside the multilayer substrate, so that the size of the substrate can be greatly increased. The size of the power amplifier for high frequency can be reduced significantly, and the drain bias line is stripped and the inner layer is formed on the multilayer substrate. As a result, the Q characteristic can be improved as compared with the case where the microstrip line is used.

According to the first high-frequency power amplifier of the present invention, a circuit is connected in parallel to the microstrip line of the output matching circuit or the input matching circuit formed by the microstrip line and the chip component on the upper surface of the multilayer substrate. Since the pad electrode is added, a pattern capacitor is formed between the pad electrode and a ground electrode layer inside the multilayer substrate opposed to the pad electrode via the uppermost layer of the insulating layer,
By selectively shaving or cutting the area of the pad electrode using a laser, a luter, or the like, the capacitance value of the pattern capacitor can be changed. The length of the microstrip line can be adjusted by selectively cutting the connection between the microstrip line and a microstrip line using a laser or a router, etc. The electrical characteristics and the like of the circuit can be easily adjusted to the desired electrical characteristics even after the product is assembled.

According to the second high-frequency power amplifier of the present invention, the output matching circuit and the input matching circuit are constituted by the strip line formed inside the multilayer substrate and the chip component mounted on the upper surface of the substrate, thereby achieving the micro Since it is possible to further reduce the size as compared with the case of using a strip line, a pad electrode connected to the strip line in parallel with the circuit is formed on the upper surface of the substrate and added. A pattern capacitor is formed between this and a ground electrode layer inside the multilayer substrate which is opposed via the uppermost layer of the insulating layer, and similarly to the first high frequency power amplifier, the electrical characteristics of the output matching circuit and the input matching circuit are formed. Characteristics can be easily adjusted to the desired electrical characteristics even after the product is assembled. The high-frequency power amplifier can be easily adjusted variation in electrical characteristics that after assembly of the product.

As described above, according to the present invention, further miniaturization is possible, and it is possible to easily adjust the electric characteristics with respect to the variation of the characteristics of the multilayer substrate for each manufacturing lot while reducing the number of manufacturing steps. A high-frequency power amplifier suitable for mass production, which can improve the non-defective product rate, can be provided.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an example of an embodiment of a first high-frequency power amplifier of the present invention.

FIG. 2 is an external perspective view showing a state of an upper surface of the high-frequency power amplifier shown in FIG. 1 with a case removed.

FIG. 3 is a sectional view showing an example of an embodiment of a second high-frequency power amplifier according to the present invention.

4 is an external perspective view showing a state of an upper surface of the high-frequency power amplifier shown in FIG. 3 with a case removed.

FIG. 5 is an equivalent circuit diagram showing a circuit configuration of an output matching circuit in an example of the high-frequency power amplifier according to the embodiment of the present invention;

FIG. 6 is a plan view showing an example of a conventional high-frequency power amplifier.

FIG. 7 is a sectional view taken along line A-A ′ of FIG. 6;

[Explanation of symbols]

 21, 41 ... High frequency power amplifier 22, 42 ... Multilayer substrate 22a, 42a ... Top layer of insulating layer 23, 43 ... Ground electrode layer 24 ... ..Strip line 44... First strip line 46... Second strip line 25... Connection conductor 45. Connection conductors 48: Second connection conductors 50: Third connection conductors 26: Microstrip lines 27, 47 ... Power amplification Transistors 28, 49 ... chip parts 29, 51 ... pad electrodes

Claims (2)

[Claims] 1. A multilayer substrate comprising a plurality of insulating layers mainly composed of glass, having a ground electrode layer on the lower surface of the uppermost layer of the insulating layer, and formed below the ground electrode layer in the multilayer substrate. And a microstrip line formed on the multilayer substrate and electrically connected to a connection conductor derived from the strip line to the upper surface of the multilayer substrate, and a microstrip line mounted on the multilayer substrate. A power amplification transistor and a chip component electrically connected to each other, and a pad electrode formed on the multilayer substrate in addition to the microstrip line and facing the ground electrode layer via an uppermost layer of the insulating layer. A high-frequency power amplifier, comprising: 2. A multilayer substrate comprising a plurality of insulating layers mainly composed of glass, having a ground electrode layer on the lower surface of the uppermost layer of the insulating layer, and formed below the ground electrode layer in the multilayer substrate. First and second strip lines electrically connected to each other, and electrically connected to a first connection conductor mounted on the multilayer substrate and led out from the first strip line to the upper surface of the multilayer substrate. The power amplifying transistor, and the second
A chip component electrically connected to a second connection conductor extending from the strip line to the upper surface of the multilayer substrate; and a chip component formed on the multilayer substrate and extending from the second strip line to the upper surface of the multilayer substrate. A high-frequency power amplifier, comprising: a pad electrode electrically connected to a third connection conductor and facing the ground electrode layer via an uppermost layer of the insulating layer.