JPH11145303A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, in which characteristics fluctuations of a first MOS transistor is eliminated by eliminating etching residuals of polysilicon for a second a gate electrode MOS transistor electrode that are remained on the sidewall of the first the gate electrode MOS transistor. SOLUTION: A polysilicon film is grown on a major surface of the same semiconductor substrate 1 for forming the gate electrode of a first MOS transistor and is removed in areas other than a specified region to form a polysilicon gate electrode 7 for the first MOS transistor. Then, after an insulating film 9 has been so formed as to cover at least the sidewalls of the polysilicon gate of the first MOS transistor, a polysilicon gate electrode 13 for a second MOS transistor is formed in a region on the semiconductor substrate 1 outside the region, where the first MOS transistor is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to two types of M transistors, a high breakdown voltage transistor and a low breakdown voltage transistor, on the same semiconductor substrate.
OS (metal-oxide semiconductor)
The present invention relates to a method for manufacturing a semiconductor device in which a transistor is formed in a series of steps.

[0002]

2. Description of the Related Art A conventional method for manufacturing a semiconductor device will be described below. 21 to 29 show cross-sectional structures of a conventional n-type semiconductor device. As shown in FIG. 21, a p-type well 2 is formed on a p-type semiconductor substrate 1 by boron implantation and heat treatment, and a field oxide film 3 is formed to form an element isolation region. Boron implantation for channel doping (FIG. 2)
2). Next, a first gate oxide film 5 is formed, and a polysilicon film 6 is grown on the entire surface (FIG. 23). Thereafter, portions other than the first polysilicon electrode portion are removed by dry etching to form a first polysilicon gate electrode 7 (FIG. 2).
4). Further, boron ions are implanted into the second MOS transistor region for channel doping (FIG. 25).
A second gate oxide film 11 is formed, and a second polysilicon film 12 is grown on the entire surface (FIG. 26). Thereafter, portions other than the second polysilicon electrode portion are removed by dry etching to form a second polysilicon gate electrode 13 (FIG. 27). Next, LDD (lightly
A doped domain (implanted) region 19 is formed, for example, TEOS (Tetra ethyl oxy si).
(lane) An oxide film is grown, and a spacer 15 is formed at the edge of the gate electrode by etching the entire surface.
8). Next, source / drain arsenic implantation is performed using the spacer as a mask to form a source / drain implantation region 16 and a transistor is formed (FIG. 29). After that, wiring is formed by a general CMOS (complementary MOS) process.

[0003]

However, in such a conventional method of manufacturing a semiconductor device, an etching residue 18 of the second polysilicon is generated around the edge of the first polysilicon gate electrode 7. As a result, since the polysilicon is conductive, the etching residue comes into contact with the source / drain Al wiring, and in some cases, leaks to the source / drain wiring part of the adjacent transistor constituted by one common polysilicon gate electrode. Occurs, or if the polysilicon remaining at the edge of the gate electrode comes into contact with the gate electrode, the remaining portion of the etching becomes the same potential as the gate electrode, and the apparent gate length of the transistor becomes longer. Is changed.

An object of the present invention is to provide a method of manufacturing a semiconductor device in which after forming a first polysilicon electrode, there is no etching residue of a second polysilicon around the edge of the first polysilicon electrode.

[0005]

In order to solve the above-mentioned problems, a method of manufacturing a semiconductor device according to the present invention comprises growing a polysilicon film serving as a gate electrode of a first MOS transistor on a main surface of the same semiconductor substrate. Forming a first polysilicon gate electrode by selectively removing other portions while leaving a predetermined portion of the polysilicon film, and insulating at least a side wall of the first polysilicon gate electrode. Forming a film; and forming the first MOS on the semiconductor substrate.
In a region other than the transistor formation region, the second M
Forming a gate electrode of the OS transistor.

Further, a method of manufacturing a semiconductor device according to the present invention
A polysilicon film to be a gate electrode of a first MOS transistor is grown on a main surface of the same semiconductor substrate, and other portions are selectively removed except for a predetermined portion of the polysilicon film to form a first polysilicon film. Forming a gate electrode;
Spin coating a glass material having fluidity at room temperature on at least a side wall of the first polysilicon gate electrode, and removing a glass material on a region other than the side wall in the first polysilicon gate electrode. By
Forming an insulating film covering at least a side wall of the first polysilicon gate electrode; and forming a gate electrode of the second MOS transistor on a region other than the formation region of the first MOS transistor on the semiconductor substrate. And forming.

Further, according to the method of manufacturing a semiconductor device of the present invention, a polysilicon film serving as a gate electrode of a first MOS transistor is grown on a main surface of the same semiconductor substrate, and a predetermined portion of the polysilicon film is left. Forming a first polysilicon gate electrode by selectively removing other portions, and growing an oxide film on the entire surface of the semiconductor substrate, at least on a side wall of the first polysilicon gate electrode;
Forming an insulating film covering at least a side wall of the first polysilicon gate electrode by etching the entire surface and removing the entire surface; and forming an insulating film on the semiconductor substrate in a region other than a region where the first MOS transistor is formed. Forming a gate electrode of the second MOS transistor.

In the method of manufacturing a semiconductor device according to the present invention, the step at the edge of the first polysilicon electrode is reduced by forming an insulating spacer around the edge of the first polysilicon electrode. By adopting a manufacturing method in which the second polysilicon is not left after etching, a semiconductor device free from leakage and characteristic fluctuation can be obtained.

In the method of manufacturing a semiconductor device according to the present invention, after forming the first polysilicon electrode, for example, inorganic SOG (Spin) is used as a glass material having fluidity at room temperature.
OnGlass) is spin-coated to form an oxide film around the edge, or after forming the first polysilicon electrode, a TEOS oxide film is grown as an oxide film, for example, and then the entire periphery is etched by etching. The formation of the sidewalls has an effect that no etching residue occurs around the edge of the first polysilicon electrode when the second polysilicon is etched.

[0010]

An embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1 to 10 are sectional structural views for explaining a first embodiment of a method of manufacturing a semiconductor device according to the present invention.

As shown in FIG. 1, a p-type well 2 is formed on a p-type semiconductor substrate 1 by boron implantation and heat treatment.
Further, after forming an element isolation region by forming a field oxide film 3, a first channel doped region 4 is formed in the first MOS transistor region by boron implantation (FIG. 2). Next, a first gate oxide film 5 is grown,
A first polysilicon film 6 is grown on the entire surface of the semiconductor substrate (FIG. 3). Next, portions other than the first polysilicon gate electrode portion are removed by dry etching to form a first polysilicon gate electrode 7 (FIG. 4). Next, phosphorus is implanted into the first MOS transistor region to form the first LDD.
An implantation region 8 is formed (FIG. 5). Next, a glass material 9 (for example, inorganic SOG) which is fluid at room temperature is spin-coated on the entire surface of the semiconductor substrate, an oxide film is formed on the side wall of the first polysilicon gate electrode 7, and vitrified by heat treatment (FIG. 6). . Next, boron is again implanted into the second MOS transistor region to form a second channel doped region 10 (FIG. 7). Next, the silicon surface in the second transistor region is exposed by dry etching of the oxide film on the entire surface of the semiconductor substrate, a second gate oxide film 11 is grown, and a second polysilicon film 12 is grown on the entire semiconductor substrate (FIG. 8). Next, the second polysilicon film 1 is formed under general dry etching conditions except for the second polysilicon gate electrode portion.
2 is removed by dry etching, a second polysilicon gate electrode 13 is formed, and a second LDD implantation region 14 is formed in the second MOS transistor region by phosphorus implantation (FIG. 9). Next, a TEOS oxide film is grown, and spacers 1 are formed on the edges of the first polysilicon gate electrode 7 and the second polysilicon gate electrode 13 by etching the entire surface.
5 is formed, arsenic is implanted using the spacer 15 as a mask, and a source / drain implantation region 16 is formed.
0). Thereafter, a wiring process is performed by a general CMOS process, and the diffusion process is completed.

FIGS. 11 to 20 are sectional structural views of a second embodiment of the method of manufacturing a semiconductor device according to the present invention.

As shown in FIG. 11, a p-type well 2 is formed on a p-type semiconductor substrate 1 by boron implantation and heat treatment.
Further, after forming an element isolation region by forming a field oxide film 3, a first channel doped region 4 is formed in the first CMOS transistor region by boron implantation (FIG. 12). Next, a first gate oxide film 5 is grown, and a first polysilicon film 6 is grown on the entire surface of the semiconductor substrate (FIG. 13). Next, portions other than the first polysilicon gate electrode portion are removed by dry etching to form a first polysilicon gate electrode 7 (FIG. 14). Then the first M
The first LDD implantation region 8 is formed by implanting phosphorus into the OS transistor region (FIG. 15). Next, a TEOS oxide film is formed on the entire surface of the semiconductor substrate, and the entire surface of the semiconductor substrate is etched. Thus, spacers 17 are formed on the side walls of the first polysilicon gate electrode 7 (FIG. 16). Next, boron is again implanted into the second MOS transistor region to form the second channel doped region 10 (FIG. 17).
Next, a second gate oxide film 11 is grown, and a second polysilicon film 12 is grown on the entire surface of the semiconductor substrate (FIG. 1).
8). Next, portions other than the second polysilicon gate electrode portion are removed by dry etching under general dry etching conditions for the second polysilicon to form a second polysilicon gate electrode 13 and to cover the second MOS transistor region. The second LDD implantation region 14 is formed by phosphorus implantation (FIG. 19). Next, a TEOS oxide film is grown on the entire surface, a spacer 15 is formed on the edge of the second polysilicon gate electrode 13 by etching the entire surface, arsenic is implanted using the spacer 15 as a mask, and a source / drain region 16 is formed. (FIG. 20). Thereafter, a wiring process is performed by a general CMOS process, and the diffusion process is completed.

In the semiconductor device thus formed, an insulator is formed in advance on the side wall of the first polysilicon gate electrode 7 so as to reduce the step on the side wall and to dry the second polysilicon gate electrode 13. When formed by etching,
The structure is such that no etching residue of the second polysilicon film 12 occurs below the side wall of the first polysilicon gate electrode 6. Therefore, leakage to the source / drain and variation in the characteristics of the transistor via the remaining portion of the etching do not occur. Furthermore, the dry etching condition of the second polysilicon film 12 can adopt the general condition of the second polysilicon. Further, the insulating spacer (glass material 9 or spacer 17) in the present invention can be removed after the second polysilicon gate electrode 13 is formed by dry etching.

Although an n-type MOS transistor has been described in this embodiment, the present invention may be applied to a p-type MOS transistor. In this embodiment, the spacer is formed on the gate electrode of the second transistor; however, the spacer does not have to be formed. In that case, the withstand voltage can be improved because the transistor has an LDD structure by the spacer formed at the edge of the first polysilicon gate electrode.

[0017]

As described above, according to the semiconductor manufacturing method of the present invention, when two types of MOS transistors (for example, a high breakdown voltage transistor and a low breakdown voltage transistor) are formed on the same substrate in a series of steps, By forming an insulating material on the side wall after forming one polysilicon gate electrode, the first polysilicon gate electrode can be formed simply by forming the second polysilicon under general second polysilicon dry etching conditions. It is possible to realize a semiconductor device in which the etching residue of the second polysilicon does not occur on the side wall, and there is no variation in characteristics of the first MOS transistor and no leakage through the etching residue.

Further, since the insulating spacer formed on the side wall of the first polysilicon gate electrode can be applied to forming the LDD region of the first MOS transistor, it is effective in improving the breakdown voltage of the transistor.

[Brief description of the drawings]

FIG. 1 is a sectional view of a manufacturing process of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a step of manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 7 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 8 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 9 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 10 is a sectional view of a manufacturing step of the semiconductor device according to the first embodiment of the present invention;

FIG. 11 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the second embodiment of the present invention.

FIG. 12 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the second embodiment of the present invention.

FIG. 13 is a cross-sectional view showing a step of manufacturing the semiconductor device according to the second embodiment of the present invention.

FIG. 14 is a cross-sectional view showing a step of manufacturing the semiconductor device according to the second embodiment of the present invention.

FIG. 15 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the second embodiment of the present invention.

FIG. 16 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the second embodiment of the present invention.

FIG. 17 is a cross-sectional view illustrating a manufacturing step of the semiconductor device according to the second embodiment of the present invention.

FIG. 18 is a cross-sectional view illustrating a manufacturing step of the semiconductor device according to the second embodiment of the present invention.

FIG. 19 is a cross-sectional view showing a step of manufacturing the semiconductor device according to the second embodiment of the present invention.

FIG. 20 is a cross-sectional view illustrating a manufacturing step of the semiconductor device according to the second embodiment of the present invention.

FIG. 21 is a cross-sectional view of a manufacturing step of a semiconductor device in a conventional embodiment.

FIG. 22 is a cross-sectional view of a manufacturing step of a semiconductor device in a conventional embodiment.

FIG. 23 is a sectional view of a manufacturing step of a semiconductor device in a conventional embodiment.

FIG. 24 is a cross-sectional view of a manufacturing step of a semiconductor device in a conventional embodiment.

FIG. 25 is a cross-sectional view of a manufacturing step of a semiconductor device in a conventional embodiment.

FIG. 26 is a sectional view of a manufacturing step of a semiconductor device in a conventional embodiment.

FIG. 27 is a sectional view of a manufacturing step of a semiconductor device in a conventional embodiment.

FIG. 28 is a sectional view of a manufacturing step of a semiconductor device in a conventional embodiment.

FIG. 29 is a cross-sectional view of a manufacturing step of a semiconductor device in a conventional embodiment.

[Explanation of symbols]

 Reference Signs List 1 p-type semiconductor substrate 2 p-type well 3 field oxide film 4 first channel doped region 5 first gate oxide film 6 first polysilicon film 7 first polysilicon gate electrode 8 first LDD implantation region 9 Fluid glass material 10 Second channel doped region 11 Second gate oxide film 12 Second polysilicon film 13 Second polysilicon gate electrode 14 Second LDD implantation region 15 Transistor spacer 16 Source / drain implantation region 17 First transistor spacer 18 Etching residue of second polysilicon film 19 LDD implantation region

Claims (3)

[Claims] A first MOS transistor on a main surface of the same semiconductor substrate;
Growing a polysilicon film to be a gate electrode of a transistor, selectively removing other portions while leaving a predetermined portion of the polysilicon film to form a first polysilicon gate electrode; Forming an insulating film covering at least a side wall portion of the polysilicon gate electrode; and forming a gate electrode of a second MOS transistor on a region other than a formation region of the first MOS transistor on the semiconductor substrate. A method for manufacturing a semiconductor device, comprising: 2. A first MOS transistor on a main surface of the same semiconductor substrate.
Growing a polysilicon film to be a gate electrode of a transistor, selectively removing other portions while leaving a predetermined portion of the polysilicon film to form a first polysilicon gate electrode; Spin coating a glass material having fluidity at room temperature on at least the side wall portion of the polysilicon gate electrode, and removing the glass material on a region other than the side wall portion in the first polysilicon gate electrode, Forming an insulating film covering at least a side wall of one polysilicon gate electrode; and forming a gate electrode of a second MOS transistor on the semiconductor substrate in a region other than a formation region of the first MOS transistor. And a method of manufacturing a semiconductor device. 3. A first MOS transistor on a main surface of the same semiconductor substrate.
Growing a polysilicon film to be a gate electrode of a transistor, selectively removing other portions while leaving a predetermined portion of the polysilicon film to form a first polysilicon gate electrode; Forming an oxide film on at least the side wall of the polysilicon gate electrode, and forming an insulating film covering at least the side wall of the first polysilicon gate electrode by etching the entire surface and removing the entire surface by etching. And a step of forming a gate electrode of a second MOS transistor in a region other than the formation region of the first MOS transistor on the semiconductor substrate.