JPH11130533A - Circuit board and its mounting structure - Google Patents
Circuit board and its mounting structureInfo
- Publication number
- JPH11130533A JPH11130533A JP9300932A JP30093297A JPH11130533A JP H11130533 A JPH11130533 A JP H11130533A JP 9300932 A JP9300932 A JP 9300932A JP 30093297 A JP30093297 A JP 30093297A JP H11130533 A JPH11130533 A JP H11130533A
- Authority
- JP
- Japan
- Prior art keywords
- crystal phase
- weight
- wiring board
- wiring
- sio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Inorganic Insulating Materials (AREA)
- Compositions Of Oxide Ceramics (AREA)
- Glass Compositions (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体素子収納用
パッケージ、多層配線基板等に適用される配線基板に関
するものであり、特に、銅や、銀と同時焼成が可能であ
り、また、プリント基板などの有機樹脂からなる外部電
気回路基板に対する高い信頼性をもって実装可能な配線
基板とその実装構造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board applied to a package for accommodating a semiconductor element, a multilayer wiring board, and the like, and more particularly to a wiring board which can be co-fired with copper or silver. The present invention relates to a wiring board that can be mounted with high reliability on an external electric circuit board made of an organic resin such as an organic resin, and a mounting structure thereof.
【0002】[0002]
【従来技術】従来より、セラミック多層配線基板として
は、アルミナ質焼結体からなる絶縁基板の表面または内
部にタングステンやモリブデンなどの高融点金属からな
る配線層が形成されたものが最も普及している。2. Description of the Related Art Conventionally, as a ceramic multilayer wiring board, a ceramic multilayer wiring board in which a wiring layer made of a refractory metal such as tungsten or molybdenum is formed on the surface or inside of an insulating substrate made of an alumina-based sintered body has been most widely used. I have.
【0003】また、最近に至り、高度情報化時代を迎
え、使用される周波数帯域はますます高周波化に移行し
つつある。このような、高周波の信号の伝送を必要を行
う高周波配線基板においては、高周波信号を損失なく伝
送する上で、配線層を形成する導体の抵抗が小さいこ
と、また絶縁基板の高周波領域での誘電損失が小さいこ
とが要求される。Further, recently, with the era of advanced information, the frequency band to be used is shifting to higher and higher frequencies. In such a high-frequency wiring board that requires transmission of a high-frequency signal, in order to transmit a high-frequency signal without loss, the resistance of the conductor forming the wiring layer is small, and the dielectric in the high-frequency region of the insulating substrate is low. Low loss is required.
【0004】ところが、従来のタングステン(W)や、
モリブデン(Mo)などの高融点金属は導体抵抗が大き
く、信号の伝搬速度が遅く、また、30GHz以上の高
周波領域の信号伝搬も困難であることから、W、Moな
どの金属に代えて銅、銀、金などの低抵抗金属を使用す
ることが必要である。However, conventional tungsten (W),
A high melting point metal such as molybdenum (Mo) has a large conductor resistance and a low signal propagation speed, and it is difficult to propagate a signal in a high frequency region of 30 GHz or more. Therefore, instead of metals such as W and Mo, copper, It is necessary to use low resistance metals such as silver and gold.
【0005】このような低抵抗金属からなる配線層は、
アルミナと同時焼成することが不可能であるため、最近
では、ガラス、またはガラスとセラミックスとの複合材
料からなる、いわゆるガラスセラミックスを絶縁基板と
して用いた配線基板が開発されつつある。例えば、特公
平4−12639号のように、ガラスにSiO2 系フィ
ラーを添加し、銅、銀、金などの低抵抗金属からなる配
線層と900〜1000℃の温度で同時焼成した多層配
線基板や、特開昭60−240135号のように、ホウ
ケイ酸亜鉛系ガラスに、Al2 O3 、ジルコニア、ムラ
イトなどのフィラーを添加したものを低抵抗金属と同時
焼成したものなどが提案されている。その他、特開平5
−298919号には、ムライトやコージェライトを結
晶相として析出させたガラスセラミック材料も提案され
ている。A wiring layer made of such a low-resistance metal is
Since it is impossible to co-fire with alumina, recently, a wiring board using glass or a composite material of glass and ceramic, that is, a so-called glass ceramic as an insulating substrate has been developed. For example, as disclosed in Japanese Patent Publication No. 4-12639, a multilayer wiring board obtained by adding an SiO 2 filler to glass and simultaneously firing a wiring layer made of a low-resistance metal such as copper, silver, and gold at a temperature of 900 to 1000 ° C. Further, as disclosed in Japanese Patent Application Laid-Open No. Sho 60-240135, a material in which a filler such as Al 2 O 3 , zirconia, or mullite is added to a zinc borosilicate glass and co-fired with a low-resistance metal has been proposed. . In addition,
Japanese Patent Application No. 298919 proposes a glass ceramic material in which mullite or cordierite is precipitated as a crystal phase.
【0006】また、多層配線基板や半導体素子収納用パ
ッケージなどの配線基板をマサーボードなどの絶縁基板
が有機樹脂を含むプリント基板に実装する上で、プリン
ト基板との熱膨張差により発生する応力により実装部分
が剥離したり、クラックなどが発生するのを防止するう
えで、絶縁基板の熱膨張係数がプリント基板のそれと近
似していることが望まれる。In addition, when a wiring board such as a multilayer wiring board or a package for housing semiconductor elements is mounted on a printed board containing an organic resin by an insulating substrate such as a mother board, the mounting is performed by a stress generated due to a difference in thermal expansion from the printed board. It is desirable that the thermal expansion coefficient of the insulating substrate be similar to that of the printed circuit board in order to prevent the portions from peeling or cracking.
【0007】[0007]
【発明が解決しようとする課題】しかしながら、前記の
従来のガラスセラミックスでは、銅、銀、金などの低抵
抗金属との同時焼成が可能であっても、従来のガラスセ
ラミックス焼結体は、アルミナ質焼結体に比較して熱膨
張係数が低く、3〜6ppm/℃程度であり、プリント
基板に実装する場合に、実装の信頼性が低く実用上満足
できるものではなかった。また、マイクロ波やミリ波な
どの高周波信号を用いる配線基板の絶縁基板としても具
体的に検討されておらず、そのほとんどが誘電損失が高
く、十分満足できる高周波特性を有するものではなかっ
た。However, in the above-described conventional glass ceramics, the conventional glass ceramics sintered body is made of alumina even if it can be co-fired with a low-resistance metal such as copper, silver or gold. The thermal expansion coefficient was lower than that of the sintered compact, which was about 3 to 6 ppm / ° C., and when mounted on a printed circuit board, the reliability of the mounting was low and was not practically satisfactory. Further, it has not been specifically studied as an insulating substrate of a wiring board using a high frequency signal such as a microwave or a millimeter wave, and most of them have high dielectric loss and do not have sufficiently high frequency characteristics.
【0008】従って、本発明は、金、銀、銅を配線導体
として多層化が可能となるように800〜1000℃で
焼成可能であるとともに、プリント基板の熱膨張係数と
近似した高熱膨張係数を有し、且つ高周波領域において
も低誘電率および低誘電正接の配線基板を提供すること
を目的とする。また、本発明は、プリント基板などの外
部電気回路基板に対して、高信頼性をもって実装可能な
配線基板の実装構造を提供することを目的とするもので
ある。Accordingly, the present invention is capable of firing at 800 to 1000 ° C. so as to enable multilayering using gold, silver and copper as wiring conductors, and has a high thermal expansion coefficient close to the thermal expansion coefficient of a printed circuit board. It is another object of the present invention to provide a wiring board having a low dielectric constant and a low dielectric loss tangent even in a high frequency region. Another object of the present invention is to provide a wiring board mounting structure that can be mounted on an external electric circuit board such as a printed board with high reliability.
【0009】[0009]
【課題を解決するための手段】本発明者は、上記課題を
鋭意検討した結果、絶縁基板の表面あるいは内部に、配
線層が配設されてなる配線基板において、絶縁基板を、
Si、Al、Mg、Sr、TiおよびZnを構成元素と
して含む複合酸化物焼結体により構成し、その焼結体中
において、SiO2 結晶相と、少なくともZn、Alを
含むスピネル型酸化物結晶相と、少なくともSr、Al
およびSiを含む複合酸化物結晶相とを構成相として析
出せしめることにより、高熱膨張化を達成できるととも
に、低誘電率化、高周波領域において低誘電損失化を実
現できることを知見し、本発明に至った。Means for Solving the Problems As a result of diligent studies on the above-mentioned problems, the present inventor has found that a wiring board having a wiring layer disposed on the surface or inside of the insulating board is characterized by:
A composite oxide sintered body containing Si, Al, Mg, Sr, Ti and Zn as constituent elements, in which a SiO 2 crystal phase and a spinel oxide crystal containing at least Zn and Al are contained. Phase and at least Sr, Al
The present inventors have found that, by precipitating a composite oxide crystal phase containing Si and Si as a constituent phase, a high thermal expansion can be achieved, a low dielectric constant, and a low dielectric loss in a high frequency region can be realized. Was.
【0010】即ち、本発明の配線基板は、絶縁基板と、
その表面あるいは内部に配線層を具備してなるものであ
り、前記絶縁基板を、Si、Al、Mg、Zn、Srお
よびTiを構成元素として含むとともに、結晶相とし
て、SiO2 結晶相と、少なくともZn、Alを含むス
ピネル型酸化物結晶相と、少なくともSr、Alおよび
Siを含む複合酸化物結晶相とを含有し、且つ室温から
400℃における熱膨張係数が7ppm/℃以上の焼結
体により構成することを特徴とする。さらに、前記Si
O2 結晶相が、クオーツ型結晶相であること、前記少な
くともSr、AlおよびSiを含む複合酸化物結晶相
が、単斜晶からなり、特にスラウソナイト型結晶相から
なること、前記複合酸化物焼結体が、SiO2 、Al2
O3 、MgO、ZnOおよびB2 O3 を含むガラス粉末
30〜95重量%と、SiO2 4.9〜40重量%、S
rOとTiO2 との複合酸化物0.1〜10重量%、Z
nO0〜30重量%、B2 O3 0〜10重量%とからな
る混合物を成形後、800〜1000℃の温度で焼成し
てなること、その場合のガラス粉末が、SiO2 40〜
52重量%、Al2 O3 14〜32重量%、MgO4〜
24重量%、ZnO1〜16重量%、B2 O3 5〜15
重量%の割合からなることを特徴とするものである。That is, the wiring board of the present invention comprises: an insulating substrate;
A wiring layer is provided on the surface or inside thereof, and the insulating substrate contains Si, Al, Mg, Zn, Sr and Ti as constituent elements, and at least a SiO 2 crystal phase as a crystal phase. A sintered body containing a spinel-type oxide crystal phase containing Zn and Al and a composite oxide crystal phase containing at least Sr, Al and Si, and having a thermal expansion coefficient of 7 ppm / ° C. or more from room temperature to 400 ° C. It is characterized by comprising. Further, the Si
The O 2 crystal phase is a quartz crystal phase, the composite oxide crystal phase containing at least Sr, Al and Si is a monoclinic crystal, particularly a slausonite crystal phase. The binder is SiO 2 , Al 2
O 3, MgO, glass powder 30-95 wt% containing ZnO and B 2 O 3, SiO 2 4.9~40 wt%, S
0.1 to 10% by weight of a composite oxide of rO and TiO 2 , Z
nO0~30 wt%, after molding the B 2 O 3 mixture consisting of 0-10% by weight, obtained by sintering at a temperature of 800 to 1000 ° C., the glass powder when the, SiO 2 40 to
52% by weight, 14 to 32% by weight of Al 2 O 3 , MgO 4 to
24 wt%, ZnO1~16 wt%, B 2 O 3 5~15
It is characterized by being composed of a percentage by weight.
【0011】また、本発明の配線基板の実装構造によれ
ば、絶縁基板と、該絶縁基板の表面あるいは内部に配設
された配線層と、外部電気回路と接続するための接続端
子を具備する配線基板を、有機樹脂を含有する絶縁体の
少なくとも表面に配線導体が形成された外部電気回路基
板に載置して、前記配線基板の接続端子を前記外部電気
回路基板の配線導体にロウ付けしてなるものであり、前
記配線基板の絶縁基板が、Si、Al、Mg、Zn、S
rおよびTiを構成元素として含むとともに、結晶相と
して、SiO2 結晶相と、少なくともZn、Alを含む
スピネル型酸化物結晶相と、少なくともSr、Alおよ
びSiを含む複合酸化物結晶相とを含有し、且つ室温か
ら400℃における熱膨張係数が7ppm/℃以上の焼
結体からなることを特徴とするものである。Further, according to the mounting structure of the wiring board of the present invention, there is provided an insulating substrate, a wiring layer disposed on or inside the insulating substrate, and connection terminals for connecting to an external electric circuit. The wiring board is placed on an external electric circuit board having a wiring conductor formed on at least the surface of an insulator containing an organic resin, and the connection terminals of the wiring board are brazed to the wiring conductor of the external electric circuit board. The insulating substrate of the wiring substrate is made of Si, Al, Mg, Zn, S
In addition to containing r and Ti as constituent elements, the crystal phase includes a SiO 2 crystal phase, a spinel oxide crystal phase containing at least Zn and Al, and a composite oxide crystal phase containing at least Sr, Al and Si. And a sintered body having a coefficient of thermal expansion from room temperature to 400 ° C. of 7 ppm / ° C. or more.
【0012】[0012]
【発明の実施の形態】本発明の配線基板として、半導体
素子を収納搭載したパッケージを例として図1をもとに
説明する。図1は、半導体収納用パッケージ、特に、接
続端子がボール状端子からなるボールグリッドアレイ
(BGA)型パッケージの概略断面図である。図1によ
れば、パッケージAは、絶縁材料からなる絶縁基板1と
蓋体2によりキャビティ3が形成されており、そのキャ
ビティ3内には、半導体素子4が搭載されている。DESCRIPTION OF THE PREFERRED EMBODIMENTS A wiring board according to the present invention will be described with reference to FIG. FIG. 1 is a schematic sectional view of a semiconductor storage package, particularly a ball grid array (BGA) type package in which connection terminals are formed of ball-shaped terminals. According to FIG. 1, the package A has a cavity 3 formed by an insulating substrate 1 made of an insulating material and a lid 2, and a semiconductor element 4 is mounted in the cavity 3.
【0013】また、絶縁基板1の表面および内部には、
半導体素子4と電気的に接続された配線層5が形成され
ている。この配線層5は、高周波信号の伝送時に導体損
失を極力低減するために、銅、銀あるいは金などの低抵
抗金属からなることが望ましい。また、この配線層5に
1GHz以上、特に20GHz以上、さらには、50G
Hz以上、またさらには70GHz以上の高周波信号を
伝送する場合には、高周波信号が損失なく伝送されるこ
とが必要となるため、周知のストリップ線路、マイクロ
ストリップ線路、コプレーナ線路、誘電体導波管線路の
うちの少なくとも1種から構成される。Further, on the surface and inside of the insulating substrate 1,
A wiring layer 5 electrically connected to the semiconductor element 4 is formed. The wiring layer 5 is desirably made of a low-resistance metal such as copper, silver, or gold in order to minimize conductor loss when transmitting a high-frequency signal. Further, the wiring layer 5 has a frequency of 1 GHz or more, particularly 20 GHz or more,
When transmitting a high-frequency signal of not less than 70 Hz or even 70 GHz, it is necessary to transmit the high-frequency signal without loss. Therefore, known strip lines, microstrip lines, coplanar lines, and dielectric waveguides are known. It is composed of at least one of the lines.
【0014】また、図1のパッケージにおいて、絶縁基
板1の底面には、接続用電極層6が被着形成されてお
り、パッケージ内の配線層5と接続されている。そし
て、接続用電極層6には、半田などのロウ材7によりボ
ール状端子8が被着形成されている。In the package shown in FIG. 1, a connection electrode layer 6 is formed on the bottom surface of the insulating substrate 1 and is connected to the wiring layer 5 in the package. A ball-shaped terminal 8 is formed on the connection electrode layer 6 with a brazing material 7 such as solder.
【0015】本発明によれば、図1に示されるようなパ
ッケージにおける前記絶縁基板1を、Si、Al、M
g、Zn、Sr及びTiを構成元素として含む複合酸化
物焼結体から構成する。また、この焼結体は、図2の焼
結体の組織を説明するための概略図に示すように、Si
O2 からなる結晶相(Si)と、少なくともZnOとA
l2 O3 とからなるスピネル型結晶相(SP)のいずれ
かを主たる結晶相とし、これら2つの結晶により、焼結
体中の全結晶相の50%以上を占めるものである。ま
た、本発明によれば、上記の2つの結晶相以外の結晶相
として、少なくともSr、AlおよびSiを含む複合酸
化物結晶相(SL)を含有する。According to the present invention, the insulating substrate 1 in the package as shown in FIG.
It is composed of a composite oxide sintered body containing g, Zn, Sr and Ti as constituent elements. Further, as shown in a schematic diagram for explaining the structure of the sintered body in FIG.
A crystal phase (Si) composed of O 2 , at least ZnO and A
One of the spinel crystal phases (SP) consisting of l 2 O 3 is the main crystal phase, and these two crystals occupy 50% or more of the total crystal phase in the sintered body. Further, according to the present invention, a complex oxide crystal phase (SL) containing at least Sr, Al and Si is contained as a crystal phase other than the above two crystal phases.
【0016】SiO2 からなる結晶相(Si)とは、ク
オーツ型結晶相からなることが望ましく、少なくともZ
nOとAl2 O3 とを主体とするスピネル型結晶相(S
P)としては、ZnAl2 O4 で表されるガーナイトな
どが挙げられる。少なくともSr、AlおよびSiを含
む複合酸化物結晶相(SL)は、単斜晶からなり、特に
SrAl2 Si2 O8 で表されるスラウソナイト型結晶
相であることが望ましい。The crystal phase (Si) composed of SiO 2 is desirably composed of a quartz-type crystal phase.
Spinel type crystal phase mainly composed of nO and Al 2 O 3 (S
Examples of P) include garnite represented by ZnAl 2 O 4 . The composite oxide crystal phase (SL) containing at least Sr, Al and Si is composed of a monoclinic crystal, and is particularly preferably a slausonite type crystal phase represented by SrAl 2 Si 2 O 8 .
【0017】なお、上記の各結晶相中には、主たる構成
金属元素以外に結晶構造を変化させない範囲で、他の金
属元素が固溶していてもよい。例えば、ZnAl2 O4
には、MgAl2 O4 が固溶して、(Zn,Mg)Al
2 O4 のスピネル型結晶相からなる場合もある。また、
クオーツ型結晶相中には、SiO2 以外にZn、Bが固
溶する場合もある。In each of the above crystal phases, other metal elements than the main constituent metal elements may be dissolved in a solid solution as long as the crystal structure is not changed. For example, ZnAl 2 O 4
Has a solid solution of MgAl 2 O 4 and (Zn, Mg) Al
It may be composed of a spinel type crystal phase of 2 O 4 . Also,
In the quartz-type crystal phase, Zn and B other than SiO 2 may form a solid solution.
【0018】また、本発明によれば、上記3つの結晶以
外に、2MgO・2Al2 O3 ・5SiO2 で表される
コージエライト型結晶相が微量存在する場合もある。さ
らに、焼結体組織においては、上記の結晶相の粒界に、
SiO2 、またはSiO2 、B2 O3 、Al2 O3 、S
rOを含むガラス相が存在する場合もある。According to the present invention, a cordierite type crystal phase represented by 2MgO.2Al 2 O 3 .5SiO 2 may be present in a small amount in addition to the above three crystals. Furthermore, in the structure of the sintered body,
SiO 2 , or SiO 2 , B 2 O 3 , Al 2 O 3 , S
A glass phase containing rO may be present.
【0019】また、本発明における絶縁基板を構成する
複合酸化物焼結体の全体組成としては、Si、Al、M
g、Zn、SrおよびTiの各金属元素の酸化物換算に
よる合量を100重量%とした時、SiO2 を30〜6
0重量%、Al2 O3 を18〜25重量%、MgOを5
〜13重量%、ZnOを5〜35重量%、B2 O3 を5
〜12重量%、SrO1〜3重量%、TiO2 1〜3重
量%の割合からなることが望ましい。In the present invention, the overall composition of the composite oxide sintered body constituting the insulating substrate includes Si, Al, M
g, Zn, when the total amount of an oxide in terms of respective metal elements of Sr and Ti is 100 wt%, a SiO 2 from 30 to 6
0 wt%, the Al 2 O 3 18 to 25 wt%, the MgO 5
To 13 wt%, the ZnO 5 to 35% by weight, the B 2 O 3 5
12wt%, SrO1~3 wt%, it is preferably made of the ratio of TiO 2 1 to 3 wt%.
【0020】また、本発明によれば、結晶相として、前
記SiO2 結晶相、スピネル型結晶相およびSr、Al
およびSiを含む複合酸化物結晶相(例えば、スラウソ
ナイト型結晶)は、室温〜400℃において、それ自体
が高い熱膨張特性を有し、例えば、クオーツ型結晶は1
3〜20ppm/℃、ガーナイト型結晶およびスラウソ
ナイト型結晶は7〜8ppm/℃の熱膨張係数を有する
ことから、これらの結晶相により焼結体を構成すること
により、絶縁基板の熱膨張係数も大きくなる傾向にあ
る。熱膨張係数を高める上では、望ましくは、SiO2
結晶相、特にクオーツ型結晶相が最も多いのがよい。な
お、SiO2 結晶相としてクオーツの他にクリストバラ
イト、トリジマイトがあるが、クリストバライトは、2
00℃付近に熱膨張係数の屈曲点を有することから望ま
しくない。According to the present invention, as the crystal phase, the SiO 2 crystal phase, the spinel type crystal phase and Sr, Al
The complex oxide crystal phase containing Si and Si (e.g., slausonite type crystal) has a high thermal expansion characteristic per se at room temperature to 400 [deg.] C.
Since the garnite type crystal and the slausonite type crystal have a thermal expansion coefficient of 7 to 8 ppm / ° C at 3 to 20 ppm / ° C, the thermal expansion coefficient of the insulating substrate is increased by forming a sintered body from these crystal phases. Tend to be. In order to increase the coefficient of thermal expansion, it is desirable to use SiO 2
It is preferred that the crystal phase, particularly the quartz crystal phase, be the largest. Note that cristobalite and tridymite other than quartz are available as the SiO 2 crystal phase.
It is not desirable because it has a bending point of the thermal expansion coefficient near 00 ° C.
【0021】本発明によれば、上記の複合酸化物焼結体
からなる絶縁基板は、誘電率が6以下、特に5以下と低
く、且つプリント基板との実装の信頼性を向上させる上
で、絶縁基板の室温から400℃における熱膨張係数が
7ppm/℃以上、特に9ppm/℃以上、さらには1
0ppm/℃以上であるのがよい。これは、上記熱膨張
係数が7ppm/℃よりも低いと、プリント基板との熱
膨張差により、半田実装時や半導体素子の作動停止によ
る繰り返し温度サイクルによって、プリント基板とパッ
ケージとの実装部に熱膨張差に起因する応力が発生し、
実装部にクラック等が発生し、実装構造の信頼性を損ね
てしまうためである。According to the present invention, the insulating substrate made of the above-described composite oxide sintered body has a low dielectric constant of 6 or less, particularly 5 or less, and improves the reliability of mounting on a printed circuit board. The thermal expansion coefficient of the insulating substrate from room temperature to 400 ° C. is 7 ppm / ° C. or more, particularly 9 ppm / ° C. or more,
It is preferably 0 ppm / ° C. or more. This is because if the coefficient of thermal expansion is lower than 7 ppm / ° C., the thermal expansion difference between the printed circuit board and the printed circuit board and the package due to thermal cycling due to repetitive temperature cycling due to the stoppage of the operation of the semiconductor element may cause the thermal expansion. Stress due to the difference in expansion occurs,
This is because cracks and the like occur in the mounting portion, which impairs the reliability of the mounting structure.
【0022】従って、本発明における実装構造は、図1
に示すように、ポリイミド樹脂、エポキシ樹脂、フェノ
ール樹脂などの有機樹脂を含む絶縁材料からなる絶縁基
板9の表面に配線導体10が形成された外部電気回路基
板Bに対して、ロウ材を介して実装されるものである。
具体的には、パッケージAにおける絶縁基板1の底面に
取付けられているボール状端子8と、外部電気回路基板
Bの配線導体10とを当接させてPb−Snなどの半田
等のロウ材11によりロウ付けして実装される。また、
ボール状端子8自体を溶融させて配線導体10と接続さ
せてもよい。Therefore, the mounting structure according to the present invention is shown in FIG.
As shown in FIG. 3, an external electric circuit board B having a wiring conductor 10 formed on the surface of an insulating substrate 9 made of an insulating material containing an organic resin such as a polyimide resin, an epoxy resin, and a phenol resin is interposed with a brazing material. Is to be implemented.
Specifically, the ball-shaped terminal 8 attached to the bottom surface of the insulating substrate 1 in the package A and the wiring conductor 10 of the external electric circuit board B are brought into contact with each other to form a brazing material 11 such as solder such as Pb-Sn. Is mounted by brazing. Also,
The ball-shaped terminal 8 itself may be melted and connected to the wiring conductor 10.
【0023】本発明によれば、このようなボール状端子
8を介在したロウ付けにより実装されるような表面実装
型のパッケージにおいて、有機樹脂を含む絶縁基板から
なる外部電気回路基板にロウ付け実装した場合において
も、外部電気回路基板の絶縁基板との熱膨張差を従来の
セラミック材料よりも小さくできることから、かかる実
装構造に対して、熱サイクルが印加された場合において
も、応力の発生を抑制することができる結果、実装構造
の長期信頼性を高めることができる。According to the present invention, in such a surface mount type package as is mounted by brazing with such ball-shaped terminals 8 interposed therebetween, it is mounted on an external electric circuit board made of an insulating substrate containing an organic resin. In this case, the thermal expansion difference between the external electric circuit board and the insulating substrate can be made smaller than that of the conventional ceramic material. Therefore, even when a thermal cycle is applied to such a mounting structure, the occurrence of stress is suppressed. As a result, the long-term reliability of the mounting structure can be improved.
【0024】次に、本発明における配線基板の絶縁基板
を構成する複合酸化物焼結体を製造する方法について説
明する。まず、出発原料として、SiO2 、Al
2 O3 、MgO、ZnO、B2 O3 を含む結晶化ガラス
粉末と、フィラー成分として、ZnO粉末、SiO2 粉
末、あるいはウイレマイト(Zn2 SiO4 )粉末、B
2 O3 粉末およびSrTiO3 などのSrOとTiO2
との複合酸化物を組み合わせて用い、これらを所望の比
率で混合する。Next, a method of manufacturing a composite oxide sintered body constituting an insulating substrate of a wiring board according to the present invention will be described. First, as starting materials, SiO 2 , Al
Crystallized glass powder containing 2 O 3 , MgO, ZnO, B 2 O 3 , and ZnO powder, SiO 2 powder, or willemite (Zn 2 SiO 4 ) powder as filler component, B
SrO and TiO 2 such as 2 O 3 powder and SrTiO 3
And a mixture thereof in a desired ratio.
【0025】用いる結晶化ガラスの望ましい組成として
は、SiO2 40〜52重量%、Al2 O3 14〜32
重量%、MgO4〜24重量%、ZnO1〜16重量
%、B2 O3 5〜15重量%であることが望ましい。The desirable composition of the crystallized glass to be used is as follows: SiO 2 40 to 52% by weight, Al 2 O 3 14 to 32
%, MgO 4 to 24% by weight, ZnO 1 to 16% by weight, and B 2 O 3 5 to 15% by weight.
【0026】そして、ガラス粉末30〜95重量%、特
に60〜90重量%に対して、SiO2 を4.9〜40
重量%、特に9〜30重量%、SrOとTiO2 を合量
で0.1〜10重量%、特に1〜5重量%の割合で添加
し、さらに任意成分としてZnOを0〜30重量%、B
2 O3 を0〜10重量%の割合で添加混合する。Then, 4.9 to 40% of SiO 2 is added to 30 to 95% by weight, particularly 60 to 90% by weight of the glass powder.
Wt%, in particular 9 to 30 wt%, SrO and 0.1 to 10 wt% of TiO 2 in total, added in particular in a proportion of 1 to 5 wt%, further 0 to 30 wt% of ZnO as an optional component, B
2 O 3 is added and mixed at a ratio of 0 to 10% by weight.
【0027】上記の原料粉末において、各成分を上記の
範囲に限定する理由は、ガラス粉末が30重量%よりも
少ないと、1000℃以下の温度での焼成が不可能であ
り、95重量%よりも多いと、焼成温度でガラスが溶融
してしまい焼結体を作製することができなくなる。The reason for limiting each component in the above-mentioned raw material powder to the above range is that if the glass powder is less than 30% by weight, firing at a temperature of 1000 ° C. or less is impossible, and If there is too much, the glass melts at the firing temperature, and it becomes impossible to produce a sintered body.
【0028】また、SiO2 量が4.9重量%よりも少
ないと、焼結体中でのSiO2 結晶相の絶対量が低下す
るために高熱膨張の焼結体が得られず、40重量%を越
えると、難焼結性となり、1000℃以下の焼成温度で
緻密化できないためである。If the amount of SiO 2 is less than 4.9% by weight, the sintered body having a high thermal expansion cannot be obtained because the absolute amount of the SiO 2 crystal phase in the sintered body is reduced. %, It becomes difficult to sinter and cannot be densified at a firing temperature of 1000 ° C. or less.
【0029】SrOとTiO2 は、SrTiO3 等の複
合酸化物として添加することが最も望ましく、特にこの
SrOおよびTiO2 の添加により、かかる系の焼結性
を大幅に向上させることができ、低温焼成化とともに、
焼結体中のボイドの低減を図ることができる。また、一
般に、Al2 O3 やSiO2 からなるガラス相の熱膨張
係数は5〜6ppm/℃と低い。しかし、SrOとガラ
ス中のAl2 O3 やSiO2 との反応を進行させて、ス
ラウソナイト等の複合酸化物を析出させると、このスラ
ウソナイトが約7ppm/℃の高熱膨張特性を有するこ
とから、焼結体全体の熱膨張係数をSrOを添加しない
場合に比較して0.5〜1ppm/℃程度高めることが
できる。なお、残余のTiO2 は、上記の結晶化を促進
する役割をなす。しかし、TiO2 自体の誘電率が高い
ために多く残存すると系全体の誘電率が高くなり望まし
くない。SrO and TiO 2 are most preferably added as a composite oxide such as SrTiO 3. In particular, by adding SrO and TiO 2 , the sinterability of such a system can be greatly improved. Along with firing,
Voids in the sintered body can be reduced. Generally, the thermal expansion coefficient of the glass phase made of Al 2 O 3 or SiO 2 is as low as 5 to 6 ppm / ° C. However, when the reaction between SrO and Al 2 O 3 or SiO 2 in the glass proceeds to precipitate a complex oxide such as slausonite, the slausonite has a high thermal expansion characteristic of about 7 ppm / ° C. The thermal expansion coefficient of the whole body can be increased by about 0.5 to 1 ppm / ° C. as compared with the case where SrO is not added. Note that the remaining TiO 2 plays a role in promoting the crystallization. However, if TiO 2 itself has a high dielectric constant and remains in a large amount, the dielectric constant of the entire system increases, which is not desirable.
【0030】従って、SrOおよびTiO2 の添加量が
0.1重量%よりも少ないと、焼結性の向上効果および
ボイドの低減効果が小さく、また、Sr、Al、Si含
有複合酸化物結晶が生成されず、10重量%よりも多い
と誘電率が高くなる。Therefore, when the addition amount of SrO and TiO 2 is less than 0.1% by weight, the effect of improving sinterability and the effect of reducing voids are small, and the composite oxide crystal containing Sr, Al, and Si has a small effect. It is not produced, and if it exceeds 10% by weight, the dielectric constant becomes high.
【0031】また、B2 O3 およびZnOは、任意成分
であり、特に、これらの成分の添加により、焼結性を改
善することができる。但し、ZnO量が30重量%を越
えると焼結体の熱膨張係数が低くなり、B2 O3 量が1
0重量%を越えると溶剤へのB成分の溶解などの問題か
らスラリー化およびテープ化が困難となるためである。B 2 O 3 and ZnO are optional components. In particular, sinterability can be improved by adding these components. However, the thermal expansion coefficient between the sintered body weight ZnO exceeds 30% by weight is low, B 2 O 3 amount is 1
If the content exceeds 0% by weight, it becomes difficult to form a slurry and a tape due to problems such as dissolution of the component B in the solvent.
【0032】そして、上記の組成で秤量混合された混合
粉末を用いて所定の成形体を作製し、その成形体を80
0〜1000℃の酸化性雰囲気または不活性雰囲気中で
焼成することにより作製することができる。Then, a predetermined molded body is prepared using the mixed powder weighed and mixed with the above composition, and the molded body is
It can be manufactured by firing in an oxidizing atmosphere or an inert atmosphere at 0 to 1000 ° C.
【0033】また、上記の焼結体を用いて配線層を具備
する配線基板を作製するには、前記混合粉末を用いて、
適当な有機溶剤、溶媒を用いて混合してスラリーを調製
し、これを従来周知のドクターブレード法やカレンダー
ロール法、あるいは圧延法、プレス成形法により、シー
ト状に成形する。そして、このシート状成形体に所望に
よりスルーホールを形成した後、スルーホール内に、
銅、金、銀のうちの少なくとも1種を含む金属ペースト
を充填する。そして、シート状成形体表面には、高周波
信号が伝送可能な高周波線路パターンを金属ペーストを
用いてスクリーン印刷法、グラビア印刷法などの配線層
の厚みが5〜30μmとなるように、印刷塗布する。そ
の後、複数のシート状成形体を位置合わせして積層圧着
した後、830〜1000℃の酸化性雰囲気または非酸
化性雰囲気で焼成することにより、配線基板を作製する
ことができる。Further, in order to manufacture a wiring board having a wiring layer using the above sintered body, using the mixed powder,
A slurry is prepared by mixing using an appropriate organic solvent and a solvent, and the slurry is formed into a sheet by a well-known doctor blade method, calender roll method, rolling method, or press forming method. Then, after forming a through hole as desired in the sheet-like molded body, in the through hole,
A metal paste containing at least one of copper, gold, and silver is filled. Then, a high-frequency line pattern capable of transmitting a high-frequency signal is printed and applied on the surface of the sheet-like molded body using a metal paste by a screen printing method, a gravure printing method, or the like so that the thickness of the wiring layer is 5 to 30 μm. . After that, the plurality of sheet-shaped molded bodies are aligned and laminated and pressed, and then fired in an oxidizing atmosphere or a non-oxidizing atmosphere at 830 to 1000 ° C., whereby a wiring substrate can be manufactured.
【0034】そして、この配線基板の表面には、半導体
素子が搭載され配線層と信号の伝達が可能なように接続
される。接続方法としては、配線層上に直接搭載させて
接続させたり、あるいはワイヤーボンディングや、TA
Bテープなどにより配線層と半導体素子とが接続され
る。On the surface of the wiring board, a semiconductor element is mounted and connected to a wiring layer so that signals can be transmitted. As a connection method, a connection is made by directly mounting on a wiring layer, or wire bonding, TA
The wiring layer and the semiconductor element are connected by a B tape or the like.
【0035】さらに、半導体素子が搭載された配線基板
表面に、絶縁基板と同種の絶縁材料や、その他の絶縁材
料、あるいは放熱性が良好な金属等からなるキャップを
ガラス、樹脂、ロウ材等の接着剤により接合することに
より、半導体素子を気密に封止することができ、これに
より半導体素子収納用パッケージを作製することができ
る。Further, a cap made of the same kind of insulating material as the insulating substrate, another insulating material, or a metal having good heat dissipation properties is provided on the surface of the wiring board on which the semiconductor element is mounted, such as glass, resin or brazing material. By bonding with an adhesive, the semiconductor element can be hermetically sealed, whereby a package for housing a semiconductor element can be manufactured.
【0036】[0036]
【実施例】下記の組成からなる2種のガラスを準備し
た。EXAMPLES Two glasses having the following compositions were prepared.
【0037】ガラスA:SiO2 44重量%−Al2 O
3 29重量%−MgO11重量%−ZnO7重量%−B
2 O3 9重量% ガラスB:SiO2 44重量%−Al2 O3 26重量%
−MgO19重量%−ZnO1重量%−B2 O3 10重
量% そして、この結晶化ガラス粉末に対して、平均粒径が1
μm以下のシリカ粉末(クオーツ)とZnO粉末、Sr
TiO3 粉末、B2 O3 粉末を用いて、表1、表2の組
成に従い混合した。Glass A: SiO 2 44% by weight—Al 2 O
3 29% by weight-MgO 11% by weight-ZnO 7% by weight-B
9% by weight of 2 O 3 Glass B: 44% by weight of SiO 2 -26% by weight of Al 2 O 3
—MgO 19% by weight—ZnO 1% by weight—B 2 O 3 10% by weight
μm or less silica powder (quartz) and ZnO powder, Sr
TiO 3 powder and B 2 O 3 powder were mixed according to the compositions shown in Tables 1 and 2.
【0038】そして、この混合物に有機バインダー、可
塑剤、トルエンを添加し、スラリーを調製した後、この
スラリーを用いてドクターブレード法により厚さ300
μmのグリーンシートを作製した。そして、このグリー
ンシートを5枚積層し、50℃の温度で100kg/c
m2 の圧力を加えて熱圧着した。得られた積層体を水蒸
気含有/窒素雰囲気中で700℃で脱バインダーした
後、乾燥窒素中で表1、表2の条件において焼成して絶
縁基板用焼結体を得た。Then, an organic binder, a plasticizer, and toluene are added to the mixture to prepare a slurry, and the slurry is used to have a thickness of 300 by a doctor blade method.
A μm green sheet was prepared. Then, five green sheets are laminated and 100 kg / c at a temperature of 50 ° C.
Thermocompression bonding was performed by applying a pressure of m 2 . After debinding the obtained laminate at 700 ° C. in a water vapor-containing / nitrogen atmosphere, it was fired in dry nitrogen under the conditions shown in Tables 1 and 2 to obtain a sintered body for an insulating substrate.
【0039】得られた焼結体について誘電率、誘電損失
を以下の方法で評価した。誘電率、誘電損失は、試料形
状 直径10mm、厚み5mmの試料を切り出し、15
〜20GHzにてネットワークアナライザー、シンセサ
イズドスイーパーを用いて誘電体円柱共振器法により測
定した。測定では、φ50のCu板治具の間に試料の誘
電体基板を挟んで測定した。共振器のTE011モード
の共振特性より、誘電率、誘電損失を算出した。また、
室温〜400℃における熱膨張曲線をとり、熱膨張係数
を算出した。測定の結果は表1、表2に示した。The dielectric constant and dielectric loss of the obtained sintered body were evaluated by the following methods. Dielectric constant and dielectric loss were measured by cutting out a sample of 10 mm in diameter and 5 mm in thickness,
The measurement was performed at G20 GHz by a dielectric cylinder resonator method using a network analyzer and a synthesized sweeper. In the measurement, a dielectric substrate of a sample was sandwiched between φ50 Cu plate jigs. The dielectric constant and the dielectric loss were calculated from the resonance characteristic of the TE011 mode of the resonator. Also,
A thermal expansion curve from room temperature to 400 ° C. was taken to calculate a thermal expansion coefficient. The measurement results are shown in Tables 1 and 2.
【0040】また、焼結体中における結晶相をX線回折
測定から同定し、さらに非晶質相中の構成元素をEDX
(TEM)およびEPMAによって、その量が1000
ppm以上の元素を表1、表2に示した。The crystal phase in the sintered body was identified by X-ray diffraction measurement, and the constituent elements in the amorphous phase were identified by EDX.
(TEM) and EPMA, the amount is 1000
Tables 1 and 2 show elements of ppm or more.
【0041】さらに、上記のグリーンシートに対して、
バイアホールを形成して銅ペーストを充填し、シート表
面に銅ペーストを配線パターンに印刷塗布し、また、最
下層のグリーンシートの底面には、内部の配線層と導通
する電極層を形成した後、これを5層積層して、上記と
同様な条件で焼成して35mm角、厚み1.2mmの多
層配線基板を作製した。Further, for the above green sheet,
After forming via holes and filling with copper paste, copper paste is printed and applied to the wiring pattern on the sheet surface, and on the bottom surface of the lowermost green sheet, an electrode layer that is conductive to the internal wiring layer is formed. Five layers were laminated and fired under the same conditions as described above to produce a 35 mm square, 1.2 mm thick multilayer wiring board.
【0042】この多層配線基板の電極層に、Pb90重
量%−Sn10重量%の半田からなるボール状端子を低
融点半田(Pb37重量%−Sn63重量%)により取
着した。なお、ボール状端子は、1cm2 当たり30個
の密度で配線基板の底面全体に形成した。A ball-shaped terminal made of solder of 90% by weight of Pb and 10% by weight of Sn was attached to the electrode layer of the multilayer wiring board by low melting point solder (37% by weight of Pb-63% by weight of Sn). The ball-shaped terminals were formed on the entire bottom surface of the wiring substrate at a density of 30 terminals per 1 cm 2 .
【0043】そして、この配線基板をガラス−エポキシ
基板からなる40〜800℃における熱膨張係数が13
ppm/℃の絶縁基板の表面に銅箔からなる配線導体が
形成されたプリント基板に実装した。実装は、プリント
基板表面の配線導体と配線基板のボール状端子とを位置
合わせして、前記低融点半田によって実装した。Then, this wiring board is made of a glass-epoxy board and has a coefficient of thermal expansion of 13 at 40 to 800 ° C.
It was mounted on a printed circuit board having a wiring conductor made of copper foil formed on the surface of an insulating substrate at ppm / ° C. The mounting was performed by positioning the wiring conductor on the surface of the printed circuit board and the ball-shaped terminal of the wiring board, and then using the low melting point solder.
【0044】上記のようにして多層配線基板をプリント
基板に実装したものを大気雰囲気にて−40℃と125
℃の各温度に制御した恒温槽に15分/15分の保持を
1サイクルとして最高1000サイクル繰り返した。そ
して、各サイクル毎にプリント基板の配線導体と配線基
板間の電気抵抗を測定し電気抵抗の変化が現れるまでの
サイクル数を表1、表2に示した。The multilayer wiring board mounted on the printed circuit board as described above is mounted at -40.degree.
A maximum of 1,000 cycles were repeated with a 15-minute / 15-minute hold in a thermostat controlled at each temperature of ° C as one cycle. Then, the electric resistance between the wiring conductor of the printed circuit board and the wiring board was measured for each cycle, and the number of cycles until a change in the electric resistance appeared was shown in Tables 1 and 2.
【0045】また、一部の試料については、フィラー成
分として、ZnO、SiO2 に代わり、Al2 O3 粉
末、コージェライト粉末を用いて同様に焼結体を作製し
評価した(試料No.8、9、22、23)。また、上記
結晶化ガラスA、Bに代わり、以下の組成からなるガラ
スCおよびガラスDを用いて同様に評価を行った(試料
No.24〜27)。For some of the samples, sintered bodies were prepared and evaluated in the same manner using Al 2 O 3 powder and cordierite powder instead of ZnO and SiO 2 as filler components (Sample No. 8). , 9, 22, 23). In addition, the same evaluation was performed using glass C and glass D having the following compositions instead of the crystallized glasses A and B (samples Nos. 24 to 27).
【0046】ガラスC:SiO2 10.4重量%−Al
2 O3 2.5重量%−B2 O3 45.3重量%−CaO
35.2重量%−Na2 O6.6重量% ガラスD:SiO2 14重量%−Al2 O3 24.7重
量%−B2 O3 22.6重量%−BaO14.2重量%
−Li2 O12.8重量%−Na2 O11.7重量%Glass C: SiO 2 10.4% by weight-Al
2 O 3 2.5 wt% -B 2 O 3 45.3 wt% -CaO
35.2 wt% -Na 2 O6.6 wt% Glass D: SiO 2 14 wt% -Al 2 O 3 24.7 wt% -B 2 O 3 22.6 wt% -BaO14.2 wt%
-Li 2 O12.8 weight% -Na 2 O11.7% by weight
【0047】[0047]
【表1】 [Table 1]
【0048】[0048]
【表2】 [Table 2]
【0049】表1の結果から明らかなように、本発明に
基づき、クオーツ型結晶相およびガーナイト型結晶相を
主体とし、スラウソナイト型結晶相を含む熱膨張係数が
7ppm/℃以上の高熱膨張係数を有する焼結体は、い
ずれも15〜20GHzの測定周波数にて、誘電率6以
下、誘電損失が30×10-4以下の優れた誘電特性を有
するとともに、プリント基板への実装において、熱サイ
クル試験でいずれも1000サイクル試験後もプリント
基板との実装不良を生じることがなかった。As is evident from the results shown in Table 1, according to the present invention, a high thermal expansion coefficient having a thermal expansion coefficient of 7 ppm / ° C. or more mainly containing a quartz type crystal phase and a garnitite type crystal phase and containing a slausonite type crystal phase was obtained. Each of the sintered bodies has excellent dielectric properties with a dielectric constant of 6 or less and a dielectric loss of 30 × 10 −4 or less at a measurement frequency of 15 to 20 GHz, and a heat cycle test in mounting on a printed circuit board. In each case, no mounting failure occurred on the printed circuit board even after the 1000 cycle test.
【0050】これに対して、組成において、SiO2 −
Al2 O3 −MgO−ZnO−B2O3 を含むガラス量
が、95重量%よりも多い試料No.1では、熱膨張係数
7ppm/℃以上が達成されず、30重量%よりも少な
い試料No.15では、B2 O3 を多量に配合しないと低
温で焼結することが困難であり、その結果、液相成分が
溶出して焼結体にならなかった。また、ZnO量が30
重量%を越える試料No.12では、1000℃以下での
焼成が難しく、熱膨張係数も低いものであった。On the other hand, in the composition, SiO 2 −
In the sample No. 1 in which the amount of glass containing Al 2 O 3 —MgO—ZnO—B 2 O 3 is more than 95% by weight, a thermal expansion coefficient of 7 ppm / ° C. or more is not achieved, and the sample less than 30% by weight is not obtained. In No. 15, sintering at a low temperature was difficult unless a large amount of B 2 O 3 was added, and as a result, the liquid phase component was eluted and did not form a sintered body. Further, when the amount of ZnO is 30
In the case of Sample No. 12 in which the content is more than 10% by weight, it was difficult to bake at 1000 ° C. or less, and the coefficient of thermal expansion was low.
【0051】また、SiO2 を無添加またはSiO2 量
が4.9重量%よりも少ない試料No.1、7、8、9、
17、22、23では、いずれも熱膨張係数が低いもの
であった。逆に40重量%を越える試料No.13では、
1000℃以下で緻密化することができなかった。B2
O3 量が10重量%を越える試料No.14、15では、
液相が溶出し緻密化できなかった。Further, Samples No. 1, 7, 8, 9, and 9 to which no SiO 2 was added or the amount of SiO 2 was less than 4.9% by weight.
17, 22, and 23 all had low thermal expansion coefficients. Conversely, in sample No. 13 exceeding 40% by weight,
It could not be densified below 1000 ° C. B 2
In Samples Nos. 14 and 15 in which the O 3 amount exceeds 10% by weight,
The liquid phase eluted and could not be densified.
【0052】試料No.8、9、22、23は、ガラスへ
の添加成分としてAl2 O3 やコージェライトを配合し
たものであるが、焼結体中にコージェライトやAl2 O
3 などの結晶が析出して熱膨張係数が低くなった。[0052] Samples No.8,9,22,23 is is obtained by blending as Al 2 O 3 or cordierite as an additive component to the glass, cordierite in the sintered body and Al 2 O
Crystals such as 3 precipitated and the coefficient of thermal expansion decreased.
【0053】さらに、ガラスとして、MgOやZnOを
含まないガラスC、Dを用いた試料No.24〜27で
は、誘電損失が大きくなる傾向にあった。Further, samples Nos. 24 to 27 using glasses C and D containing no MgO or ZnO as the glass tended to have a large dielectric loss.
【0054】[0054]
【発明の効果】以上詳述した通り、本発明の配線基板に
よれば、絶縁基板を特定の結晶相が析出した複合酸化物
焼結体により構成することにより、1000℃以下の低
温で焼成できることから、銅などの低抵抗金属による配
線層を形成でき、しかも1GHz以上の高周波領域にお
いて、低誘電率、低誘電損失を有することから、高周波
信号を極めて良好に損失なく伝送することができる。し
かも、この絶縁基板は、高熱膨張特性を有することか
ら、有機樹脂を含む絶縁基板を具備するプリント基板な
どのマザーボードに対してロウ材等により実装した場合
においても優れた耐熱サイクル性を有し、高信頼性の実
装構造を提供できる。As described in detail above, according to the wiring board of the present invention, the insulating substrate can be fired at a low temperature of 1000 ° C. or lower by forming the insulating substrate from the composite oxide sintered body having a specific crystal phase precipitated. As a result, a wiring layer made of a low-resistance metal such as copper can be formed, and since it has a low dielectric constant and a low dielectric loss in a high-frequency region of 1 GHz or more, a high-frequency signal can be transmitted very favorably without loss. Moreover, since this insulating substrate has a high thermal expansion characteristic, it has excellent heat cycle resistance even when mounted on a motherboard such as a printed circuit board having an insulating substrate containing an organic resin with a brazing material or the like, A highly reliable mounting structure can be provided.
【図1】本発明の配線基板を用いたBGA型の半導体素
子収納用パッケージの一例を説明するための概略断面図
である。FIG. 1 is a schematic cross-sectional view for explaining an example of a BGA type semiconductor element housing package using a wiring board of the present invention.
【図2】本発明の絶縁基板における焼結体の組織を説明
するための概略図である。FIG. 2 is a schematic diagram for explaining the structure of a sintered body in the insulating substrate of the present invention.
A 半導体素子収納用パッケージ 1 絶縁基板 2 蓋体 3 キャビティ 4 半導体素子 5 配線層 6 接続用電極 7 ロウ材 8 ボール状端子 B 外部電気回路基板 9 絶縁基板 10 配線導体 11 ロウ材 Si SiO2 結晶相 SP スピネル型結晶相 SL Sr、AlおよびSi含有結晶相 G 非晶質相Reference Signs List A Package for storing semiconductor element 1 Insulating substrate 2 Lid 3 Cavity 4 Semiconductor element 5 Wiring layer 6 Connecting electrode 7 Brazing material 8 Ball-shaped terminal B External electric circuit board 9 Insulating substrate 10 Wiring conductor 11 Brazing material Si SiO 2 crystal phase SP Spinel type crystal phase SL Sr, Al and Si containing crystal phase G Amorphous phase
Claims (7)
層を具備してなる配線基板において、前記絶縁基板が、
Si、Al、Mg、Zn、SrおよびTiを構成元素と
して含むとともに、結晶相として、SiO2 結晶相と、
少なくともZn、Alを含むスピネル型酸化物結晶相
と、少なくともSr、AlおよびSiを含む複合酸化物
結晶相とを含有し、且つ室温から400℃における熱膨
張係数が7ppm/℃以上の複合酸化物焼結体からなる
ことを特徴とする配線基板。1. A wiring board comprising an insulating substrate and a wiring layer on the surface or inside thereof, wherein the insulating substrate comprises:
Including Si, Al, Mg, Zn, Sr and Ti as constituent elements, and as a crystal phase, a SiO 2 crystal phase;
A composite oxide containing a spinel-type oxide crystal phase containing at least Zn and Al and a composite oxide crystal phase containing at least Sr, Al and Si, and having a thermal expansion coefficient of 7 ppm / ° C. or more from room temperature to 400 ° C. A wiring substrate comprising a sintered body.
である請求項1記載の配線基板。2. The wiring board according to claim 1, wherein the SiO 2 crystal phase is a quartz crystal phase.
む複合酸化物結晶相が、単斜晶からなる請求項1記載の
配線基板。3. The wiring board according to claim 1, wherein the composite oxide crystal phase containing at least Sr, Al and Si is monoclinic.
む複合酸化物結晶相が、スラウソナイト型結晶相からな
る請求項3記載の配線基板。4. The wiring substrate according to claim 3, wherein the composite oxide crystal phase containing at least Sr, Al and Si is a slausonite type crystal phase.
2 O3 、MgO、ZnOおよびB2 O3 を含むガラス粉
末30〜95重量%と、SiO2 4.9〜40重量%、
SrOとTiO2 との複合酸化物0.1〜10重量%、
ZnO0〜30重量%、B2 O3 0〜10重量%とから
なる混合物を成形後、800〜1000℃の温度で焼成
してなる請求項1記載の配線基板。5. The composite oxide sintered body is made of SiO 2 , Al
30-95% by weight of glass powder containing 2 O 3 , MgO, ZnO and B 2 O 3 , 4.9-40% by weight of SiO 2 ,
Composite oxide 0.1 to 10 wt% of SrO and TiO 2,
ZnO0~30 wt%, B 2 O 3 after molding a mixture consisting of 0-10% by weight, the wiring board of the fired formed by claim 1, wherein a temperature of 800 to 1000 ° C..
量%、Al2 O3 14〜32重量%、MgO4〜24重
量%、ZnO1〜16重量%、B2 O3 5〜15重量%
の割合からなることを特徴とする請求項5記載の配線基
板。6. The glass powder contains 40 to 52% by weight of SiO 2 , 14 to 32% by weight of Al 2 O 3, 4 to 24% by weight of MgO, 1 to 16% by weight of ZnO, and 5 to 15% by weight of B 2 O 3.
The wiring board according to claim 5, wherein the wiring board has a ratio of:
部に配設された配線層と、外部電気回路と接続するため
の接続端子を具備する配線基板を、有機樹脂を含有する
絶縁体の少なくとも表面に配線導体が形成された外部電
気回路基板に載置して、前記配線基板の接続端子を前記
外部電気回路基板の配線導体にロウ付けしてなる配線基
板の実装構造において、前記配線基板の絶縁基板が、S
i、Al、Mg、Zn、SrおよびTiを構成元素とし
て含むとともに、結晶相として、SiO2 結晶相と、少
なくともZn、Alを含むスピネル型酸化物結晶相と、
少なくともSr、AlおよびSiを含む複合酸化物結晶
相とを含有し、且つ室温から400℃における熱膨張係
数が7ppm/℃以上の複合酸化物焼結体からなること
を特徴とする配線基板の実装構造。7. A wiring board having an insulating substrate, a wiring layer provided on or on the surface of the insulating substrate, and connection terminals for connection to an external electric circuit, is formed of an insulating material containing an organic resin. In a mounting structure of a wiring board, the wiring board is mounted on at least an external electric circuit board having a wiring conductor formed on a surface thereof, and a connection terminal of the wiring board is brazed to a wiring conductor of the external electric circuit board. Of the insulating substrate is S
i, Al, Mg, Zn, Sr and Ti as constituent elements, and as a crystal phase, a SiO 2 crystal phase and a spinel-type oxide crystal phase containing at least Zn and Al;
The mounting of the wiring substrate, comprising a composite oxide sintered body containing at least a composite oxide crystal phase containing Sr, Al and Si and having a thermal expansion coefficient of 7 ppm / ° C. or more from room temperature to 400 ° C. Construction.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30093297A JP3441941B2 (en) | 1997-10-31 | 1997-10-31 | Wiring board and its mounting structure |
US09/049,312 US6120906A (en) | 1997-03-31 | 1998-03-27 | Insulated board for a wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30093297A JP3441941B2 (en) | 1997-10-31 | 1997-10-31 | Wiring board and its mounting structure |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH11130533A true JPH11130533A (en) | 1999-05-18 |
JP3441941B2 JP3441941B2 (en) | 2003-09-02 |
Family
ID=17890856
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP30093297A Expired - Fee Related JP3441941B2 (en) | 1997-03-31 | 1997-10-31 | Wiring board and its mounting structure |
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JP (1) | JP3441941B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010110201A1 (en) * | 2009-03-26 | 2010-09-30 | 日立金属株式会社 | Dielectric ceramic composition, multilayer dielectric substrate, electronic component, and method for producing dielectric ceramic composition |
CN104529247A (en) * | 2014-12-15 | 2015-04-22 | 田忠和 | Super-hardness and antibacterial artificial quartzite plate and manufacture method thereof |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10531562B2 (en) * | 2017-05-31 | 2020-01-07 | International Business Machines Corporation | Heat-activated conductive spinel materials for printed circuit board via overcurrent protection |
-
1997
- 1997-10-31 JP JP30093297A patent/JP3441941B2/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010110201A1 (en) * | 2009-03-26 | 2010-09-30 | 日立金属株式会社 | Dielectric ceramic composition, multilayer dielectric substrate, electronic component, and method for producing dielectric ceramic composition |
US8778819B2 (en) | 2009-03-26 | 2014-07-15 | Hitachi Metals, Ltd. | Dielectric ceramic composition, multilayer dielectric substrate, electronic component, and method for producing dielectric ceramic composition |
CN104529247A (en) * | 2014-12-15 | 2015-04-22 | 田忠和 | Super-hardness and antibacterial artificial quartzite plate and manufacture method thereof |
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