JP3441950B2 - Wiring board and its mounting structure - Google Patents

Wiring board and its mounting structure

Info

Publication number
JP3441950B2
JP3441950B2 JP35431497A JP35431497A JP3441950B2 JP 3441950 B2 JP3441950 B2 JP 3441950B2 JP 35431497 A JP35431497 A JP 35431497A JP 35431497 A JP35431497 A JP 35431497A JP 3441950 B2 JP3441950 B2 JP 3441950B2
Authority
JP
Japan
Prior art keywords
crystal phase
wiring board
weight
sio
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP35431497A
Other languages
Japanese (ja)
Other versions
JPH11180729A (en
Inventor
吉健 寺師
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP35431497A priority Critical patent/JP3441950B2/en
Priority to US09/049,312 priority patent/US6120906A/en
Publication of JPH11180729A publication Critical patent/JPH11180729A/en
Application granted granted Critical
Publication of JP3441950B2 publication Critical patent/JP3441950B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01012Magnesium [Mg]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/15165Monolayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Compositions Of Oxide Ceramics (AREA)
  • Glass Compositions (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Inorganic Insulating Materials (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子収納用
パッケージ、多層配線基板等に適用される配線基板に関
するものであり、特に、銅や、銀と同時焼成が可能であ
り、また、プリント基板などの有機樹脂からなる外部電
気回路基板に対する高い信頼性をもって実装可能な配線
基板とその実装構造に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board applied to a package for housing a semiconductor element, a multilayer wiring board, etc., and in particular, it can be co-fired with copper or silver, and a printed board. The present invention relates to a wiring board that can be mounted with high reliability on an external electric circuit board made of an organic resin such as, and its mounting structure.

【0002】[0002]

【従来技術】従来より、セラミック多層配線基板として
は、アルミナ質焼結体からなる絶縁基板の表面または内
部にタングステンやモリブデンなどの高融点金属からな
る配線層が形成されたものが最も普及している。
2. Description of the Related Art Conventionally, as a ceramic multilayer wiring board, one in which a wiring layer made of a refractory metal such as tungsten or molybdenum is formed on the surface or inside of an insulating substrate made of an alumina sintered body is most popular. There is.

【0003】また、最近に至り、高度情報化時代を迎
え、使用される周波数帯域はますます高周波化に移行し
つつある。このような、高周波の信号の伝送を必要を行
う高周波配線基板においては、高周波信号を損失なく伝
送する上で、配線層を形成する導体の抵抗が小さいこ
と、また絶縁基板の高周波領域での誘電損失が小さいこ
とが要求される。
Further, in recent years, with the era of advanced information technology, the frequency band to be used is shifting to higher frequencies. In such a high-frequency wiring board that requires transmission of high-frequency signals, in order to transmit high-frequency signals without loss, the resistance of the conductor forming the wiring layer is small, and the dielectric of the insulating board in the high-frequency region is high. Low loss is required.

【0004】ところが、従来のタングステン(W)や、
モリブデン(Mo)などの高融点金属は導体抵抗が大き
く、信号の伝搬速度が遅く、また、30GHz以上の高
周波領域の信号伝搬も困難であることから、W、Moな
どの金属に代えて銅、銀、金などの低抵抗金属を使用す
ることが必要である。
However, conventional tungsten (W),
Refractory metals such as molybdenum (Mo) have a large conductor resistance, have a low signal propagation speed, and are difficult to propagate signals in a high frequency region of 30 GHz or more. Therefore, instead of metals such as W and Mo, copper, It is necessary to use low resistance metals such as silver and gold.

【0005】このような低抵抗金属からなる配線層は、
アルミナと同時焼成することが不可能であるため、最近
では、ガラス、またはガラスとセラミックスとの複合材
料からなる、いわゆるガラスセラミックスを絶縁基板と
して用いた配線基板が開発されつつある。例えば、特公
平4−12639号公報のように、ガラスにSiO2
フィラーを添加し、銅、銀、金などの低抵抗金属からな
る配線層と900〜1000℃の温度で同時焼成した多
層配線基板や、特開昭60−240135号公報のよう
に、ホウケイ酸亜鉛系ガラスに、Al2 3 、ムライト
などのフィラーを添加したものを低抵抗金属と同時焼成
したものなどが提案されている。その他、特開平5−2
98919号公報には、ムライトやコージェライトを結
晶相として析出させたガラスセラミック材料も提案され
ている。
The wiring layer made of such a low resistance metal is
Since it is impossible to co-fire with alumina, a wiring board using glass or a so-called glass ceramics, which is a composite material of glass and ceramics, as an insulating substrate is being developed recently. For example, as in Japanese Examined Patent Publication No. 4-12639, a multilayer wiring in which a SiO 2 -based filler is added to glass and a wiring layer made of a low resistance metal such as copper, silver and gold is co-fired at a temperature of 900 to 1000 ° C. Substrates, such as those disclosed in JP-A-60-240135, have been proposed in which zinc borosilicate glass to which a filler such as Al 2 O 3 or mullite is added is co-fired with a low resistance metal. . In addition, Japanese Patent Laid-Open No. 5-2
Japanese Patent Publication No. 98919 also proposes a glass ceramic material in which mullite or cordierite is precipitated as a crystal phase.

【0006】また、多層配線基板や半導体素子収納用パ
ッケージなどの配線基板をマサーボードなどの絶縁基板
が有機樹脂を含むプリント基板に実装する上で、プリン
ト基板との熱膨張差により発生する応力により実装部分
が剥離したり、クラックなどが発生するのを防止するう
えで、絶縁基板の熱膨張係数がプリント基板の熱膨張係
数と近似していることが望まれる。
In mounting a wiring board such as a multi-layer wiring board or a package for housing a semiconductor element on a printed board whose insulating substrate such as a masser board contains an organic resin, it is mounted by a stress generated due to a difference in thermal expansion from the printed board. It is desirable that the thermal expansion coefficient of the insulating substrate be close to the thermal expansion coefficient of the printed circuit board in order to prevent the peeling of the portion and the generation of cracks.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、前記の
従来のガラスセラミックスでは、銅、銀、金などの低抵
抗金属との同時焼成が可能であっても、従来のガラスセ
ラミックス焼結体は、アルミナ質焼結体に比較して熱膨
張係数が低く、3〜6ppm/℃程度であり、プリント
基板に実装する場合に、実装の信頼性が低く実用上満足
できるものではなかった。また、マイクロ波やミリ波な
どの高周波信号を用いる配線基板の絶縁基板としても具
体的に検討されておらず、そのほとんどが誘電損失が高
く、十分満足できる高周波特性を有するものではなかっ
た。
However, even if the above-mentioned conventional glass ceramics can be co-fired with a low resistance metal such as copper, silver or gold, the conventional glass ceramics sintered body is made of alumina. The coefficient of thermal expansion was lower than that of the quality sintered body, which was about 3 to 6 ppm / ° C., and when mounted on a printed board, the mounting reliability was low and not satisfactory in practice. Further, it has not been specifically studied as an insulating substrate for a wiring substrate using a high frequency signal such as a microwave or a millimeter wave, and most of them have high dielectric loss and do not have sufficiently high frequency characteristics.

【0008】従って、本発明は、金、銀、銅を配線導体
として多層化が可能となるように800〜1000℃で
焼成可能であるとともに、プリント基板の熱膨張係数と
近似した高熱膨張係数を有し、且つ高周波領域において
も低誘電率および低誘電損失の配線基板を提供すること
を目的とする。また、本発明は、プリント基板などの外
部電気回路基板に対して、高信頼性をもって実装可能な
配線基板の実装構造を提供することを目的とするもので
ある。
Therefore, according to the present invention, it is possible to fire at 800 to 1000 ° C. so that gold, silver and copper as wiring conductors can be multilayered, and a high thermal expansion coefficient close to that of the printed circuit board can be obtained. An object of the present invention is to provide a wiring board having a low dielectric constant and a low dielectric loss even in a high frequency region. It is another object of the present invention to provide a mounting structure of a wiring board that can be mounted on an external electric circuit board such as a printed board with high reliability.

【0009】[0009]

【課題を解決するための手段】本発明者は、上記課題を
鋭意検討した結果、絶縁基板の表面あるいは内部に、配
線層が配設されてなる配線基板において、絶縁基板をS
i、Al、Zn、Mg、Zrを含み、且つCa、Sr及
びBaの中から選ばれる少なくとも1種を構成元素とし
て含む複合酸化物焼結体により構成し、その焼結体中に
おいて、SiO2 結晶相と、少なくともZn、Alを含
むスピネル型結晶相と、ZrO2 結晶相とを構成相とし
て析出せしめることにより、高熱膨張化を達成できると
ともに、低誘電率化、高周波領域において低誘電損失化
を実現できることを知見し、本発明に至った。
Means for Solving the Problems As a result of diligent studies on the above problems, the present inventor has found that in a wiring board in which a wiring layer is provided on the surface or inside of the insulating board, the insulating board is
i, Al, Zn, Mg, comprises Zr, and Ca, constituted by a composite oxide sintered body containing as a constituent element at least one selected from among Sr, and Ba, in its sintered body, SiO 2 By precipitating a crystalline phase, a spinel type crystalline phase containing at least Zn and Al, and a ZrO 2 crystalline phase as constituent phases, it is possible to achieve high thermal expansion, low dielectric constant, and low dielectric loss in a high frequency region. The present invention has been accomplished by finding that the above can be realized.

【0010】即ち、本発明の配線基板は、絶縁基板と、
その表面および/または内部に配設された配線層を具備
してなるものであり、前記絶縁基板を、Si、Al、Z
n、Mg、Zrを含み、且つCa、Sr及びBaの中か
ら選ばれる少なくとも1種を構成元素として含むととも
に、結晶相として、SiO2 結晶相と、少なくともZ
n、Alを含むスピネル型結晶相と、ZrO2 結晶相と
を含有し、且つ室温から400℃における熱膨張係数が
7ppm/℃以上の焼結体により構成することを特徴と
する。さらに、前記SiO2 結晶相が、クオーツ型結晶
相であること、ZrO2 結晶相が、単斜晶および/また
は正方晶からなり、前記複合酸化物焼結体が、Si
2 、Al2 3 、MgO、ZnOおよびB2 3 を含
むガラス粉末30〜95重量%と、SiO2 4.9〜4
0重量%と、Ca、Sr及びBaの中から選ばれる少な
くとも1種とZrO2 との複合酸化物0.1〜10重量
%と、ZnO0〜30重量%と、B2 3 0〜10重量
%とからなる混合物を成形後、800〜1000℃の温
度で焼成してなること、その場合のガラス粉末が、Si
2 40〜52重量%、Al2 3 14〜32重量%、
MgO4〜24重量%、ZnO1〜16重量%、B2
3 5〜15重量%の割合からなることを特徴とするもの
である。
That is, the wiring board of the present invention comprises an insulating board,
The wiring board is provided on the surface and / or inside thereof, and the insulating substrate is made of Si, Al, Z.
n, Mg, and Zr, and at least one selected from Ca, Sr, and Ba as a constituent element, and as a crystal phase, a SiO 2 crystal phase and at least Z
A sintered body containing a spinel type crystal phase containing n and Al and a ZrO 2 crystal phase and having a thermal expansion coefficient of 7 ppm / ° C. or more from room temperature to 400 ° C. is characterized. Further, the SiO 2 crystal phase is a quartz crystal phase, the ZrO 2 crystal phase is composed of a monoclinic crystal and / or a tetragonal crystal, and the composite oxide sintered body is made of Si.
30 to 95% by weight of glass powder containing O 2 , Al 2 O 3 , MgO, ZnO and B 2 O 3 , and SiO 2 4.9 to 4
0% by weight, 0.1 to 10% by weight of a complex oxide of ZrO 2 and at least one selected from Ca, Sr and Ba, 0 to 30% by weight of ZnO, and 0 to 10% by weight of B 2 O 3. % After being molded and then fired at a temperature of 800 to 1000 ° C., in which case the glass powder is Si
O 2 40 to 52 wt%, Al 2 O 3 14 to 32 wt%,
MgO 4 to 24% by weight, ZnO 1 to 16% by weight, B 2 O
3 is characterized in that comprising a proportion of 5 to 15 wt%.

【0011】また、本発明の配線基板の実装構造によれ
ば、絶縁基板と、その表面あるいは内部に配設された配
線層と、外部電気回路と接続するための接続端子を具備
する配線基板を、有機樹脂を含有する絶縁体の少なくと
も表面に配線導体が形成された外部電気回路基板に載置
して、前記配線基板の接続端子を前記外部電気回路基板
の配線導体にロウ付けしてなるものであり、前記配線基
板の絶縁基板が、Si、Al、Zn、Mg、Zrを含
み、且つCa、Sr及びBaの中から選ばれる少なくと
も1種以上を構成元素として含むとともに、結晶相とし
て、SiO2 結晶相と、少なくともZn、Alを含むス
ピネル型結晶相と、ZrO2 結晶相とを含有し、且つ室
温から400℃における熱膨張係数が7ppm/℃以上
の焼結体からなることを特徴とするものである。
Further, according to the wiring board mounting structure of the present invention, there is provided a wiring board having an insulating substrate, a wiring layer provided on the surface or inside thereof, and a connection terminal for connecting to an external electric circuit. Mounted on an external electric circuit board having a wiring conductor formed on at least the surface of an insulator containing an organic resin, and the connection terminals of the wiring board being brazed to the wiring conductor of the external electric circuit board The insulating substrate of the wiring substrate contains Si, Al, Zn, Mg, and Zr, and contains at least one or more selected from Ca, Sr, and Ba as constituent elements, and has a crystal phase of SiO. A sintered body containing 2 crystal phases, a spinel type crystal phase containing at least Zn and Al, and a ZrO 2 crystal phase, and having a thermal expansion coefficient of 7 ppm / ° C. or more at room temperature to 400 ° C. It is characterized by.

【0012】[0012]

【発明の実施の形態】本発明の配線基板として、半導体
素子を収納搭載したパッケージを例として図1をもとに
説明する。図1は、半導体素子収納用パッケージ、特
に、接続端子がボール状端子からなるボールグリッドア
レイ(BGA)型パッケージの概略断面図である。図1
によれば、パッケージAは、絶縁材料からなる絶縁基板
1と蓋体2によりキャビティ3が形成されており、その
キャビティ3内には、半導体素子4が搭載されている。
BEST MODE FOR CARRYING OUT THE INVENTION A wiring board of the present invention will be described with reference to FIG. 1 by way of example of a package in which a semiconductor element is housed and mounted. FIG. 1 is a schematic cross-sectional view of a package for accommodating semiconductor elements, particularly a ball grid array (BGA) type package in which connection terminals are ball-shaped terminals. Figure 1
According to the package A, the cavity 3 is formed by the insulating substrate 1 made of an insulating material and the lid 2, and the semiconductor element 4 is mounted in the cavity 3.

【0013】また、絶縁基板1の表面および内部には、
半導体素子4と電気的に接続された配線層5が形成され
ている。この配線層5は、高周波信号の伝送時に導体損
失を極力低減するために、銅、銀あるいは金などの低抵
抗金属からなることが望ましい。また、この配線層5に
1GHz以上、特に20GHz以上、さらには、50G
Hz以上、またさらには70GHz以上の高周波信号を
伝送する場合には、高周波信号が損失なく伝送されるこ
とが必要となるため、周知のストリップ線路、マイクロ
ストリップ線路、コプレーナ線路、誘電体導波管線路の
うちの少なくとも1種から構成される。
On the surface and inside of the insulating substrate 1,
A wiring layer 5 electrically connected to the semiconductor element 4 is formed. The wiring layer 5 is preferably made of a low resistance metal such as copper, silver or gold in order to reduce conductor loss as much as possible when transmitting a high frequency signal. Further, the wiring layer 5 has a frequency of 1 GHz or more, particularly 20 GHz or more, and further 50 GHz.
In the case of transmitting a high frequency signal of Hz or higher, or even 70 GHz or higher, it is necessary to transmit the high frequency signal without loss, and therefore known strip lines, microstrip lines, coplanar lines, dielectric waveguides are known. It is composed of at least one of the lines.

【0014】また、図1のパッケージにおいて、絶縁基
板1の底面には、接続用電極層6が被着形成されてお
り、パッケージ内の配線層5と電気的に接続されてい
る。そして、接続用電極層6には、半田などのロウ材7
によりボール状端子8が被着形成されている。
Further, in the package of FIG. 1, a connection electrode layer 6 is adhered and formed on the bottom surface of the insulating substrate 1 and electrically connected to the wiring layer 5 in the package. Then, a brazing material 7 such as solder is formed on the connecting electrode layer 6.
Thus, the ball-shaped terminal 8 is adhered and formed.

【0015】本発明によれば、図1に示されるようなパ
ッケージにおける前記絶縁基板1を、Si、Al、Z
n、Mg、Zrを含み、且つCa、Sr及びBaの中か
ら選ばれる少なくとも1種を構成元素として含む複合酸
化物焼結体から構成する。また、この焼結体は、図2の
焼結体の組織を説明するための概略図に示すように、S
iO2 からなる結晶相(Si)と、少なくともZnOと
Al2 3 とからなるスピネル型結晶相(SP)のいず
れかを主たる結晶相とし、これら2つの結晶により、焼
結体中の全結晶相の50%以上を占めるものである。ま
た、本発明によれば、上記の2つの結晶相以外の結晶相
として、ZrO2 結晶相を含有する。
According to the present invention, the insulating substrate 1 in the package as shown in FIG.
It is composed of a composite oxide sintered body containing n, Mg and Zr and containing at least one selected from Ca, Sr and Ba as a constituent element. In addition, as shown in the schematic diagram for explaining the structure of the sintered body of FIG.
The main crystal phase is any one of a crystal phase (Si) made of iO 2 and a spinel type crystal phase (SP) made of at least ZnO and Al 2 O 3, and all of the crystals in the sintered body are formed by these two crystals. It accounts for 50% or more of the phases. Further, according to the present invention, a ZrO 2 crystal phase is contained as a crystal phase other than the above two crystal phases.

【0016】SiO2 からなる結晶相(Si)とは、ク
オーツ型結晶相からなることが望ましく、少なくともZ
nOとAl2 3 とを主体とするスピネル型結晶相(S
P)としては、ZnAl2 4 で表されるガーナイトな
どが挙げられる。ZrO2 結晶相は、単斜晶(ZrO2
(M)))および/または正方晶(ZrO2 (T))か
らなり、特に正方晶を含むことが望ましい。
The crystal phase (Si) made of SiO 2 is preferably a quartz type crystal phase, and at least Z
Spinel type crystal phase (S containing mainly nO and Al 2 O 3
Examples of P) include garnite represented by ZnAl 2 O 4 . The ZrO 2 crystal phase is monoclinic (ZrO 2
(M))) and / or a tetragonal crystal (ZrO 2 (T)), and it is particularly desirable to include a tetragonal crystal.

【0017】なお、上記の各結晶相中には、主たる構成
金属元素以外に結晶構造を変化させない範囲で、他の金
属元素が固溶していてもよい。例えば、ZnAl2 4
には、MgAl2 4 が固溶して、(Zn,Mg)Al
2 4 のスピネル型結晶相からなる場合もある。また、
クオーツ型結晶相中には、SiO2 以外にZn、Bが固
溶する場合もある。
In addition to the main constituent metallic elements, other metallic elements may be solid-dissolved in each of the above-mentioned crystal phases to the extent that the crystal structure is not changed. For example, ZnAl 2 O 4
MgAl 2 O 4 forms a solid solution with (Zn, Mg) Al.
It may consist of a spinel type crystal phase of 2 O 4 . Also,
In addition to SiO 2 , Zn and B may form a solid solution in the quartz crystal phase.

【0018】また、本発明によれば、上記3つの結晶以
外に、2MgO・2Al2 3 ・5SiO2 で表される
コージエライト型結晶相が微量存在する場合もある。さ
らに、焼結体組織においては、上記の結晶相の粒界に、
SiO2 、またはSiO2 、B2 3 、Al2 3 、ア
ルカリ土類を含むガラス相が存在する場合もある。
Further, according to the present invention, in addition to the above three crystals, a cordierite type crystal phase represented by 2MgO.2Al 2 O 3 .5SiO 2 may be present in a trace amount. Furthermore, in the sintered body structure, at the grain boundaries of the above crystal phase,
There may be a glass phase containing SiO 2 , or SiO 2 , B 2 O 3 , Al 2 O 3 , or an alkaline earth.

【0019】また、本発明における絶縁基板を構成する
複合酸化物焼結体の全体組成としては、Si、Al、Z
n、Mg、Zrを含み、且つCa、Sr及びBaの中か
ら選ばれる少なくとも1種の各金属の酸化物換算による
合量を100重量%とした時、SiO2 を30〜60重
量%、Al2 3 を18〜25重量%、ZnOを5〜3
5重量%、ZrO2 1〜3重量%、MgO5〜13重量
%、CaO、SrO及びBaOの合計量が6〜16重量
%の割合からなることが望ましい。
The overall composition of the complex oxide sintered body constituting the insulating substrate of the present invention is Si, Al, Z.
When the total amount of at least one metal selected from Ca, Sr, and Ba containing n, Mg, and Zr is calculated as 100 wt%, SiO 2 is 30 to 60 wt%, Al 18 to 25% by weight of 2 O 3 and 5 to 3 of ZnO
It is desirable that the total amount of 5 wt%, ZrO 2 1-3 wt%, MgO 5-13 wt%, CaO, SrO, and BaO be 6-16 wt%.

【0020】また、本発明によれば、結晶相として、前
記SiO2 結晶相、スピネル型結晶相およびZrO2
晶相は、室温から400℃において、それ自体が高い熱
膨張特性を有し、例えば、クオーツ型結晶は13〜20
ppm/℃、ガーナイト型結晶は7〜8ppm/℃、Z
rO2 結晶相は7〜9ppm/℃の熱膨張係数を有する
ことから、これらの結晶相により焼結体を構成すること
により、絶縁基板の熱膨張係数も大きくなる傾向にあ
る。熱膨張係数を高める上では、望ましくは、SiO2
結晶相、特にクオーツ型結晶相が最も多いのがよい。な
お、SiO2 結晶相としてクオーツの他にクリストバラ
イト、トリジマイトがあるが、クリストバライトは、2
00℃付近に熱膨張係数の屈曲点を有することから望ま
しくない。
Further, according to the present invention, as the crystal phase, the SiO 2 crystal phase, the spinel type crystal phase and the ZrO 2 crystal phase have high thermal expansion characteristics themselves at room temperature to 400 ° C. , Quartz type crystal is 13 ~ 20
ppm / ° C, 7-8 ppm / ° C for garnite type crystals, Z
Since the rO 2 crystal phase has a thermal expansion coefficient of 7 to 9 ppm / ° C., the thermal expansion coefficient of the insulating substrate tends to increase by forming a sintered body from these crystal phases. In order to increase the coefficient of thermal expansion, it is desirable to use SiO 2
The crystal phase, especially the quartz type crystal phase, is most preferable. As the SiO 2 crystal phase, there are cristobalite and tridymite in addition to quartz.
It is not desirable because it has a bending point of the coefficient of thermal expansion near 00 ° C.

【0021】本発明によれば、上記の複合酸化物焼結体
からなる絶縁基板は、誘電率が6以下、特に5以下と低
く、且つプリント基板との実装の信頼性を向上させる上
で、絶縁基板の室温から400℃における熱膨張係数が
7ppm/℃以上、特に9ppm/℃以上、さらには1
0ppm/℃以上であるのがよい。これは、上記熱膨張
係数が7ppm/℃よりも低いと、プリント基板との熱
膨張差により、半田実装時や半導体素子の作動停止によ
る繰り返し温度サイクルによって、プリント基板とパッ
ケージとの実装部に熱膨張差に起因する応力が発生し、
実装部にクラック等が発生し、実装構造の信頼性を損ね
てしまうためである。
According to the present invention, the insulating substrate made of the above complex oxide sintered body has a low dielectric constant of 6 or less, particularly 5 or less, and improves the reliability of mounting on a printed circuit board. The thermal expansion coefficient of the insulating substrate from room temperature to 400 ° C is 7 ppm / ° C or higher, particularly 9 ppm / ° C or higher, and further 1
It is preferably 0 ppm / ° C or higher. This is because when the coefficient of thermal expansion is lower than 7 ppm / ° C., the thermal expansion difference between the printed circuit board and the printed circuit board causes heat to be applied to the mounting part of the printed circuit board and the package due to repeated temperature cycles due to the operation stop of the semiconductor element. Stress caused by the difference in expansion occurs,
This is because a crack or the like occurs in the mounting portion, and the reliability of the mounting structure is impaired.

【0022】従って、本発明における実装構造は、図1
に示すように、ポリイミド樹脂、エポキシ樹脂、フェノ
ール樹脂などの有機樹脂を含む絶縁材料からなる絶縁基
板9の表面に配線導体10が形成された外部電気回路基
板Bに対して、ロウ材を介して実装されるものである。
具体的には、パッケージAにおける絶縁基板1の底面に
取付けられているボール状端子8と、外部電気回路基板
Bの配線導体10とを当接させてPb−Snなどの半田
等のロウ材11によりロウ付けして実装される。また、
ボール状端子8自体を溶融させて配線導体10と接続さ
せてもよい。
Therefore, the mounting structure in the present invention is as shown in FIG.
As shown in FIG. 3, with respect to the external electric circuit board B in which the wiring conductor 10 is formed on the surface of the insulating substrate 9 made of an insulating material containing an organic resin such as a polyimide resin, an epoxy resin, or a phenol resin, a brazing material is used. It will be implemented.
Specifically, the ball-shaped terminal 8 attached to the bottom surface of the insulating substrate 1 in the package A and the wiring conductor 10 of the external electric circuit board B are brought into contact with each other to make a brazing material 11 such as solder such as Pb-Sn. It is mounted by brazing. Also,
The ball-shaped terminal 8 itself may be melted and connected to the wiring conductor 10.

【0023】本発明によれば、このようなボール状端子
8を介在したロウ付けにより実装されるような表面実装
型のパッケージにおいて、有機樹脂を含む絶縁基板から
なる外部電気回路基板にロウ付け実装した場合において
も、外部電気回路基板の絶縁基板との熱膨張差を従来の
セラミック材料よりも小さくできることから、かかる実
装構造に対して、熱サイクルが印加された場合において
も、応力の発生を抑制することができる結果、実装構造
の長期信頼性を高めることができる。
According to the present invention, in the surface mount type package which is mounted by brazing with the ball-shaped terminal 8 interposed, it is soldered and mounted on the external electric circuit board made of the insulating substrate containing the organic resin. In this case, since the difference in thermal expansion between the external electric circuit board and the insulating substrate can be made smaller than that of the conventional ceramic material, stress generation is suppressed even when a thermal cycle is applied to such a mounting structure. As a result, the long-term reliability of the mounting structure can be improved.

【0024】次に、本発明における配線基板の絶縁基板
を構成する複合酸化物焼結体を製造する方法について説
明する。まず、出発原料として、SiO2 、Al
2 3 、MgO、ZnO、B2 3 を含む結晶化ガラス
粉末と、フィラー成分として、ZnO粉末、SiO2
末、あるいはウイレマイト(Zn2 SiO4 )粉末、B
2 3 粉末およびCa、Sr及びBaの中から選ばれる
少なくとも1種(M)の酸化物(MO)とZrO2 との
複合酸化物を組み合わせて用い、これらを所望の比率で
混合する。
Next, a method of manufacturing the composite oxide sintered body which constitutes the insulating substrate of the wiring substrate in the present invention will be described. First, as starting materials, SiO 2 , Al
Crystallized glass powder containing 2 O 3 , MgO, ZnO, B 2 O 3 , and ZnO powder, SiO 2 powder, or willemite (Zn 2 SiO 4 ) powder as a filler component, B
A composite oxide of 2 O 3 powder and at least one oxide (MO) selected from Ca, Sr and Ba and ZrO 2 is used in combination, and these are mixed in a desired ratio.

【0025】用いる結晶化ガラスの望ましい組成として
は、SiO2 40〜52重量%、Al2 3 14〜32
重量%、MgO4〜24重量%、ZnO1〜16重量
%、B2 3 5〜15重量%であることが望ましい。
The desirable composition of the crystallized glass used is as follows: SiO 2 40 to 52 wt%, Al 2 O 3 14 to 32
Wt%, MgO4~24 wt%, ZnO1~16 wt%, it is desirable that the B 2 O 3 5 to 15 wt%.

【0026】そして、上記ガラス粉末30〜95重量
%、特に60〜90重量%に対して、SiO2 を4.9
〜40重量%、特に9〜30重量%、MOとZrO2
合量で0.1〜10重量%、特に1〜5重量%の割合で
添加し、さらに任意成分としてZnOを0〜30重量
%、B2 3 を0〜10重量%の割合で添加混合する。
Then, with respect to 30 to 95% by weight, especially 60 to 90% by weight of the above glass powder, 4.9 SiO 2 is added.
-40% by weight, especially 9-30% by weight, MO and ZrO 2 are added in a total amount of 0.1-10% by weight, especially 1-5% by weight, and ZnO as an optional component is 0-30% by weight. % And B 2 O 3 in an amount of 0 to 10% by weight.

【0027】上記の原料粉末において、各成分を上記の
範囲に限定する理由は、ガラス粉末が30重量%よりも
少ないと、B2 3 を多量に配合しないと1000℃以
下の温度での焼成が不可能であり、95重量%よりも多
いと、熱膨張係数7ppm/℃以上が達成されなくな
る。
In the above raw material powder, the reason why each component is limited to the above range is that when the glass powder is less than 30% by weight, it is fired at a temperature of 1000 ° C. or less unless B 2 O 3 is blended in a large amount. Is not possible, and if it exceeds 95% by weight, the thermal expansion coefficient of 7 ppm / ° C. or more cannot be achieved.

【0028】また、SiO2 量が4.9重量%よりも少
ないと焼結体中でのSiO2 結晶相の絶対量が低下する
ために高熱膨張の焼結体が得られず、40重量%を越え
ると、難焼結性となり、1000℃以下の焼成温度で緻
密化できないためである。
When the amount of SiO 2 is less than 4.9% by weight, the absolute amount of the SiO 2 crystal phase in the sintered body decreases, so that a sintered body having a high thermal expansion cannot be obtained and 40% by weight is obtained. This is because if it exceeds 1.0, it becomes difficult to sinter and cannot be densified at a firing temperature of 1000 ° C. or less.

【0029】MOとZrO2 は、CaZrO3 等のMZ
rO3 系の複合酸化物として添加することが最も望まし
く、特にこのMOおよびZrO2 の添加により、かかる
系の焼結性を大幅に向上させることができ、低温焼成化
とともに、焼結体中のボイドの低減を図ることができ
る。また、一般に、Al2 3 やSiO2 からなるガラ
ス相の熱膨張係数は5〜6ppm/℃と低い。しかし、
SrOとガラス中のAl2 3 やSiO2 との反応を進
行させて、スラウソナイト等の複合酸化物を析出させる
と、このスラウソナイトが約7ppm/℃の高熱膨張特
性を有することから、焼結体全体の熱膨張係数をSrO
を添加しない場合に比較して0.5〜1ppm/℃程度
高めることができる。なお、残余のZrO2 は、上記の
結晶化を促進する役割をなす。しかし、ZrO2 自体の
誘電率が高いために多く残存すると系全体の誘電率が高
くなり望ましくない。
MO and ZrO 2 are MZ such as CaZrO 3.
It is most desirable to add it as a rO 3 -based composite oxide, and especially by adding MO and ZrO 2 , the sinterability of such a system can be greatly improved. Voids can be reduced. Further, the thermal expansion coefficient of the glass phase made of Al 2 O 3 or SiO 2 is generally as low as 5 to 6 ppm / ° C. But,
When SrO is allowed to react with Al 2 O 3 or SiO 2 in the glass to precipitate a complex oxide such as slausonite, the slausonite has a high thermal expansion property of about 7 ppm / ° C. The thermal expansion coefficient of the whole is SrO
Can be increased by about 0.5 to 1 ppm / ° C. as compared with the case where no is added. The remaining ZrO 2 plays a role of promoting the above crystallization. However, since the dielectric constant of ZrO 2 itself is high, if a large amount of ZrO 2 remains, the dielectric constant of the entire system becomes high, which is not desirable.

【0030】従って、MOおよびZrO2 の添加量が
0.1重量%よりも少ないと、焼結性の向上効果および
ボイドの低減効果が小さく、10重量%よりも多いと誘
電率が高くなる。
Therefore, if the amount of addition of MO and ZrO 2 is less than 0.1% by weight, the effect of improving sinterability and the effect of reducing voids are small, and if it is more than 10% by weight, the dielectric constant becomes high.

【0031】また、B2 3 およびZnOは、任意成分
であり、特に、これらの成分の添加により、焼結性を改
善することができる。但し、ZnO量が30重量%を越
えると1000℃以下の焼成が難しく、焼結体の熱膨張
係数が低くなり、B2 3 量が10重量%を越えると溶
剤へのB成分の溶解などの問題からスラリー化およびテ
ープ化が困難となるためである。
B 2 O 3 and ZnO are optional components, and the addition of these components can improve the sinterability. However, if the amount of ZnO exceeds 30% by weight, it is difficult to fire at 1000 ° C or lower, and the coefficient of thermal expansion of the sintered body becomes low, and if the amount of B 2 O 3 exceeds 10% by weight, dissolution of the B component in the solvent, etc. This is because it becomes difficult to form a slurry and a tape from the above problem.

【0032】そして、上記の組成で秤量混合された混合
粉末を用いて所定の成形体を作製し、その成形体を80
0〜1000℃の酸化性雰囲気または不活性雰囲気中で
焼成することにより作製することができる。
Then, a predetermined molded body is prepared by using the mixed powder which is weighed and mixed with the above composition, and the molded body is mixed with 80
It can be produced by firing in an oxidizing atmosphere or an inert atmosphere at 0 to 1000 ° C.

【0033】また、上記の焼結体を用いて配線層を具備
する配線基板を作製するには、前記混合粉末を用いて、
適当な有機溶剤、溶媒を用いて混合してスラリーを調製
し、これを従来周知のドクターブレード法やカレンダー
ロール法、あるいは圧延法、プレス成形法により、シー
ト状に成形する。そして、このシート状成形体に所望に
よりスルーホールを形成した後、スルーホール内に、
銅、金、銀のうちの少なくとも1種を含む金属ペースト
を充填する。そして、シート状成形体表面には、高周波
信号が伝送可能な高周波線路パターンを金属ペーストを
用いてスクリーン印刷法、グラビア印刷法などの配線層
の厚みが5〜30μmとなるように、印刷塗布する。そ
の後、複数のシート状成形体を位置合わせして積層圧着
した後、800〜1000℃の酸化性雰囲気または非酸
化性雰囲気で焼成することにより、配線基板を作製する
ことができる。
In order to manufacture a wiring board having a wiring layer using the above-mentioned sintered body, the above-mentioned mixed powder is used,
A slurry is prepared by mixing using a suitable organic solvent and a solvent, and the slurry is formed into a sheet by a conventionally known doctor blade method, calender roll method, rolling method or press molding method. Then, after forming a through hole in the sheet-shaped molded product as desired, in the through hole,
A metal paste containing at least one of copper, gold and silver is filled. Then, a high-frequency line pattern capable of transmitting a high-frequency signal is printed and applied on the surface of the sheet-shaped molded product by using a metal paste so that the wiring layer has a thickness of 5 to 30 μm by a screen printing method, a gravure printing method, or the like. . After that, a plurality of sheet-shaped compacts are aligned, laminated and pressure-bonded, and then fired in an oxidizing atmosphere or a non-oxidizing atmosphere at 800 to 1000 ° C. to manufacture a wiring board.

【0034】そして、この配線基板の表面には、半導体
素子が搭載され配線層と信号の伝達が可能なように接続
される。接続方法としては、配線層上に直接搭載させて
接続させたり、あるいはワイヤーボンディングや、TA
Bテープなどにより配線層と半導体素子とが接続され
る。
A semiconductor element is mounted on the surface of the wiring board and is connected to the wiring layer so that signals can be transmitted. As a connection method, it is directly mounted on the wiring layer for connection, or wire bonding or TA
The wiring layer and the semiconductor element are connected by a B tape or the like.

【0035】さらに、半導体素子が搭載された配線基板
表面に、絶縁基板と同種の絶縁材料や、その他の絶縁材
料、あるいは放熱性が良好な金属等からなるキャップを
ガラス、樹脂、ロウ材等の接着剤により接合することに
より、半導体素子を気密に封止することができ、これに
より半導体素子収納用パッケージを作製することができ
る。
Furthermore, on the surface of the wiring board on which the semiconductor element is mounted, a cap made of the same insulating material as the insulating board, other insulating material, or a metal having a good heat dissipation property, such as glass, resin, or brazing material, is used. By joining with an adhesive, the semiconductor element can be hermetically sealed, and thus a package for accommodating a semiconductor element can be manufactured.

【0036】[0036]

【実施例】下記の組成からなる2種のガラスを準備し
た。
Example Two kinds of glass having the following compositions were prepared.

【0037】ガラスA:SiO2 44重量%−Al2
3 29重量%−MgO11重量%−ZnO7重量%−B
2 3 9重量% ガラスB:SiO2 44重量%−Al2 3 26重量%
−MgO19重量%−ZnO1重量%−B2 3 10重
量% そして、この結晶化ガラス粉末に対して、平均粒径が1
μm以下のシリカ粉末(クオーツ)とZnO粉末、MZ
rO3 粉末(Mは、Ca、Sr及びBaの中から選ばれ
る少なくとも1種)、B2 3 粉末を用いて、表1、表
2の組成に従い混合した。
Glass A: 44% by weight of SiO 2 -Al 2 O
3 29% by weight-MgO 11% by weight-ZnO 7% by weight-B
2 O 3 9% by weight Glass B: SiO 2 44% by weight-Al 2 O 3 26% by weight
-MgO 19% by weight-ZnO 1% by weight-B 2 O 3 10% by weight And, with respect to this crystallized glass powder, the average particle size is 1
Silica powder (quartz) and ZnO powder of Mm or less, MZ
rO 3 powder (M is at least one selected from Ca, Sr, and Ba) and B 2 O 3 powder were used and mixed according to the compositions shown in Tables 1 and 2.

【0038】そして、この混合物に有機バインダー、可
塑剤、トルエンを添加し、スラリーを調製した後、この
スラリーを用いてドクターブレード法により厚さ300
μmのグリーンシートを作製した。そして、このグリー
ンシートを5枚積層し、50℃の温度で100kg/c
2 の圧力を加えて熱圧着した。得られた積層体を水蒸
気含有/窒素雰囲気中で700℃で脱バインダーした
後、乾燥窒素中で表1、表2の条件において焼成して絶
縁基板用焼結体を得た。
Then, an organic binder, a plasticizer and toluene are added to this mixture to prepare a slurry, and the slurry is used to obtain a thickness of 300 by a doctor blade method.
A μm green sheet was prepared. And 5 sheets of this green sheet are laminated and 100 kg / c at a temperature of 50 ° C.
A pressure of m 2 was applied for thermocompression bonding. The obtained laminated body was debindered at 700 ° C. in a water vapor-containing / nitrogen atmosphere and then fired in dry nitrogen under the conditions shown in Tables 1 and 2 to obtain a sintered body for an insulating substrate.

【0039】得られた焼結体について誘電率、誘電損失
を以下の方法で評価した。誘電率、誘電損失は、形状が
直径10mm、厚み5mmの試料を切り出し、15〜2
0GHzにてネットワークアナライザー、シンセサイズ
ドスイーパーを用いて誘電体円柱共振器法により測定し
た。測定では、φ50のCu板治具の間に試料の誘電体
基板を挟んで測定した。共振器のTE011モードの共
振特性より、誘電率、誘電損失を算出した。また、室温
から400℃における熱膨張曲線をとり、熱膨張係数を
算出した。測定の結果は表1、表2に示した。
The dielectric constant and the dielectric loss of the obtained sintered body were evaluated by the following methods. For the dielectric constant and the dielectric loss, a sample with a shape of 10 mm in diameter and 5 mm in thickness is cut out, and it is 15-2.
The measurement was performed by a dielectric cylinder resonator method using a network analyzer and a synthesized sweeper at 0 GHz. In the measurement, the sample dielectric substrate was sandwiched between φ50 Cu plate jigs. The dielectric constant and the dielectric loss were calculated from the resonance characteristics of the TE011 mode of the resonator. Further, the thermal expansion curve from room temperature to 400 ° C. was taken and the thermal expansion coefficient was calculated. The measurement results are shown in Tables 1 and 2.

【0040】また、焼結体中における結晶相をX線回折
測定から同定し、さらに非晶質相中の構成元素をEDX
(TEM)およびEPMAによって、その量が1000
ppm以上の元素を表1、表2に示した。
The crystal phase in the sintered body was identified by X-ray diffraction measurement, and the constituent elements in the amorphous phase were EDX.
(TEM) and EPMA give 1000
Table 1 and Table 2 show elements of ppm or more.

【0041】さらに、上記のグリーンシートに対して、
バイアホールを形成して銅ペーストを充填し、シート表
面に銅ペーストを配線パターンに印刷塗布し、また、最
下層のグリーンシートの底面には、内部の配線層と導通
する電極層を形成した後、これを5層積層して、上記と
同様な条件で焼成して35mm角、厚み1.2mmの多
層配線基板を作製した。
Further, with respect to the above green sheet,
After forming a via hole and filling with copper paste, the copper paste is printed and applied on the surface of the sheet to form a wiring pattern, and on the bottom surface of the lowermost green sheet, an electrode layer that conducts with the internal wiring layer is formed. Then, 5 layers of these were laminated and fired under the same conditions as above to prepare a multilayer wiring board having a size of 35 mm square and a thickness of 1.2 mm.

【0042】この多層配線基板の電極層に、Pb90重
量%−Sn10重量%の半田からなるボール状端子を低
融点半田(Pb37重量%−Sn63重量%)により取
着した。なお、ボール状端子は、1cm2 当たり30個
の密度で配線基板の底面全体に形成した。
Ball-shaped terminals made of solder of 90% by weight of Pb-10% by weight of Sn were attached to the electrode layers of this multilayer wiring board by low melting point solder (37% by weight of Pb-63% by weight of Sn). The ball-shaped terminals were formed on the entire bottom surface of the wiring board at a density of 30 per cm 2 .

【0043】そして、この配線基板をガラス−エポキシ
基板からなる40〜800℃における熱膨張係数が13
ppm/℃の絶縁基板の表面に銅箔からなる配線導体が
形成されたプリント基板に実装した。実装は、プリント
基板表面の配線導体と配線基板のボール状端子とを位置
合わせして、前記低融点半田によって実装した。
This wiring board is made of a glass-epoxy board and has a coefficient of thermal expansion of 13 at 40 to 800 ° C.
It was mounted on a printed board in which a wiring conductor made of copper foil was formed on the surface of an insulating board of ppm / ° C. The mounting was performed by aligning the wiring conductor on the surface of the printed board and the ball-shaped terminal of the wiring board and mounting with the low melting point solder.

【0044】上記のようにして多層配線基板をプリント
基板に実装したものを大気雰囲気にて−40℃と125
℃の各温度に制御した恒温槽に15分/15分の保持を
1サイクルとして最高1000サイクル繰り返した。そ
して、各サイクル毎にプリント基板の配線導体と配線基
板間の電気抵抗を測定し電気抵抗の変化が現れるまでの
サイクル数を表1、表2に示した。
The printed circuit board on which the multilayer wiring board is mounted as described above is placed at −40 ° C. and 125 ° C. in an air atmosphere.
Holding for 15 minutes / 15 minutes in a constant temperature bath controlled to each temperature of ° C was set as one cycle, and a maximum of 1000 cycles were repeated. Then, the electric resistance between the wiring conductor of the printed circuit board and the wiring board was measured for each cycle, and the number of cycles until a change in the electric resistance appears is shown in Tables 1 and 2.

【0045】また、一部の試料については、フィラー成
分として、ZnO、SiO2 に代わり、Al2 3
末、コージェライト粉末を用いて同様に焼結体を作製し
評価した(試料No.8、9、24、25)。また、上記
結晶化ガラスA、Bに代わり、以下の組成からなるガラ
スCおよびガラスDを用いて同様に評価を行った(試料
No.26〜29)。
Further, for some of the samples, Al 2 O 3 powder and cordierite powder were used in place of ZnO and SiO 2 as filler components, and sintered bodies were similarly prepared and evaluated (Sample No. 8). , 9, 24, 25). Further, instead of the above-mentioned crystallized glasses A and B, the same evaluation was carried out using glasses C and D having the following compositions (Samples No. 26 to 29).

【0046】 ガラスC:SiO2 10.4重量%−Al2 3 2.5重量% −B2 3 45.3重量%−CaO35.2重量% −Na2 O6.6重量% ガラスD:SiO2 14重量%−Al2 3 24.7重量% −B2 3 22.6重量%−BaO14.2重量% −Li2 O12.8重量%−Na2 O11.7重量%Glass C: SiO 2 10.4 wt% -Al 2 O 3 2.5 wt% -B 2 O 3 45.3 wt% -CaO 35.2 wt% -Na 2 O 6.6 wt% Glass D: SiO 2 14 wt% -Al 2 O 3 24.7 wt% -B 2 O 3 22.6 wt% -BaO14.2 wt% -Li 2 O12.8 wt% -Na 2 O11.7 wt%

【0047】[0047]

【表1】 [Table 1]

【0048】[0048]

【表2】 [Table 2]

【0049】表1、表2の結果から明らかなように、本
発明に基づき、クオーツ型結晶相およびスピネル型結晶
相を主体とし、ZrO2 結晶相を含む熱膨張係数が7p
pm/℃以上の高熱膨張係数を有する焼結体は、いずれ
も15〜20GHzの測定周波数にて、誘電率6以下、
誘電損失が30×10-4以下の優れた誘電特性を有する
とともに、プリント基板への実装において、熱サイクル
試験でいずれも1000サイクル試験後もプリント基板
との実装不良を生じることがなかった。
As is clear from the results of Tables 1 and 2, according to the present invention, the thermal expansion coefficient including the quartz type crystal phase and the spinel type crystal phase as the main components and including the ZrO 2 crystal phase is 7 p.
All of the sintered bodies having a high coefficient of thermal expansion of pm / ° C. or higher have a dielectric constant of 6 or less at a measurement frequency of 15 to 20 GHz.
In addition to having excellent dielectric properties with a dielectric loss of 30 × 10 −4 or less, in mounting on a printed circuit board, no mounting failure with the printed circuit board occurred in the thermal cycle test even after 1000 cycle tests.

【0050】これに対して、組成において、SiO2
Al2 3 −MgO−ZnO−B23 を含むガラス量
が、95重量%よりも多い試料No.1では、熱膨張係数
7ppm/℃以上が達成されず、30重量%よりも少な
い試料No.15では、B2 3 を多量に配合しないと低
温で焼結することが困難であり、その結果、液相成分が
溶出して焼結体にならなかった。また、ZnO量が30
重量%を越える試料No.12では、1000℃以下での
焼成が難しく、熱膨張係数も低いものであった。
On the other hand, in terms of composition, SiO 2
In the sample No. 1 in which the amount of glass containing Al 2 O 3 —MgO—ZnO—B 2 O 3 was more than 95% by weight, the thermal expansion coefficient of 7 ppm / ° C. or higher was not achieved, and the sample was less than 30% by weight. In No. 15, it was difficult to sinter at low temperature unless a large amount of B 2 O 3 was added, and as a result, the liquid phase component was eluted and a sintered body was not formed. In addition, the amount of ZnO is 30
Sample No. 12, which exceeded the weight percentage, was difficult to fire at 1000 ° C. or lower and had a low coefficient of thermal expansion.

【0051】また、SiO2 を無添加またはSiO2
が4.9重量%よりも少ない試料No.1、7、17で
は、いずれも熱膨張係数が低いものであった。逆に40
重量%を越える試料No.13では、1000℃以下で緻
密化することができなかった。
Further, in samples No. 1, 7, and 17 in which SiO 2 was not added or the amount of SiO 2 was less than 4.9% by weight, the coefficient of thermal expansion was low. Conversely, 40
In Sample No. 13 in which the content was more than 10% by weight, densification could not be performed at 1000 ° C or lower.

【0052】B2 3 量が10重量%を越える試料No.
14、15では、液相が溶出し緻密化できなかった。
Sample No. in which the amount of B 2 O 3 exceeds 10% by weight.
In Nos. 14 and 15, the liquid phase was eluted and could not be densified.

【0053】試料No.8、9、24、25は、ガラスへ
の添加成分としてAl2 3 やコージェライトを配合し
たものであるが、焼結体中にコージェライトやAl2
3 などの結晶が析出して熱膨張係数が低くなった。
Samples Nos. 8, 9, 24 and 25 were prepared by mixing Al 2 O 3 or cordierite as an additive component to glass, but cordierite or Al 2 O was added to the sintered body.
Crystals such as 3 were precipitated and the coefficient of thermal expansion became low.

【0054】さらに、ガラスとして、MgOやZnOを
含まないガラスC、Dを用いた試料No.26〜29で
は、誘電損失が大きくなる傾向にあった。
Further, in samples No. 26 to 29 using glasses C and D containing no MgO or ZnO as the glass, the dielectric loss tended to increase.

【0055】[0055]

【発明の効果】以上詳述した通り、本発明の配線基板に
よれば、絶縁基板を特定の結晶相が析出した複合酸化物
焼結体により構成することにより、1000℃以下の低
温で焼成できることから、銅などの低抵抗金属による配
線層を形成でき、しかも1GHz以上の高周波領域にお
いて、低誘電率、低誘電損失を有することから、高周波
信号を極めて良好に損失なく伝送することができる。し
かも、この絶縁基板は、高熱膨張特性を有することか
ら、有機樹脂を含む絶縁基板を具備するプリント基板な
どのマザーボードに対してロウ材等により実装した場合
においても優れた耐熱サイクル性を有し、高信頼性の実
装構造を提供できる。
As described above in detail, according to the wiring board of the present invention, it is possible to sinter at a low temperature of 1000 ° C. or less by forming the insulating substrate from the complex oxide sintered body in which a specific crystal phase is deposited. Therefore, a wiring layer made of a low-resistance metal such as copper can be formed, and since it has a low dielectric constant and a low dielectric loss in a high frequency region of 1 GHz or higher, a high frequency signal can be transmitted extremely excellently without loss. Moreover, since this insulating substrate has high thermal expansion characteristics, it has excellent heat cycle characteristics even when mounted on a mother board such as a printed circuit board having an insulating substrate containing an organic resin with a brazing material or the like, A highly reliable mounting structure can be provided.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の配線基板を用いたBGA型の半導体素
子収納用パッケージの一例を説明するための概略断面図
である。
FIG. 1 is a schematic cross-sectional view for explaining an example of a BGA type semiconductor element housing package using a wiring board of the present invention.

【図2】本発明の絶縁基板における焼結体の組織を説明
するための概略図である。
FIG. 2 is a schematic diagram for explaining the structure of a sintered body in the insulating substrate of the present invention.

【符号の説明】[Explanation of symbols]

A 半導体素子収納用パッケージ B 外部電気回路基板 1 絶縁基板 2 蓋体 3 キャビティ 4 半導体素子 5 配線層 6 接続用電極層 7,11 ロウ材 8 ボール状端子 9 絶縁基板 10 配線導体 Si SiO2 結晶相 SP スピネル型結晶相 Z(M) ZrO2 結晶相(単斜晶) Z(T) ZrO2 結晶相(正方晶) G 非晶質相A Package for storing semiconductor element B External electric circuit board 1 Insulating substrate 2 Lid 3 Cavity 4 Semiconductor element 5 Wiring layer 6 Connection electrode layers 7, 11 Brazing material 8 Ball-shaped terminal 9 Insulating substrate 10 Wiring conductor Si SiO 2 crystal phase SP Spinel type crystal phase Z (M) ZrO 2 crystal phase (monoclinic) Z (T) ZrO 2 crystal phase (tetragonal) G Amorphous phase

フロントページの続き (51)Int.Cl.7 識別記号 FI H05K 3/46 H01L 23/14 C Continuation of front page (51) Int.Cl. 7 Identification code FI H05K 3/46 H01L 23/14 C

Claims (6)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】絶縁基板と、その表面および/または内部
に配設された配線層を具備してなる配線基板において、
前記絶縁基板が、Si、Al、Zn、Mg、Zrを含
み、且つCa、Sr及びBaの中から選ばれる少なくと
も1種を構成元素として含むとともに、結晶相として、
SiO2 結晶相と、少なくともZn、Alを含むスピネ
ル型結晶相と、ZrO2 結晶相とを含有し、且つ室温か
ら400℃における熱膨張係数が7ppm/℃以上の複
合酸化物焼結体からなることを特徴とする配線基板。
1. A wiring board comprising an insulating substrate and a wiring layer disposed on the surface and / or inside thereof.
The insulating substrate contains Si, Al, Zn, Mg, and Zr, and contains at least one selected from Ca, Sr, and Ba as a constituent element, and as a crystal phase,
A composite oxide sintered body containing a SiO 2 crystal phase, a spinel type crystal phase containing at least Zn and Al, and a ZrO 2 crystal phase, and having a coefficient of thermal expansion at room temperature to 400 ° C. of 7 ppm / ° C. or more. A wiring board characterized by the above.
【請求項2】前記SiO2 結晶相が、クオーツ型結晶相
である請求項1記載の配線基板。
2. The wiring board according to claim 1, wherein the SiO 2 crystal phase is a quartz crystal phase.
【請求項3】前記ZrO2 結晶相が、単斜晶および/ま
たは正方晶からなる請求項1記載の配線基板。
3. The wiring board according to claim 1, wherein the ZrO 2 crystal phase is composed of a monoclinic crystal and / or a tetragonal crystal.
【請求項4】前記複合酸化物焼結体が、SiO2 、Al
2 3 、MgO、ZnOおよびB2 3 を含むガラス粉
末30〜95重量%と、SiO2 4.9〜40重量%
と、Ca、Sr及びBaの中から選ばれる少なくとも1
種とZrO2 との複合酸化物0.1〜10重量%と、Z
nO0〜30重量%と、B2 3 0〜10重量%とから
なる混合物を成形後、800〜1000℃の温度で焼成
してなる請求項1記載の配線基板。
4. The composite oxide sintered body is composed of SiO 2 , Al.
30 to 95% by weight of glass powder containing 2 O 3 , MgO, ZnO and B 2 O 3 and 4.9 to 40% by weight of SiO 2
And at least 1 selected from Ca, Sr and Ba
0.1 to 10% by weight of a composite oxide of a seed and ZrO 2, and Z
The wiring board according to claim 1, which is obtained by molding a mixture of 0 to 30% by weight of nO and 0 to 10% by weight of B 2 O 3 and then firing the mixture at a temperature of 800 to 1000 ° C.
【請求項5】前記ガラス粉末が、SiO2 40〜52重
量%、Al2 3 14〜32重量%、MgO4〜24重
量%、ZnO1〜16重量%、B2 3 5〜15重量%
の割合からなることを特徴とする請求項4記載の配線基
板。
5. The glass powder comprises SiO 2 40 to 52 wt%, Al 2 O 3 14 to 32 wt%, MgO 4 to 24 wt%, ZnO 1 to 16 wt%, B 2 O 3 5 to 15 wt%.
The wiring board according to claim 4, characterized in that
【請求項6】絶縁基板と、その表面および/または内部
に配設された配線層と、外部電気回路と接続するための
接続端子を具備する配線基板を、有機樹脂を含有する絶
縁体の少なくとも表面に配線導体が形成された外部電気
回路基板に載置して、前記配線基板の接続端子を前記外
部電気回路基板の配線導体にロウ付けしてなる配線基板
の実装構造において、前記配線基板の絶縁基板が、S
i、Al、Zn、Mg、Zrを含み、且つCa、Sr及
びBaの中から選ばれる少なくとも1種を含むととも
に、結晶相として、SiO2 結晶相と、少なくともZ
n、Alを含むスピネル型結晶相と、ZrO2 結晶相と
を含有し、且つ室温から400℃における熱膨張係数が
7ppm/℃以上の複合酸化物焼結体からなることを特
徴とする配線基板の実装構造。
6. A wiring board comprising an insulating substrate, a wiring layer disposed on the surface and / or inside thereof, and a connection terminal for connecting to an external electric circuit, at least an insulator containing an organic resin. In a mounting structure of a wiring board, the wiring board is mounted on an external electric circuit board having a wiring conductor formed on a surface thereof, and the connection terminals of the wiring board are brazed to the wiring conductor of the external electric circuit board. The insulating substrate is S
i, Al, Zn, Mg, Zr, and at least one selected from Ca, Sr, and Ba, and the crystal phase includes a SiO 2 crystal phase and at least Z
A wiring board comprising a complex oxide sintered body containing a spinel type crystal phase containing n and Al and a ZrO 2 crystal phase and having a thermal expansion coefficient of 7 ppm / ° C. or more from room temperature to 400 ° C. Implementation structure of.
JP35431497A 1997-03-31 1997-12-24 Wiring board and its mounting structure Expired - Fee Related JP3441950B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP35431497A JP3441950B2 (en) 1997-12-24 1997-12-24 Wiring board and its mounting structure
US09/049,312 US6120906A (en) 1997-03-31 1998-03-27 Insulated board for a wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35431497A JP3441950B2 (en) 1997-12-24 1997-12-24 Wiring board and its mounting structure

Publications (2)

Publication Number Publication Date
JPH11180729A JPH11180729A (en) 1999-07-06
JP3441950B2 true JP3441950B2 (en) 2003-09-02

Family

ID=18436721

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Country Link
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4497627B2 (en) * 1999-10-29 2010-07-07 京セラ株式会社 Glass ceramic sintered body, method for producing the same, wiring board, and mounting structure thereof
US11192818B2 (en) * 2017-11-30 2021-12-07 Corning Incorporated Ion exchangeable, transparent gahnite-spinel glass ceramics with high hardness and modulus

Also Published As

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