JPH1073629A - Monitoring apparatus for insulation degradation of printed-circuit board - Google Patents

Monitoring apparatus for insulation degradation of printed-circuit board

Info

Publication number
JPH1073629A
JPH1073629A JP8227976A JP22797696A JPH1073629A JP H1073629 A JPH1073629 A JP H1073629A JP 8227976 A JP8227976 A JP 8227976A JP 22797696 A JP22797696 A JP 22797696A JP H1073629 A JPH1073629 A JP H1073629A
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
monitor
printed
patterns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8227976A
Other languages
Japanese (ja)
Inventor
Shoji Yamada
昭治 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP8227976A priority Critical patent/JPH1073629A/en
Publication of JPH1073629A publication Critical patent/JPH1073629A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0254High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits

Landscapes

  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a monitoring apparatus, for the insulation degradation of a printed-circuit board, by which the progress of the insulation degradation is monitored continuously and by which the state of the insulation degradation can be grasped at an early stage. SOLUTION: In a monitoring apparatus for the insulation degradation of a printed-circuit board, two monitoring electrodes 21a, 21b are formed on a printed-circuit board 11 on which a main circuit is constituted or on another printed-circuit board of the same quality as the printed-circuit board 11, a power supply S and an ampere meter A are connected in series across the monitoring electrodes 21a, 21b, and the insulation degradation of the printed-circuit board is monitored. In the monitoring apparatus, the extension length Lm of the monitoring electrodes 21a, 21b is at the extension length Ls of a pattern whose electric-field strength is maximum in the main circuit, and a voltage is applied across the monitoring electrodes 21a, 21b from the power supply S in such a way that the electric-field strength between them becomes equal to the maximum electric-field strength.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、電気・電子機
器、特に屋外または密閉空間等の悪環境下で使用されて
いる電気・電子機器に用いられているプリント基板にお
ける絶縁劣化をモニターする絶縁劣化モニター装置に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulation deterioration monitoring apparatus for monitoring insulation deterioration of a printed circuit board used in an electric or electronic device, particularly, an electric or electronic device used in a bad environment such as outdoors or in a closed space. It relates to a monitoring device.

【0002】[0002]

【従来の技術】プリント基板はガラスクロスをエポキシ
樹脂により固化した板表面に銅などの金属箔が接着され
ているものを代表とする複合材、またはアルミニウム等
の金属板にエポキシ樹脂等を介して金属箔が接着されて
いるものである。この金属箔は必要に応じてパターン化
され電極や配線とされ、各パターンには電子、電気部品
のリードやステムがはんだ付けされて実装される。ま
た、リードやステムを貫通固定するためのスルーホール
がプリント基板に開けられ、その内面には金属が密着さ
れている場合もある。
2. Description of the Related Art A printed circuit board is made of a composite material such as a copper cloth or the like having a metal cloth adhered to a plate surface obtained by solidifying a glass cloth with an epoxy resin, or a metal plate of aluminum or the like via an epoxy resin or the like. The metal foil is bonded. The metal foil is patterned as necessary into electrodes and wirings, and leads and stems of electronic and electric components are mounted on each pattern by soldering. In some cases, a through hole for fixing leads and stems is formed in the printed circuit board, and a metal is adhered to the inner surface thereof.

【0003】このようなプリント基板を持った電気・電
子機器を塵埃、腐食性ガスあるいは湿度などの高い悪環
境下で使用していると、マイグレーションや絶縁材の劣
化により、電圧が印加されているパターンやスルーホー
ルの間の絶縁性の劣化が加速されることが知られている
(例えば、電気学会技術報告第559号、有機複合材料
の電気・電子写真絶縁への適用調査委員会(1995発行)
、64〜65頁)。このような絶縁性の劣化は、プリント
基板中でパターン(以下、スルーホールもパターンで表
すことにする)間の電界強度(パターン間の電圧/パタ
ーン間距離)が最大のパターン間で最も進行しやすい。
When an electric or electronic device having such a printed circuit board is used in a bad environment such as dust, corrosive gas or humidity, a voltage is applied due to migration or deterioration of an insulating material. It is known that the deterioration of insulation properties between patterns and through holes is accelerated (for example, Technical Report No. 559 of the Institute of Electrical Engineers of Japan, Investigation Committee for Application of Organic Composite Materials to Electro-Electro-photographic Insulation (issued in 1995) )
64-65). Such deterioration of the insulation property progresses most between the patterns in which the electric field strength (voltage between patterns / distance between patterns) between the patterns (hereinafter, the through holes are also represented by the patterns) in the printed circuit board is the largest. Cheap.

【0004】図6は従来の電気・電子機器に使用されて
いるプリント基板の要部を模式的に示し、(a)は平面
図であり、(b)は(a)におけるXX断面図である。
プリント基板1の上には電気・電子機器の動作のための
主回路(図示してない)が構成されているが、そのうち
の最大の電界強度のパターン対をパターン2a、2bは
とする。パターン2a、2b間には部品3が実装され、
その部品3のリード31はハンダによりハンダ付けされ
ている。パターン2a、2bには他の部品が接続されて
いることもある。
FIGS. 6A and 6B schematically show a main part of a printed circuit board used in a conventional electric / electronic device, wherein FIG. 6A is a plan view, and FIG. 6B is a sectional view taken along line XX in FIG. .
A main circuit (not shown) for the operation of the electric / electronic device is formed on the printed circuit board 1, and the pattern pair having the maximum electric field strength is defined as the patterns 2a and 2b. The component 3 is mounted between the patterns 2a and 2b,
The lead 31 of the component 3 is soldered by solder. Other components may be connected to the patterns 2a and 2b.

【0005】また、プリント基板の表面には、絶縁特性
の強化および外部から進入する汚染から基板を保護する
ためにポリウレタン系樹脂などのコーティング材4がコ
ーティングされていることが多い。電気・電子機器は小
型化を指向しているため、パターン2a、2b間はでき
るだけ短い絶縁距離で設計されている。従来は、主回路
には動作上必要のないパターンが無いように設計されて
いる。
[0005] The surface of the printed circuit board is often coated with a coating material 4 such as a polyurethane-based resin in order to strengthen the insulating properties and protect the board from contamination entering from the outside. Since electric and electronic devices are aimed at miniaturization, the patterns 2a and 2b are designed with an insulation distance as short as possible. Conventionally, the main circuit is designed so that there is no unnecessary pattern in operation.

【0006】[0006]

【発明が解決しようとする課題】長期信頼性の要求され
るインバータあるいはインバータを応用した無停電電源
装置などにおいては、パターン間の絶縁特性(例えば絶
縁抵抗等)の経時変化を検査する必要性が生じることが
ある。このような場合、絶縁特性検査のために使用する
ことができる電極パターンは主回路のパターン2a、2
bだけであり、主回路の動作を停止させなければならな
い。
In an inverter or an uninterruptible power supply using the inverter which requires long-term reliability, it is necessary to inspect a change over time in insulation characteristics (for example, insulation resistance and the like) between patterns. May occur. In such a case, the electrode patterns that can be used for the inspection of the insulation characteristics are the main circuit patterns 2a, 2a,
Only b, the operation of the main circuit must be stopped.

【0007】しかし、停止させることは装置の稼働状況
によっては困難であり、実際は定期点検の時にしか絶縁
特性の検査はできなかった。従って、絶縁劣化早期発見
による絶縁破壊の未然防止が大きな問題となっている。
上述した従来の問題点に鑑み、この発明の目的は、絶縁
劣化の進行を連続的にモニターし、絶縁劣化状態の早期
把握によって絶縁破壊による事故の未然防止を可能とす
るプリント基板の絶縁劣化モニター装置を提供すること
にある。
However, it is difficult to stop the operation depending on the operating condition of the apparatus. In practice, the insulation characteristics can be inspected only at the time of periodic inspection. Therefore, prevention of insulation breakdown by early detection of insulation deterioration is a major problem.
In view of the above-mentioned conventional problems, an object of the present invention is to continuously monitor the progress of insulation deterioration, and to monitor the insulation deterioration state at an early stage to prevent the occurrence of an accident due to insulation breakdown by monitoring the insulation deterioration state early. It is to provide a device.

【0008】[0008]

【課題を解決するための手段】上記の目的を達成するた
めに、主回路が構成されているプリント基板上に、また
は前記プリント基板と同質の他のプリント基板上に形成
された2個のモニター電極と前記モニター電極の間に電
源および電流計が直列接続されてなり、電流値によりプ
リント基板の絶縁劣化をモニターするプリント基板の絶
縁劣化モニター装置であって、前記モニター電極の沿線
長さは主回路中の最大電界強度であるパターンの沿線長
さ以上であり、前記モニター電極へは、これらの間の電
界強度が前記最大電界強度に等しくなるように前記電源
により電圧が印加されることとする。
In order to achieve the above-mentioned object, two monitors formed on a printed circuit board on which a main circuit is formed or on another printed circuit board of the same quality as the printed circuit board are provided. A power supply and an ammeter are connected in series between an electrode and the monitor electrode, and the insulation deterioration monitoring device for the printed circuit board monitors the insulation deterioration of the printed circuit board based on a current value. A voltage is applied to the monitor electrodes by the power supply so that the electric field strength between the monitor electrodes is equal to or greater than the maximum electric field strength. .

【0009】前記モニター電極間の距離は主回路の前記
パターン間の距離以下であると良い。前記モニター電極
は互いに入り組んだ櫛形電極であると良い。前記モニタ
ー電流値が所定の値以上のときには警報を発する警報器
が設けられていると良い。
The distance between the monitor electrodes is preferably smaller than the distance between the patterns of the main circuit. The monitor electrodes are preferably comb electrodes that are intricate with each other. It is preferable that an alarm device for issuing an alarm when the monitor current value is equal to or more than a predetermined value is provided.

【0010】前記主回路の動作に連動して前記印加電圧
が印加されるように制御装置が設けられていると良い。
It is preferable that a control device is provided so that the applied voltage is applied in conjunction with the operation of the main circuit.

【0011】[0011]

【発明の実施の形態】BEST MODE FOR CARRYING OUT THE INVENTION

実施例1 図1は本発明に係る実施例の絶縁劣化モニター装置の模
式構成図である。従来のプリント基板(図4)に対応す
る部分には同一記号を付している。プリント基板11上
に主回路のパターン2a、2bの他に、新たに、絶縁劣
化モニター専用のモニターパターン21a 21bを設
けてあり、モニターパターンは電圧可変電源(以下、電
源と記す)Sと電流計Aに直列接続されている。この電
源Sと電流計Aとの組み合わせは抵抗測定の原理を示し
たものであり、いわゆる、絶縁抵抗測定器等に置き換え
ても同等である。また、主回路の印加電圧に対応して、
モニターには直流の他に交流またはパルス電源を用いる
ことができる。
Embodiment 1 FIG. 1 is a schematic configuration diagram of an insulation deterioration monitoring device of an embodiment according to the present invention. Parts corresponding to the conventional printed circuit board (FIG. 4) are denoted by the same reference numerals. In addition to the main circuit patterns 2a and 2b, monitor patterns 21a and 21b dedicated to insulation deterioration monitoring are newly provided on the printed circuit board 11. The monitor patterns include a variable voltage power supply (hereinafter referred to as a power supply) S and an ammeter. A is connected in series. This combination of the power supply S and the ammeter A shows the principle of resistance measurement, and is equivalent to a so-called insulation resistance measuring device. Also, corresponding to the applied voltage of the main circuit,
An AC or pulse power source can be used for the monitor in addition to the DC.

【0012】主回路のパターンにコーティングが施して
あればモニターパターン21a、21bにも同じコーテ
ィングを施こして、パターンの環境を同じとする。主回
路のパターン2a、2b間距離をDs、パターン2a、
2bが最短距離で向かい合う長さを沿線長さとし、これ
をLs、印加されている電圧(実電圧)をVsとする。
一方、本発明に係るモニターパターン21a 21bに
おいては、同様にパターン間距離をDm、向かい合う沿
線長さをLm、電圧可変電源Eの出力電圧(モニターパ
ターンに印加されているモニター電圧)をVmとする。
実電圧Vsがあまり高くないときにはモニター電圧Vm
を同じとしても問題はないが、高い場合は電源Eが大体
積で高価となるので問題である。そこで、両者のパター
ン間電界が等しくなるように、Vm/Dm=Ds/Vs
とし、モニターパターン間でも主回路のパターン間と同
じ特性劣化が起こるようにした。
If the pattern of the main circuit is coated, the same coating is applied to the monitor patterns 21a and 21b so that the pattern environment is the same. The distance between the patterns 2a and 2b of the main circuit is Ds, the pattern 2a,
The length at which 2b faces each other at the shortest distance is defined as a track length, this is defined as Ls, and the applied voltage (actual voltage) is defined as Vs.
On the other hand, in the monitor patterns 21a and 21b according to the present invention, similarly, the distance between the patterns is Dm, the length of the facing line is Lm, and the output voltage of the voltage variable power supply E (the monitor voltage applied to the monitor pattern) is Vm. .
When the actual voltage Vs is not so high, the monitor voltage Vm
There is no problem even if the values are the same, but if it is high, there is a problem because the power source E is large and expensive. Therefore, Vm / Dm = Ds / Vs so that the electric field between the patterns becomes equal.
The same characteristic degradation occurs between the monitor patterns as between the patterns of the main circuit.

【0013】モニターパターン間Dmを小さくすれば、
モニターパターンに要する面積は小さく、主回路のプリ
ント基板を特に大きくする必要はない。また、モニター
電圧は低くでき、電源Sの体積は小さく、安価とするこ
とができる。また、沿線距離においては、Lm≧Lsと
してあるので、モニターパターン間で特性劣化の起こる
機会は多く、また抵抗値は小さく劣化時の電流感度が高
い。沿線は直線である必要はなく、二重渦巻きパター
ン、櫛形の組み合わせパターン等は(沿線長/パターン
部全面積)が大きくプリント基板の面積負担が小さい。
また、プリント基板上の複数カ所に分散させておくこと
も、汚染の機会を増加させる上で有効である。
If Dm between monitor patterns is reduced,
The area required for the monitor pattern is small, and the printed circuit board of the main circuit does not need to be particularly large. Further, the monitor voltage can be reduced, the volume of the power supply S is small, and the cost can be reduced. Further, since Lm ≧ Ls is set for the distance along the track, there are many chances of characteristic degradation occurring between monitor patterns, and the resistance value is small and the current sensitivity during degradation is high. The route does not need to be a straight line, and a double spiral pattern, a comb-shaped combination pattern, and the like have a large (route length / total area of the pattern portion) and a small area load on the printed circuit board.
Also, dispersing the ink at a plurality of locations on the printed circuit board is effective in increasing the chance of contamination.

【0014】このように、モニターパターンは主回路と
は接続していないため、機器の動作状態にかかわらず常
時絶縁特性を測定することが可能となり、従来のように
定期点検を待たずに任意の時点でプリント基板の絶縁性
劣化を確認することができる。 実施例2 図2は本発明に係る他の実施例のプリント基板の絶縁劣
化モニター装置の模式構成図である。この実施例におい
ては、主回路に用いられているプリント基板と同質の小
サイズのモニタープリント基板12にモニターパターン
2a、2bを形成してある。この小プリント基板12を
主回路のプリント基板と同じ環境または同じ機器内に設
置しておき、実施例1と同様にモニターパターン2a、
2bは電源Sと電流計Aに直列接続される。
As described above, since the monitor pattern is not connected to the main circuit, it is possible to always measure the insulation characteristics irrespective of the operation state of the equipment, and it is possible to measure the insulation characteristics without waiting for the periodic inspection as in the prior art. At this point, the insulation deterioration of the printed circuit board can be confirmed. Embodiment 2 FIG. 2 is a schematic configuration diagram of a printed circuit board insulation deterioration monitoring apparatus according to another embodiment of the present invention. In this embodiment, monitor patterns 2a and 2b are formed on a monitor printed circuit board 12 of the same size as the printed circuit board used for the main circuit. This small printed circuit board 12 is installed in the same environment or in the same device as the printed circuit board of the main circuit, and the monitor patterns 2a,
2b is connected in series to the power supply S and the ammeter A.

【0015】実施例1と同様に主回路のプリント基板の
絶縁劣化をモニターできる。また、主回路のプリント基
板を新たに起こすことは不要であり、既製の電気・電子
機器に、本発明に係る絶縁劣化モニター装置を後から取
り付けることができる。 実施例3 図3は本発明に係る別の実施例のプリント基板の絶縁劣
化モニター装置のモニターパターンの模式平面図であ
る。実施例2におけるモニタープリント基板12に櫛形
パターン22a、22bを組み合わせた。櫛の刃の長さ
lmとその向かい合う数n(図の場合はn=5)の積が
沿線長となる。(沿線長/パターン部全面積)が大きく
電流感度が高い。 実施例4 図4は本発明に係る別の実施例のプリント基板の絶縁劣
化モニター装置の模式構成図である。実施例1の絶縁劣
化モニター装置に、主回路のパターン2aまたは2bへ
の通電を検知しモニター回路のスイッチSWを閉じるン
トローラCと、モニター電流値が設定値を越えると表示
または音声による警報を発する警報器ALを設けてあ
る。
As in the first embodiment, the deterioration of the insulation of the printed circuit board of the main circuit can be monitored. Further, it is not necessary to newly raise the printed circuit board of the main circuit, and the insulation deterioration monitoring device according to the present invention can be attached to an already-made electric / electronic device later. Embodiment 3 FIG. 3 is a schematic plan view of a monitor pattern of an apparatus for monitoring insulation deterioration of a printed circuit board according to another embodiment of the present invention. Comb-shaped patterns 22a and 22b were combined with the monitor printed board 12 in Example 2. The product of the length lm of the comb blade and its opposing number n (n = 5 in the case of the figure) is the length along the line. (Long line length / total area of pattern portion) is large and current sensitivity is high. Fourth Embodiment FIG. 4 is a schematic configuration diagram of a printed circuit board insulation deterioration monitoring apparatus according to another embodiment of the present invention. The controller for closing the switch SW of the monitor circuit upon detecting the current supply to the pattern 2a or 2b of the main circuit and issuing an alarm by display or sound when the monitor current value exceeds the set value are supplied to the insulation deterioration monitoring device of the first embodiment. An alarm AL is provided.

【0016】主電源が入っていても、パターン2a、2
bが属する主回路が必ずしも動作していない機器におい
ては、モニターパターンへの電圧印加時間の積算が実動
作時間の積算を超過し、必要以上に早く警報を発してし
まうことを防止できる。また、警報発生により監視が容
易になる。 実施例5 主回路のモニター対象パターンが小さく、簡単な場合は
以下のようにしてもよい。
Even if the main power is turned on, the patterns 2a, 2a
In a device in which the main circuit to which b belongs does not necessarily operate, it is possible to prevent the integration of the voltage application time to the monitor pattern from exceeding the integration of the actual operation time and issuing an alarm earlier than necessary. In addition, monitoring is facilitated by the generation of an alarm. Fifth Embodiment When the pattern to be monitored in the main circuit is small and simple, the following may be performed.

【0017】図5は本発明に係る別の実施例のプリント
基板の絶縁劣化モニター装置の模式構成図である。この
実施例のモニター回路は、電極2a、2b、電子部品3
とそのポスト31およびコーティング材4の全てがモニ
ターしたい主回路と同じとした。また同じ電圧を印加し
た。従って、同じ劣化が起こることが期待でき、実際の
事故につながる劣化状態より軽度の劣化を電流計は捉え
ることができる。
FIG. 5 is a schematic structural view of a printed circuit board insulation deterioration monitoring apparatus according to another embodiment of the present invention. The monitor circuit of this embodiment includes the electrodes 2a and 2b, the electronic component 3
And the post 31 and the coating material 4 were all the same as the main circuit to be monitored. The same voltage was applied. Accordingly, the same deterioration can be expected to occur, and the ammeter can detect deterioration that is less severe than the deterioration state that leads to an actual accident.

【0018】[0018]

【発明の効果】本発明によれば、主回路が構成されてい
るプリント基板上に、または前記プリント基板と同質の
他のプリント基板上に形成された2個のモニター電極と
前記モニター電極の間に電源および電流計が直列接続さ
れてなり、電流値によりプリント基板の絶縁劣化をモニ
ターするプリント基板の絶縁劣化モニター装置であっ
て、前記モニター電極の沿線長さは主回路中の最大電界
強度であるパターンの沿線長さ以上であり、前記モニタ
ー電極へは、これらの間の電界強度が前記最大電界強度
に等しくなるように前記電源により電圧が印加されるこ
ととしたため、機器の動作状態にかかわらず常時絶縁特
性を測定することが可能となり、従来のように定期点検
を待たずに任意の時点でプリント基板の絶縁性劣化を確
認することができ、プリント基板の絶縁性劣化による事
故を未然に防止できる。
According to the present invention, between two monitor electrodes formed on a printed circuit board on which a main circuit is formed or on another printed circuit board of the same quality as the printed circuit board, between the monitor electrodes A power supply and an ammeter are connected in series, the insulation deterioration monitoring device of the printed circuit board for monitoring the insulation deterioration of the printed circuit board by the current value, the length along the monitor electrode is the maximum electric field strength in the main circuit. It is longer than the length along a certain pattern, and a voltage is applied by the power supply to the monitor electrodes so that the electric field strength between them becomes equal to the maximum electric field strength. It is possible to always measure the insulation characteristics, and it is possible to check the insulation deterioration of the printed circuit board at any time without waiting for the periodic inspection as in the past, Accidents caused by lint insulating substrate degradation can be prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る実施例のプリント基板の絶縁劣化
モニター装置の模式構成図
FIG. 1 is a schematic configuration diagram of an apparatus for monitoring insulation deterioration of a printed circuit board according to an embodiment of the present invention.

【図2】本発明に係る他の実施例のプリント基板の絶縁
劣化モニター装置の模式構成図
FIG. 2 is a schematic configuration diagram of an apparatus for monitoring insulation deterioration of a printed circuit board according to another embodiment of the present invention.

【図3】本発明に係る別の実施例のプリント基板の絶縁
劣化モニター装置のモニターパターンの模式平面図
FIG. 3 is a schematic plan view of a monitor pattern of an apparatus for monitoring insulation deterioration of a printed circuit board according to another embodiment of the present invention.

【図4】本発明に係る別の実施例のプリント基板の絶縁
劣化モニター装置の模式構成図
FIG. 4 is a schematic configuration diagram of a printed circuit board insulation deterioration monitoring apparatus according to another embodiment of the present invention.

【図5】本発明に係る別の実施例のプリント基板の絶縁
劣化モニター装置の模式構成図
FIG. 5 is a schematic configuration diagram of a printed circuit board insulation deterioration monitoring apparatus according to another embodiment of the present invention.

【図6】従来の電気・電子機器に使用されているプリン
ト基板の要部を示し、(a)は平面図、(b)は(a)
におけるXX断面図
6A and 6B show a main part of a printed circuit board used in a conventional electric / electronic device, wherein FIG. 6A is a plan view and FIG.
XX sectional view in FIG.

【符号の説明】[Explanation of symbols]

1 プリント基板 11 プリント基板 12 小プリント基板 2a 電極 2b 電極 21a 電極 21b 電極 22a 電極 22b 電極 3 電気部品 4 コーティング材 S 電源 A 電流計 Ds パターン間距離 Ls パターン沿線長さ Dm モニターパターン間距離 Lm モニターパターン沿線長さ C コントローラ SW スイッチ AL 警報器 Reference Signs List 1 printed circuit board 11 printed circuit board 12 small printed circuit board 2a electrode 2b electrode 21a electrode 21b electrode 22a electrode 22b electrode 3 electric component 4 coating material S power supply A ammeter Ds distance between patterns Ls length along line Dm distance between monitor patterns Lm monitor pattern Line length C Controller SW Switch AL Alarm

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】主回路が構成されているプリント基板上
に、または前記プリント基板と同質の他のプリント基板
上に形成された2個のモニター電極と前記モニター電極
の間に電源および電流計が直列接続されてなり、電流値
によりプリント基板の絶縁劣化をモニターするプリント
基板の絶縁劣化モニター装置であって、前記モニター電
極の沿線長さは主回路中の最大電界強度であるパターン
の沿線長さ以上であり、前記モニター電極へは、これら
の間の電界強度が前記最大電界強度に等しくなるように
前記電源により電圧が印加されることを特徴とするプリ
ント基板の絶縁劣化モニター装置。
A power supply and an ammeter are provided between two monitor electrodes formed on a printed circuit board on which a main circuit is formed or on another printed circuit board of the same type as the printed circuit board. A printed circuit board insulation deterioration monitoring device which is connected in series and monitors insulation deterioration of the printed circuit board based on a current value, wherein a length along a line of the monitor electrode is a length along a pattern which is a maximum electric field strength in a main circuit. As described above, a voltage is applied to the monitor electrode by the power supply so that an electric field intensity between the monitor electrodes becomes equal to the maximum electric field intensity.
【請求項2】前記モニター電極間の距離は主回路の前記
パターン間の距離以下であることを特徴とする請求項1
に記載のプリント基板の絶縁劣化モニター装置。
2. The apparatus according to claim 1, wherein a distance between said monitor electrodes is smaller than a distance between said patterns of a main circuit.
2. A device for monitoring insulation deterioration of a printed circuit board according to claim 1.
【請求項3】前記モニター電極は互いに入り組んだ櫛形
電極であることを特徴とする請求項1または2に記載の
プリント基板の絶縁劣化モニター装置。
3. An apparatus according to claim 1, wherein said monitor electrodes are comb-shaped electrodes intertwined with each other.
【請求項4】前記モニター電流値が所定の値以上のとき
には警報を発する警報器が設けられていることを特徴と
する請求項1ないし3に記載のプリント基板の絶縁劣化
モニター装置。
4. An apparatus according to claim 1, further comprising an alarm device for issuing an alarm when said monitor current value is equal to or greater than a predetermined value.
【請求項5】主回路の動作に連動して前記印加電圧が印
加されるように制御装置が設けられていることを特徴と
する請求項1ないし4に記載のプリント基板の絶縁劣化
モニター装置。
5. The printed circuit board insulation deterioration monitoring device according to claim 1, wherein a control device is provided so that the applied voltage is applied in conjunction with the operation of the main circuit.
JP8227976A 1996-08-29 1996-08-29 Monitoring apparatus for insulation degradation of printed-circuit board Pending JPH1073629A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8227976A JPH1073629A (en) 1996-08-29 1996-08-29 Monitoring apparatus for insulation degradation of printed-circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8227976A JPH1073629A (en) 1996-08-29 1996-08-29 Monitoring apparatus for insulation degradation of printed-circuit board

Publications (1)

Publication Number Publication Date
JPH1073629A true JPH1073629A (en) 1998-03-17

Family

ID=16869217

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8227976A Pending JPH1073629A (en) 1996-08-29 1996-08-29 Monitoring apparatus for insulation degradation of printed-circuit board

Country Status (1)

Country Link
JP (1) JPH1073629A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009264989A (en) * 2008-04-28 2009-11-12 Hitachi Ltd Control device
JP2016151563A (en) * 2015-02-19 2016-08-22 三菱電機株式会社 Semiconductor device
JP2017020845A (en) * 2015-07-08 2017-01-26 ファナック株式会社 Printed circuit board with deterioration detection function and motor drive device with the same
US9733300B2 (en) * 2012-08-23 2017-08-15 Kone Corporation Corrosion detection system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009264989A (en) * 2008-04-28 2009-11-12 Hitachi Ltd Control device
JP4734371B2 (en) * 2008-04-28 2011-07-27 株式会社日立製作所 Elevator control device
US9733300B2 (en) * 2012-08-23 2017-08-15 Kone Corporation Corrosion detection system
JP2016151563A (en) * 2015-02-19 2016-08-22 三菱電機株式会社 Semiconductor device
JP2017020845A (en) * 2015-07-08 2017-01-26 ファナック株式会社 Printed circuit board with deterioration detection function and motor drive device with the same

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