JPH1065506A - Signal selection output circuit - Google Patents
Signal selection output circuitInfo
- Publication number
- JPH1065506A JPH1065506A JP21742896A JP21742896A JPH1065506A JP H1065506 A JPH1065506 A JP H1065506A JP 21742896 A JP21742896 A JP 21742896A JP 21742896 A JP21742896 A JP 21742896A JP H1065506 A JPH1065506 A JP H1065506A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input terminal
- input
- time constant
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、2つの入力信号の
内の一方を選択して出力する信号選択出力回路に関する
もので、特に、2つの入力信号のDC(直流レベル)が
異なる場合に切り換えても直ちに出力DCが変化(応
答)可能な信号選択出力回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal selection output circuit for selecting and outputting one of two input signals, and more particularly to switching when two input signals have different DC (direct current levels). The present invention also relates to a signal selection output circuit that can change (response) the output DC immediately.
【0002】[0002]
【従来の技術】図2は、従来の信号選択出力回路を示す
ものである。図2の信号源(1)(直流電圧も同時に発
生する)からは図3の点線のDC信号(入力1)が発生
する。又、図2の電圧源(2)からは図3の一点鎖線の
DC信号(入力2)が発生する。図3の一点鎖線のDC
信号は、図3の点線のDC信号に比べレベルが低くなっ
ている。2. Description of the Related Art FIG. 2 shows a conventional signal selection output circuit. A DC signal (input 1) indicated by a dotted line in FIG. 3 is generated from the signal source (1) in FIG. 2 (which also generates a DC voltage at the same time). A DC signal (input 2) indicated by a dashed line in FIG. 3 is generated from the voltage source (2) in FIG. The dashed line DC in FIG.
The level of the signal is lower than that of the DC signal indicated by the dotted line in FIG.
【0003】この状態で、図2のスイッチ(3)が図示
のようにa側に切り替わっていると時定数回路(4)の
コンデンサ(5)は、信号源(1)からの図3の点線の
DC信号のレベルに充電される。この状態から、図2の
スイッチ(3)がb側に切り替わると電圧源(2)のレ
ベルは低いので時定数回路(4)のコンデンサ(5)
は、図4の点線のレベルから一点鎖線のレベルに放電す
る。In this state, when the switch (3) in FIG. 2 is switched to the a side as shown in the figure, the capacitor (5) of the time constant circuit (4) is connected to the dotted line in FIG. Is charged to the level of the DC signal. From this state, when the switch (3) in FIG. 2 is switched to the b side, the level of the voltage source (2) is low, so the capacitor (5) of the time constant circuit (4)
Discharges from the level of the dotted line in FIG. 4 to the level of the dashed line.
【0004】それにより、出力端子(6)にはスイッチ
(3)の切り替わりにより直流レベルの変化した出力信
号が得られる。As a result, an output signal having a changed DC level is obtained at the output terminal (6) by switching the switch (3).
【0005】[0005]
【発明が解決しようとする課題】しかしながら、図2の
回路では、図4に示すように入力1から入力2に切り替
わる際に時間(T1)がかかるという問題があった。図
2の回路では抵抗(7)とコンデンサ(5)の時定数に
より放電時間が定まるため該時定数が長い時に問題とな
る。However, the circuit of FIG. 2 has a problem that it takes time (T1) to switch from input 1 to input 2 as shown in FIG. In the circuit of FIG. 2, since the discharge time is determined by the time constant of the resistor (7) and the capacitor (5), a problem arises when the time constant is long.
【0006】[0006]
【課題を解決するための手段】本発明は、上述の点に鑑
みなされたもので、一端が入力端子に接続され他端が出
力端子に接続された抵抗と該抵抗の他端に接続されたコ
ンデンサとを有する時定数回路と、一方の入力端子に第
1入力信号が、他方の入力端子が前記時定数回路の入力
端子に接続され、その出力端子が前記抵抗の入力端子に
接続される差動増幅器を有する第1のボルテージフォロ
ア回路と、一方の入力端子に第2入力信号が、他方の入
力端子に前記コンデンサの電圧が印加され、その出力端
子が前記抵抗の入力端子に接続される差動増幅器を有す
る第2のボルテージフォロア回路とを備え、前記第1入
力信号又は前記第2入力信号の選択に応じて前記第1の
ボルテージフォロア回路又は前記第2のボルテージフォ
ロア回路を動作させ前記時定数回路の前記出力端子より
選択された信号を導出するようにしたことを特徴とす
る。SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has one end connected to an input terminal, the other end connected to an output terminal, and another end connected to the other end of the resistor. A time constant circuit having a capacitor; a first input signal connected to one input terminal; a second input terminal connected to an input terminal of the time constant circuit; and an output terminal connected to an input terminal of the resistor. A first voltage follower circuit having a dynamic amplifier; a second input signal applied to one input terminal; a voltage applied to the capacitor applied to the other input terminal; and an output terminal connected to an input terminal of the resistor. A second voltage follower circuit having a dynamic amplifier, wherein the first voltage follower circuit or the second voltage follower circuit is operated in response to selection of the first input signal or the second input signal. Characterized by being adapted to derive a signal selected from the output terminal of the time constant circuit.
【0007】[0007]
【発明の実施の形態】図1は、本発明の信号選択出力回
路を示すもので、(7)は入力1が印加される入力端
子、(8)は入力2が印加される入力端子、(9)は一
端が入力端子(10)に接続され他端が出力端子(1
1)に接続された抵抗(12)と該抵抗(12)の他端
に接続されたコンデンサ(13)とを有する時定数回
路、(14)は一方の入力端子に入力1が、他方の入力
端子が前記時定数回路(9)の入力端子(10)に接続
され、その出力側が入力端子(10)に接続される差動
増幅器(15)を有する第1のボルテージフォロア回
路、(16)は一方の入力端子に入力2が、他方の入力
端子に前記コンデンサ(13)の電圧が印加され、その
出力側が前記入力端子(10)に接続される差動増幅器
(17)を有する第2のボルテージフォロア回路であ
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a signal selection output circuit according to the present invention. (7) is an input terminal to which an input 1 is applied, (8) is an input terminal to which an input 2 is applied, 9) has one end connected to the input terminal (10) and the other end connected to the output terminal (1).
1) A time constant circuit having a resistor (12) connected to the resistor (12) and a capacitor (13) connected to the other end of the resistor (12). A first voltage follower circuit having a differential amplifier (15) having a terminal connected to the input terminal (10) of the time constant circuit (9) and an output side connected to the input terminal (10); A second voltage having a differential amplifier (17) to which the input 2 is applied to one input terminal and the voltage of the capacitor (13) is applied to the other input terminal, and the output side of which is connected to the input terminal (10); It is a follower circuit.
【0008】まず、図1のスイッチ(18)が図示のよ
うにa側の状態であり、差動増幅器の動作電流源(1
9)の電流が差動増幅器(15)に流れているとする。
すると、差動増幅器(15)は、第1のボルテージフォ
ロア回路(14)として動作する。ボルテージフォロア
回路とは入力電圧と等しい電圧を発生するものである。
このため、第1のボルテージフォロア回路(14)が動
作すると差動増幅器(15)を構成するトランジスタの
ベース電圧が等しくなるように帰還がかかる。即ち、差
動増幅器(15)の出力電流は、電流ミラー回路(2
0)に流れ、トランジスタ(21)のベース・エミッタ
を介してトランジスタ(22)のベースに帰還される。First, the switch (18) in FIG. 1 is in the state on the a side as shown in FIG.
Assume that the current 9) is flowing through the differential amplifier (15).
Then, the differential amplifier (15) operates as a first voltage follower circuit (14). The voltage follower circuit generates a voltage equal to the input voltage.
Therefore, when the first voltage follower circuit (14) operates, feedback is applied so that the base voltages of the transistors constituting the differential amplifier (15) become equal. That is, the output current of the differential amplifier (15) is equal to the current mirror circuit (2
0), and is fed back to the base of the transistor (22) via the base / emitter of the transistor (21).
【0009】その結果、入力1と等しい電圧がトランジ
スタ(22)のベースに発生する。例えば、いま入力1
を5Vとすると、時定数回路(9)の入力端子(10)
にも5VのDC電圧が発生する。入力端子(10)に5
VのDC電圧が発生すると、時定数回路(9)への充電
が行われ、出力端子(11)の電圧も5Vに上昇する。As a result, a voltage equal to the input 1 is generated at the base of the transistor (22). For example, input 1 now
Is 5V, the input terminal (10) of the time constant circuit (9)
Also generates a DC voltage of 5V. 5 for input terminal (10)
When a DC voltage of V is generated, the time constant circuit (9) is charged, and the voltage of the output terminal (11) also increases to 5V.
【0010】この5VのDC電圧が伝わった状態で交流
信号もその上に重畳されて出力される。次にこの状態か
ら入力2に切り換えるにはスイッチ(18)をb側に切
り換えるようにすればよい。スイッチ(18)をb側に
切り換えると、差動増幅器の動作電流源(19)の電流
が差動増幅器(17)に流れる。すると、差動増幅器
(17)が、第1のボルテージフォロア回路(14)の
場合と同様に、第2のボルテージフォロア回路(16)
として動作する。電流ミラー回路(20)と差動増幅器
の動作電流源(19)は、第1のボルテージフォロア回
路(14)の場合と、第2のボルテージフォロア回路
(16)の場合で兼用されており素子によるバラツキが
低減されている。While the DC voltage of 5 V is transmitted, an AC signal is also superimposed thereon and output. Next, to switch from this state to the input 2, the switch (18) may be switched to the b side. When the switch (18) is switched to the b side, the current of the operating current source (19) of the differential amplifier flows to the differential amplifier (17). Then, as in the case of the first voltage follower circuit (14), the differential amplifier (17) is connected to the second voltage follower circuit (16).
Works as The current mirror circuit (20) and the operating current source (19) of the differential amplifier are shared between the case of the first voltage follower circuit (14) and the case of the second voltage follower circuit (16). Variation is reduced.
【0011】今、入力2を2Vとすると、コンデンサ
(13)には5Vの電圧が充電されているのでトランジ
スタ(23)がオフし、トランジスタ(24)がオンす
る。トランジスタ(24)のオンにより、トランジスタ
(21)のベースにはベース電流が流れなくなりトラン
ジスタ(21)はオフする。この時、コンデンサ(1
3)の電荷は、抵抗(12)及び定電流源(25)を介
して放電が行われる。図1の回路構成ではコンデンサ
(13)の上端(出力端子(11))の電圧が2Vにな
るようなループが構成されているので、入力端子(1
0)の電圧はそれよりも低くなる。すると、抵抗(1
2)の両端間の電圧差が大きくなり、放電電流の値が大
きくなるので放電時間が短くなる。When the input 2 is set to 2 V, the transistor (23) is turned off and the transistor (24) is turned on because the capacitor (13) is charged with 5V. When the transistor (24) is turned on, the base current does not flow through the base of the transistor (21), and the transistor (21) is turned off. At this time, the capacitor (1
The charge of 3) is discharged via the resistor (12) and the constant current source (25). In the circuit configuration of FIG. 1, a loop is formed such that the voltage at the upper end (output terminal (11)) of the capacitor (13) becomes 2 V, so that the input terminal (1
The voltage of 0) is lower. Then, the resistance (1
2) The voltage difference between both ends becomes large, and the value of the discharge current becomes large, so that the discharge time becomes short.
【0012】上述の説明では、コンデンサ(13)の電
圧が高い値から低い値に放電する場合について説明した
が、逆にコンデンサ(13)の電圧が低い値から高い値
に充電される場合も同様である。In the above description, the case where the voltage of the capacitor (13) is discharged from a high value to a low value has been described. Conversely, the case where the voltage of the capacitor (13) is charged from a low value to a high value is the same. It is.
【0013】[0013]
【発明の効果】以上述べた如く、本発明によれば、ボル
テージフォロア回路の帰還ループ内に時定数回路の抵抗
を取り込んでいるので、2つの入力信号の内の一方を選
択して出力する際に、2つの入力信号のDCが異なる場
合に切り換えても直ちに出力DCが変化(応答)可能で
ある。As described above, according to the present invention, since the resistance of the time constant circuit is incorporated in the feedback loop of the voltage follower circuit, when one of the two input signals is selected and output. In addition, the output DC can be changed (responded) immediately even if switching is performed when the DC of the two input signals is different.
【図1】本発明の信号選択出力回路を示す回路図であ
る。FIG. 1 is a circuit diagram showing a signal selection output circuit of the present invention.
【図2】従来の信号選択出力回路を示すブロック図であ
る。FIG. 2 is a block diagram showing a conventional signal selection output circuit.
【図3】図2の説明に供するための波形図である。FIG. 3 is a waveform diagram for explaining FIG. 2;
【図4】図2の説明に供するための波形図である。FIG. 4 is a waveform chart for explanation of FIG. 2;
(9) 時定数回路 (14) 第1のボルテージフォロア回路 (15) 差動増幅器 (16) 第2のボルテージフォロア回路 (17) 差動増幅器 (9) Time constant circuit (14) First voltage follower circuit (15) Differential amplifier (16) Second voltage follower circuit (17) Differential amplifier
Claims (2)
子に接続された抵抗と該抵抗の他端に接続されたコンデ
ンサとを有する時定数回路と、 一方の入力端子に第1入力信号が、他方の入力端子が前
記時定数回路の入力端子に接続され、その出力端子が前
記抵抗の入力端子に接続される差動増幅器を有する第1
のボルテージフォロア回路と、 一方の入力端子に第2入力信号が、他方の入力端子に前
記コンデンサの電圧が印加され、その出力端子が前記抵
抗の入力端子に接続される差動増幅器を有する第2のボ
ルテージフォロア回路とを備え、前記第1入力信号又は
前記第2入力信号の選択に応じて前記第1のボルテージ
フォロア回路又は前記第2のボルテージフォロア回路を
動作させ前記時定数回路の前記出力端子より選択された
信号を導出するようにしたことを特徴とする信号選択出
力回路。A time constant circuit having a resistor having one end connected to the input terminal and the other end connected to the output terminal, and a capacitor connected to the other end of the resistor; and a first input signal connected to one input terminal. Has a differential amplifier whose other input terminal is connected to the input terminal of the time constant circuit and whose output terminal is connected to the input terminal of the resistor.
And a differential amplifier having a second input signal applied to one input terminal, a voltage of the capacitor applied to the other input terminal, and an output terminal connected to an input terminal of the resistor. A voltage follower circuit for operating the first voltage follower circuit or the second voltage follower circuit in response to selection of the first input signal or the second input signal, and the output terminal of the time constant circuit. A signal selection output circuit for deriving a more selected signal.
子に接続された抵抗と該抵抗の他端に接続されたコンデ
ンサとを有する時定数回路と、 一方の入力端子に第1入力信号が、他方の入力端子が前
記時定数回路の入力端子に接続されその出力端子が電流
ミラー回路を介して前記時定数回路の入力端子に接続さ
れる差動増幅器を有する第1のボルテージフォロア回路
と、 一方の入力端子に第2入力信号が、他方の入力端子に前
記コンデンサの電圧が印加され、その出力端子が前記電
流ミラー回路を介して前記時定数回路の入力端子に接続
される差動増幅器を有する第2のボルテージフォロア回
路とを備え、前記第1入力信号又は前記第2入力信号の
選択に応じて前記第1のボルテージフォロア回路又は前
記第2のボルテージフォロア回路を動作させ前記時定数
回路の前記出力端子より選択された信号を導出するよう
にしたことを特徴とする信号選択出力回路。2. A time constant circuit having one end connected to an input terminal and the other end connected to an output terminal, and a capacitor connected to the other end of the resistor, and a first input signal connected to one input terminal. A first voltage follower circuit having a differential amplifier whose other input terminal is connected to the input terminal of the time constant circuit and whose output terminal is connected to the input terminal of the time constant circuit via a current mirror circuit; A differential amplifier having a second input signal applied to one input terminal, a voltage of the capacitor applied to the other input terminal, and an output terminal connected to the input terminal of the time constant circuit via the current mirror circuit; And a second voltage follower circuit having a second voltage follower circuit, and operates the first voltage follower circuit or the second voltage follower circuit in response to selection of the first input signal or the second input signal. Signal selection output circuit, characterized in that so as to derive a signal selected from the output terminal of the time constant circuit is.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21742896A JP3454642B2 (en) | 1996-08-19 | 1996-08-19 | Signal selection output circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21742896A JP3454642B2 (en) | 1996-08-19 | 1996-08-19 | Signal selection output circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH1065506A true JPH1065506A (en) | 1998-03-06 |
JP3454642B2 JP3454642B2 (en) | 2003-10-06 |
Family
ID=16704067
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21742896A Expired - Fee Related JP3454642B2 (en) | 1996-08-19 | 1996-08-19 | Signal selection output circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3454642B2 (en) |
-
1996
- 1996-08-19 JP JP21742896A patent/JP3454642B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP3454642B2 (en) | 2003-10-06 |
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