JPH1050768A - Package for housing semiconductor device - Google Patents

Package for housing semiconductor device

Info

Publication number
JPH1050768A
JPH1050768A JP19927196A JP19927196A JPH1050768A JP H1050768 A JPH1050768 A JP H1050768A JP 19927196 A JP19927196 A JP 19927196A JP 19927196 A JP19927196 A JP 19927196A JP H1050768 A JPH1050768 A JP H1050768A
Authority
JP
Japan
Prior art keywords
semiconductor element
semiconductor device
insulating base
package
connection pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19927196A
Other languages
Japanese (ja)
Other versions
JP3372769B2 (en
Inventor
Shin Matsuda
伸 松田
Kenji Nakamura
憲志 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP19927196A priority Critical patent/JP3372769B2/en
Publication of JPH1050768A publication Critical patent/JPH1050768A/en
Application granted granted Critical
Publication of JP3372769B2 publication Critical patent/JP3372769B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device housing package capable of electrically connecting each electrode of a semiconductor device put inside to a predetermined external electric circuit stably for over a long period of time. SOLUTION: This package comprises an insulating base substance 1 made out of electrical insulating material and having a semiconductor device 3 mount section 1a on the top surface and a large number of recession 1b in the underside, a plurality of metalized wiring layers 5 led out from the periphery of the mount section 1a over to the bottoms of the recessions 1b, a plurality of connecting pads 6 formed in the recessions 1b and having arcshaped dents in the underside, and terminals 7 having approximately spherical projecting parts 7b on the underside of the insulating base substance 1. The generation of a fatigue failure caused by thermal stress of the junction between the connecting pads 6 and the terminals 7 is prevented, by causing a semiconductor device mount package to satisfy conditional expressions of 1.0<R/r<=9.0, and R>=(r<2> +d<2> )/2d, when the radius of curvature of the arcshaped dent of each connecting pad 6 is represented by R, and the radius and the depth of each recession 1b are represented by (r) and (d) respectively.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体集積回路素子
等の半導体素子を収容するための半導体素子収納用パッ
ケージに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing a semiconductor device such as a semiconductor integrated circuit device.

【0002】[0002]

【従来の技術】従来、LSI(大規模集積回路素子)等
の半導体素子を収容するための半導体素子収納用パッケ
ージは、一般にアルミナセラミックス等の電気絶縁材料
から成り、その上面のほぼ中央に半導体素子を載置して
収容するための載置部を有する絶縁基体と、その載置部
周辺から絶縁基体の下面にかけて導出されるタングステ
ン・モリブデン等の高融点金属粉末から成る複数個のメ
タライズ配線層と、絶縁基体の下面に形成され、メタラ
イズ配線層が電気的に接続される複数個の接続パッド
と、接続パッドにロウ付け取着される半田等からなるほ
ぼ球状の端子と、前記載置部を封止するための蓋体とか
ら構成されており、絶縁基体の載置部底面にガラスや樹
脂等から成る接着剤を介して半導体素子を接着固定さ
せ、半導体素子の各電極とメタライズ配線層とをボンデ
ィングワイヤを介して電気的に接続させるとともに、絶
縁基体上面にガラスや樹脂等から成る封止材を介して蓋
体を接合させ、絶縁基体と蓋体とから成る容器内部に半
導体素子を気密に封止することによって製品としての半
導体装置とされていた。
2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element such as an LSI (large-scale integrated circuit element) is generally made of an electrically insulating material such as alumina ceramics, and has a semiconductor element substantially at the center of its upper surface. An insulating substrate having a mounting portion for mounting and housing the same, and a plurality of metallized wiring layers made of a refractory metal powder such as tungsten and molybdenum drawn out from around the mounting portion to the lower surface of the insulating substrate. A plurality of connection pads formed on the lower surface of the insulating base and electrically connected to the metallized wiring layer, a substantially spherical terminal made of solder or the like brazed and attached to the connection pad; And a lid for sealing. The semiconductor element is adhered and fixed to the bottom surface of the mounting portion of the insulating base via an adhesive made of glass, resin, or the like. And the metallized wiring layer are electrically connected via bonding wires, and the lid is joined to the upper surface of the insulating base via a sealing material made of glass, resin, or the like, so that the inside of the container including the insulating base and the lid is connected. A semiconductor device as a product is obtained by hermetically sealing a semiconductor element.

【0003】かかる半導体装置は、絶縁基体下面の接続
パッドにロウ付け取着されている半田等から成るほぼ球
状の端子を、樹脂絶縁材料と銅配線等により形成される
外部電気回路基板の配線導体上に載置当接させ、しかる
後、ほぼ球状の端子を約150〜250 ℃の温度で加熱溶融
し、端子を配線導体に接合させることによって外部電気
回路基板上に実装される。これと同時に、半導体素子収
納用パッケージの内部に収容されている半導体素子はそ
の各電極がメタライズ配線層およびほぼ球状の端子を介
して外部電気回路に接続されることとなる。
In such a semiconductor device, a substantially spherical terminal made of solder or the like brazed to a connection pad on the lower surface of an insulating base is connected to a wiring conductor of an external electric circuit board formed of a resin insulating material and copper wiring. Then, the substantially spherical terminal is heated and melted at a temperature of about 150 to 250 ° C., and the terminal is bonded to a wiring conductor, thereby mounting the terminal on an external electric circuit board. At the same time, each electrode of the semiconductor element housed in the semiconductor element housing package is connected to an external electric circuit via the metallized wiring layer and the substantially spherical terminal.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、この従
来の半導体素子収納用パッケージにおいては、アルミナ
セラミックス等から成る絶縁基体の熱膨張係数が4〜6.
5 ×10-6/℃程度であるのに対し、外部電気回路基板が
一般にガラスエポキシ等の樹脂絶縁材料から成り、その
熱膨張係数が1×10-5〜4×10-5/℃と大きく、両者の
熱膨張係数が大きく相違していた。そのため、半導体素
子が作動時に発熱し停止時には周辺温度に戻ることに伴
う温度サイクルが半導体素子収納用パッケージの絶縁基
体と外部電気回路基板の両方に繰り返し印加されると、
両者間に熱膨張係数の相違に起因する大きな熱応力が発
生し、これが接続パッドとほぼ球状の端子との間にも作
用してこれらの接合部に疲労を生じさせてついには剥離
や破壊を発生させてしまい、その結果、半導体素子収納
用パッケージの内部に収容する半導体素子の各電極を長
期間にわたり所定の外部電気回路基板に電気的に接続さ
せることができないという問題点を有していた。
However, in this conventional package for housing a semiconductor element, the thermal expansion coefficient of the insulating base made of alumina ceramics or the like is 4-6.
In contrast to about 5 × 10 −6 / ° C., the external electric circuit board is generally made of a resin insulating material such as glass epoxy and has a large thermal expansion coefficient of 1 × 10 −5 to 4 × 10 −5 / ° C. And the thermal expansion coefficients of the two were greatly different. Therefore, when a temperature cycle associated with the semiconductor element generating heat during operation and returning to the ambient temperature when stopped is repeatedly applied to both the insulating base of the semiconductor element storage package and the external electric circuit board,
A large thermal stress is generated between the two due to the difference in the coefficient of thermal expansion, which also acts between the connection pad and the substantially spherical terminal, causing fatigue at these joints, and eventually causing peeling or destruction. As a result, each electrode of the semiconductor element housed inside the semiconductor element housing package cannot be electrically connected to a predetermined external electric circuit board for a long period of time. .

【0005】本発明は上記問題点に鑑みて案出されたも
のであり、その目的は、半導体素子収納用パッケージに
形成された接続パッドとほぼ球状の端子との接合部にお
ける半導体素子の作動に伴う発熱による疲労破壊の発生
を防止することにより、内部に収容する半導体素子の各
電極を長期間にわたり所定の外部電気回路に安定して電
気的に接続することができる半導体素子収納用パッケー
ジを提供することにある。
The present invention has been devised in view of the above problems, and has as its object to operate a semiconductor device at a joint between a connection pad formed on a semiconductor device housing package and a substantially spherical terminal. Provided is a semiconductor element housing package that can stably and electrically connect each electrode of a semiconductor element housed therein to a predetermined external electric circuit for a long period of time by preventing the occurrence of fatigue fracture due to accompanying heat generation. Is to do.

【0006】[0006]

【課題を解決するための手段】本発明の半導体素子収納
用パッケージは、電気絶縁材料から成り、上面に半導体
素子が載置される載置部を、下面に多数の凹部を有する
絶縁基体と、その絶縁基体の前記載置部周辺から前記凹
部底面にかけて導出される複数個のメタライズ配線層
と、前記凹部内に形成され、前記メタライズ配線層と電
気的に接続されている複数個の接続パッドと、該接続パ
ッドに接合され、前記絶縁基体の下面にほぼ球状の突出
部を有する端子とから成る半導体素子収納用パッケージ
であって、前記接続パッドはその下面に円弧状の窪みを
有し、該円弧状の窪みの曲率半径をR、前記凹部の半径
をr、凹部の深さをdとしたとき、下記条件式を満足す
ることを特徴とするものである。
According to the present invention, there is provided a package for housing a semiconductor element, which is made of an electrically insulating material, has a mounting portion on which an upper surface of a semiconductor element is mounted, an insulating base having a plurality of concave portions on a lower surface, A plurality of metallized wiring layers extending from the periphery of the mounting portion to the bottom surface of the concave portion of the insulating base; and a plurality of connection pads formed in the concave portion and electrically connected to the metallized wiring layer. And a terminal joined to the connection pad and having a terminal having a substantially spherical protrusion on the lower surface of the insulating base, wherein the connection pad has an arc-shaped recess on the lower surface thereof. When the radius of curvature of the arc-shaped depression is R, the radius of the depression is r, and the depth of the depression is d, the following conditional expression is satisfied.

【0007】1.0<R/r≦9.0 R≧(r2 +d2 )/2d。1.0 <R / r ≦ 9.0 R ≧ (r 2 + d 2 ) / 2d.

【0008】本発明の半導体素子収納用パッケージによ
れば、絶縁基体下面の凹部内に下面に円弧状の窪みを有
する接続パッドを設けるとともに、絶縁基体の下面にほ
ぼ球状の突出部を有する端子をその接続パッドに接合
し、かつ接続パッドの端子との円弧状の接合部の曲率半
径をR、凹部の半径をr、凹部の深さをdとしたとき、
1.0<R/r≦9.0 、R≧(r2 +d2 )/2dなる条
件式を満足するように成したことから、半導体素子収納
用パッケージの内部に半導体素子を収容するとともに外
部電気回路基板に実装した場合、半導体素子の作動時の
発熱が絶縁基板と外部電気回路基板の両方に繰り返し印
加され、両者の熱膨張係数の相違に起因する大きな熱応
力が半導体素子収納用パッケージに形成された接続パッ
ドとほぼ球状の端子との接合部に加わったとしても、円
弧状の窪みを有する接続パッドとほぼ球状の端子との間
の接合面積を十分に確保できるとともに、それらが強固
に組み合わされて接合されているため、剥離や疲労破壊
が容易に発生することはなく、その結果、半導体素子収
納用パッケージの内部に収容する半導体素子の各電極を
長期間にわたり所定の外部電気回路基板に安定して電気
的に接続させることが可能となる。
According to the semiconductor device housing package of the present invention, a connection pad having an arc-shaped depression on the lower surface is provided in a concave portion on the lower surface of the insulating base, and a terminal having a substantially spherical projection on the lower surface of the insulating base is provided. When joining to the connection pad, and the radius of curvature of the arc-shaped joint with the terminal of the connection pad is R, the radius of the recess is r, and the depth of the recess is d,
Since 1.0 <R / r ≦ 9.0 and R ≧ (r 2 + d 2 ) / 2d are satisfied, the semiconductor element is housed inside the semiconductor element housing package and the external electric circuit board is mounted. When mounted, heat generated during operation of the semiconductor element is repeatedly applied to both the insulating substrate and the external electric circuit board, and a large thermal stress caused by a difference in thermal expansion coefficient between the two is formed in the semiconductor element housing package. Even if it is added to the joint between the pad and the almost spherical terminal, it is possible to secure a sufficient joint area between the connection pad having the arc-shaped depression and the almost spherical terminal, and to join them together firmly Therefore, peeling and fatigue failure do not easily occur, and as a result, each electrode of the semiconductor element housed in the semiconductor element housing package is kept at a predetermined level for a long period of time. It is possible to stably and electrically connect to the external electric circuit board.

【0009】また、円弧状の窪みを有する接続パッドと
ほぼ球状の端子との接合部において強度の弱い合金層が
半球状に分布することとなるので、この合金層に沿って
進行するクラックにより接合部が破断されるまでの行程
が長くなり、破断されるまでの時間が長くなるため、こ
れによっても半導体素子収納用パッケージの内部に収容
する半導体素子の各電極を長期間にわたり所定の外部電
気回路基板に安定して電気的に接続させることが可能と
なる。
In addition, since the alloy layer having low strength is distributed in a hemispherical shape at the joint between the connection pad having the arc-shaped depression and the substantially spherical terminal, the joint is formed by cracks traveling along the alloy layer. Since the process until the part is broken becomes longer and the time until the part is broken becomes longer, each electrode of the semiconductor element housed in the semiconductor element housing package can be also used for a long period of time in a predetermined external electric circuit. It is possible to stably and electrically connect to the substrate.

【0010】[0010]

【発明の実施の形態】以下、本発明を添付図面に基づき
詳細に説明する。図1は本発明の半導体素子収納用パッ
ケージの実施の形態の一例を示す断面図であり、図2は
その要部拡大断面図である。これらの図において、1は
絶縁基体、2は蓋体、3は半導体素子であり、絶縁基体
1と蓋体2とで半導体素子3を収容する容器4が構成さ
れる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a sectional view showing an example of an embodiment of a package for housing a semiconductor element according to the present invention, and FIG. 2 is an enlarged sectional view of a main part thereof. In these figures, 1 is an insulating base, 2 is a lid, and 3 is a semiconductor element. The insulating base 1 and the lid 2 constitute a container 4 for housing the semiconductor element 3.

【0011】絶縁基体1にはその上面のほぼ中央部に半
導体素子3が載置収容される載置部1aが設けられてお
り、載置部1aの底面には半導体素子3がガラスや樹脂
等の接着剤を介して取着される。
The insulating base 1 is provided with a mounting portion 1a in which the semiconductor element 3 is mounted at substantially the center of the upper surface thereof, and the semiconductor element 3 is provided on the bottom surface of the mounting portion 1a with glass, resin or the like. Attached via an adhesive.

【0012】絶縁基体1は熱膨張係数が小さいセラミッ
クス等の電気絶縁材料、例えば酸化アルミニウム質焼結
体・窒化アルミニウム質焼結体・炭化珪素質焼結体・ム
ライト質焼結体・ガラスセラミックス焼結体等から成
り、例えば酸化アルミニウム質焼結体から成る場合は、
酸化アルミニウム・酸化珪素・酸化マグネシウム・酸化
カルシウム等の原料粉末に適当な有機バインダ・可塑剤
・溶剤等を添加混合して泥漿物を作り、その泥漿物から
ドクターブレード法やカレンダーロール法によってグリ
ーンシート(生シート)と成し、しかる後、そのグリー
ンシートに適当な打ち抜き加工を施すとともにこれを複
数枚積層し、約1600℃の温度で焼成することによって作
製される。
The insulating substrate 1 is made of an electrically insulating material such as ceramics having a small coefficient of thermal expansion, for example, a sintered body of aluminum oxide, a sintered body of aluminum nitride, a sintered body of silicon carbide, a sintered body of mullite, a sintered body of glass ceramic. It is made of a sintered body, for example, when it is made of an aluminum oxide sintered body,
A suitable organic binder, a plasticizer, a solvent, etc. are added to and mixed with raw material powders such as aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, etc. to form a slurry, and the green sheet is formed from the slurry by a doctor blade method or a calendar roll method. (Green sheet). Thereafter, the green sheet is appropriately punched, a plurality of the green sheets are laminated, and the green sheet is fired at a temperature of about 1600 ° C.

【0013】5はメタライズ配線層であり、半導体素子
3が載置収容される載置部1aの周辺から絶縁基体1の
下面にかけて複数個のメタライズ配線層5が被着形成さ
れている。
Reference numeral 5 denotes a metallized wiring layer, on which a plurality of metallized wiring layers 5 are formed from the periphery of the mounting portion 1a on which the semiconductor element 3 is mounted and accommodated to the lower surface of the insulating base 1.

【0014】さらに、1bは絶縁基体1の下面に複数個
形成された凹部であり、その凹部1bの内部には、メタ
ライズ配線層5が電気的に接続される、下面に円弧状の
窪みを有する複数個の接続パッド6が被着形成されてい
る。
Further, reference numeral 1b denotes a plurality of concave portions formed on the lower surface of the insulating base 1. Inside the concave portion 1b, an arc-shaped concave portion on the lower surface to which the metallized wiring layer 5 is electrically connected is provided. A plurality of connection pads 6 are formed.

【0015】メタライズ配線層5はタングステン・モリ
ブデン・マンガン等の高融点金属から成り、タングステ
ン等の高融点金属粉末に適当な有機バインダ・可塑剤・
溶剤等を添加混合して得た金属ペーストを絶縁基体1と
なるグリーンシートに予め従来周知のスクリーン印刷法
等により所定パターンに印刷塗布しておくことによっ
て、焼成後に絶縁基体1の所定位置に所定パターンに被
着形成される。
The metallized wiring layer 5 is made of a metal having a high melting point such as tungsten, molybdenum and manganese.
A metal paste obtained by adding and mixing a solvent or the like is preliminarily printed and applied in a predetermined pattern on a green sheet serving as the insulating substrate 1 by a conventionally known screen printing method or the like. It is formed on the pattern.

【0016】また、接続パッド6もメタライズ配線層5
と同様にタングステン・モリブデン・マンガン等の高融
点金属から成り、タングステン等の高融点金属粉末に適
当な有機バインダ・可塑剤・溶剤等を添加混合して得た
金属ペーストを絶縁基体1の凹部1bに所定量充填した
後、有機バインダや溶剤を蒸発させてから焼成すること
により下面に円弧状の窪みを有するように形成され、上
面ではメタライズ配線層5と電気的に接続される。
The connection pads 6 are also formed on the metallized wiring layer 5.
A metal paste made of a high melting point metal such as tungsten, molybdenum, manganese or the like and obtained by adding a suitable organic binder, plasticizer, solvent, etc. to a high melting point metal powder such as tungsten is mixed with the concave portion 1b of the insulating base 1. After a predetermined amount is filled, the organic binder and the solvent are evaporated and then fired to form an arc-shaped depression on the lower surface, and the upper surface is electrically connected to the metallized wiring layer 5.

【0017】この接続パッド6は、凹部1bとなる穴を
開けたグリーンシートを積層した後に、スクリーン印刷
によって金属ペーストを流し込むと、金属ペーストの表
面張力によってその表面形状が円弧状の窪みになるの
で、これを焼成することによって所望の曲率半径を有す
る円弧状の窪みを形成することができる。
When a metal paste is poured by screen printing after laminating a green sheet having a hole serving as the concave portion 1b, the surface shape of the connection pad 6 becomes an arc-shaped depression due to the surface tension of the metal paste. By firing this, an arc-shaped depression having a desired radius of curvature can be formed.

【0018】また、上記のようにして形成した円弧状の
高融点金属の表面には、厚み1〜20μmのニッケルメッ
キならびに厚み0.01〜0.5 μmの金メッキを施すことが
好ましく、これにより高融点金属の表面の酸化を有効に
防止できると同時に半田等から成るほぼ球状の端子7と
の接合を強固に保つことができる。
The surface of the arc-shaped refractory metal formed as described above is preferably plated with nickel having a thickness of 1 to 20 μm and gold plating having a thickness of 0.01 to 0.5 μm. Oxidation of the surface can be effectively prevented, and at the same time, the bonding with the substantially spherical terminal 7 made of solder or the like can be firmly maintained.

【0019】前記メタライズ配線層5は半導体素子3の
各電極を接続パッド6に接合されるほぼ球状の端子7に
電気的に接続させる作用をなし、絶縁基体1の載置部1
a周辺に位置する領域には半導体素子3の各電極がボン
ディングワイヤ8を介して電気的に接続される。
The metallized wiring layer 5 functions to electrically connect each electrode of the semiconductor element 3 to a substantially spherical terminal 7 joined to the connection pad 6, and the mounting portion 1 of the insulating base 1
Each electrode of the semiconductor element 3 is electrically connected to a region located in the vicinity of a through a bonding wire 8.

【0020】また、メタライズ配線層5と電気的に接続
されている接続パッド6は絶縁基体1にほぼ球状の端子
7を取着する際の下地金属層としても作用し、接続パッ
ド6の円弧状の窪みの表面には、例えば鉛と錫の重量比
を6:4とした低融点の鉛−錫半田等から成るほぼ球状
の端子7の一部が、接続パッド6の円弧状の窪みの表面
と組合わさるような形状の接合部7aとなって、ロウ付
け等により接合されている。
The connection pad 6 electrically connected to the metallized wiring layer 5 also functions as a base metal layer when the substantially spherical terminal 7 is attached to the insulating base 1, and the connection pad 6 has an arcuate shape. A part of a substantially spherical terminal 7 made of, for example, a low-melting-point lead-tin solder having a weight ratio of lead and tin of 6: 4 is formed on the surface of the concave surface of the connection pad 6. And a joining portion 7a having such a shape as to be combined with, for example, brazing.

【0021】接続パッド6に接合されている端子7は、
また絶縁基体1の下面に球状の突出部7bを有してお
り、その球状突出部7bは端子7を外部電気回路基板9
の配線導体10に接続させる際に、その接続を容易かつ確
実となす作用をする。
The terminal 7 joined to the connection pad 6
The lower surface of the insulating base 1 has a spherical projection 7b, and the spherical projection 7b connects the terminal 7 to the external electric circuit board 9.
When it is connected to the wiring conductor 10 described above, the connection conductor 10 acts to make the connection easy and reliable.

【0022】そして本発明の半導体素子収納用パッケー
ジにおいては、接続パッド6のほぼ球状の端子7との円
弧状の窪みによる接合部の曲率半径をR、凹部1bの半
径をr、凹部1bの深さをdとしたとき、1.0 <R/r
≦ 9.0、R≧(r2 +d2 )/2dの各条件式を満足す
ることを特徴としており、これによって接続パッド6と
ほぼ球状の端子7とが十分な接合面積でもって強固に組
み合わされて接合されることとなり、絶縁基体1の載置
部1a内に半導体素子3を収容し、外部電気回路基板9
に実装した後、半導体素子3の作動時の発熱が絶縁基体
1と外部電気回路基板9の両方に繰り返し印加され、両
者の熱膨張係数の相違に起因する大きな熱応力が円弧状
の接続パッド6とほぼ球状の端子7との接合部に加わっ
たとしても、接続パッド6とほぼ球状の端子7との間の
剥離や疲労破壊が有効に防止される。
In the package for accommodating a semiconductor element of the present invention, the radius of curvature of the junction formed by the arc-shaped depression of the connection pad 6 with the substantially spherical terminal 7 is R, the radius of the recess 1b is r, and the depth of the recess 1b is When d is 1.0, R <r
≦ 9.0 and R ≧ (r 2 + d 2 ) / 2d, whereby the connection pad 6 and the substantially spherical terminal 7 are firmly combined with a sufficient joint area. The semiconductor element 3 is accommodated in the mounting portion 1a of the insulating base 1, and the external electric circuit board 9
After the semiconductor element 3 is mounted, heat generated during operation of the semiconductor element 3 is repeatedly applied to both the insulating base 1 and the external electric circuit board 9, and a large thermal stress resulting from a difference in the coefficient of thermal expansion between the two is applied to the arc-shaped connection pad 6. Even when it is applied to the joint between the connection pad 6 and the substantially spherical terminal 7, the peeling and fatigue damage between the connection pad 6 and the substantially spherical terminal 7 are effectively prevented.

【0023】なお、図2において凹部1bの径は直径2
r(半径r×2)で示している。
In FIG. 2, the diameter of the recess 1b is 2
r (radius r × 2).

【0024】上記の条件式に対してR/rが 1.0以下
(R/r≦1.0 )であると、凹部1bの接続パッド6と
ほぼ球状の端子7の接合部7aとの接合面が作る、屈曲
点Aにおいて絶縁基体1の下面と接合部7aの接線のな
す角度がほぼ90°に近くなって、半導体素子3の発熱に
伴う熱応力がその屈曲点に集中しやすくなり、熱応力が
繰り返して加わることによって接続パッド6とほぼ球状
の端子7との間の剥離や疲労破壊が発生しやすくなる傾
向がある。
If R / r is 1.0 or less (R / r ≦ 1.0) with respect to the above conditional expression, a joint surface between the connection pad 6 of the concave portion 1b and the joint 7a of the substantially spherical terminal 7 is formed. At the inflection point A, the angle formed by the tangent of the lower surface of the insulating base 1 and the joint 7a is nearly 90 °, so that the thermal stress accompanying the heat generation of the semiconductor element 3 tends to concentrate at the inflection point, and the thermal stress repeats. This tends to easily cause peeling or fatigue failure between the connection pad 6 and the substantially spherical terminal 7.

【0025】他方、R/rが 9.0を超える( 9.0<R/
r)と接続パッド6の下面がほぼ平坦な形状となって十
分な円弧状でなくなることから、接続パッド6と端子7
との接合面積が不十分となるとともに、この平坦な接合
面で熱応力をすべて受ける状態となって剥離や疲労破壊
が発生しやすくなる傾向がある。
On the other hand, R / r exceeds 9.0 (9.0 <R /
r) and the lower surface of the connection pad 6 become substantially flat and not sufficiently arcuate, so that the connection pad 6 and the terminal 7
Insufficient bonding area is required, and thermal stress is all received on this flat bonding surface, and peeling and fatigue failure tend to occur.

【0026】また、Rが(r2 +d2 )/2dより小さ
くなる(R<(r2 +d2 )/2d)と、接続パッド6
の円弧状の窪みの中央部が凹部1bの底面によって平ら
につぶされて平坦な形状になり、その平坦な面と周囲の
窪みの円弧が接する部分に屈曲点ができるため、この屈
曲点に熱応力が集中して剥離や疲労破壊が発生しやすく
なる傾向がある。
When R becomes smaller than (r 2 + d 2 ) / 2d (R <(r 2 + d 2 ) / 2d), the connection pad 6
The central portion of the arc-shaped depression is flattened by the bottom surface of the concave portion 1b into a flat shape, and a bending point is formed at a portion where the flat surface and the arc of the surrounding depression contact each other. There is a tendency that stress is concentrated and peeling and fatigue fracture are likely to occur.

【0027】かくして本発明の半導体素子収納用パッケ
ージによれば、絶縁基体1の載置部1a底面に半導体素
子3を接着剤を介して接着固定するとともに半導体素子
3の各電極をメタライズ配線層5にボンディングワイヤ
8を介して電気的に接続し、しかる後、絶縁基体1の上
面に蓋体2をガラス・樹脂等から成る封止材により接合
させ、絶縁基体1と蓋体2とから成る容器4内部に半導
体素子3を気密に封止することによって、製品としての
半導体装置となる。
Thus, according to the package for accommodating a semiconductor element of the present invention, the semiconductor element 3 is bonded and fixed to the bottom of the mounting portion 1a of the insulating base 1 with an adhesive, and each electrode of the semiconductor element 3 is connected to the metallized wiring layer 5 Is electrically connected via a bonding wire 8, and then the lid 2 is joined to the upper surface of the insulating base 1 with a sealing material made of glass, resin, or the like, and a container including the insulating base 1 and the lid 2 is formed. A semiconductor device as a product is obtained by hermetically sealing the semiconductor element 3 inside 4.

【0028】[0028]

【実施例】以下に本発明の具体例を示す。アルミナを主
原料とするセラミックスグリーンシートに、凹部1bな
らびにメタライズ配線層5となる穴開け・金属ペースト
のスクリーン印刷・打ち抜き加工を施し、これを複数枚
積層して約1600℃の温度で焼成し、外寸が35mm角、厚
みが1mmの絶縁基体の下面に、半径rが0.27mm、深
さdが 0.2mmの凹部1bが1mmピッチの格子状に 4
80個形成されたものを作製した。
EXAMPLES Specific examples of the present invention will be described below. A ceramic green sheet mainly made of alumina is subjected to a recess 1b and a hole to be a metallized wiring layer 5, screen printing and punching of a metal paste, and a plurality of these are laminated and fired at a temperature of about 1600 ° C. On a lower surface of an insulating base having an outer size of 35 mm square and a thickness of 1 mm, concave portions 1 b having a radius r of 0.27 mm and a depth d of 0.2 mm are formed in a lattice pattern of 1 mm pitch.
Eighty pieces were produced.

【0029】次いで、凹部1b内にタングステンペース
トをスクリーン印刷し、焼成した後に厚み2〜3μmの
ニッケルメッキと厚み 0.2〜0.3 μmの金メッキを施し
て、種々の曲率半径Rの円弧状の窪みを有する接続パッ
ド6を形成した。そして、これら接続パッド6の表面に
半田から成るほぼ球状の端子7を接合し、接続パッド6
とほぼ球状の端子7との接合部の曲率半径Rを変化させ
た半導体素子収納用パッケージ試料A〜Hを得た。ま
た、比較例の試料として、接続パッド6の表面を絶縁基
体1の下面と同一の平坦面としたものも作製し、試料I
を得た。
Next, a tungsten paste is screen-printed in the concave portion 1b, and after baking, nickel plating having a thickness of 2 to 3 μm and gold plating having a thickness of 0.2 to 0.3 μm are applied to form arc-shaped depressions having various curvature radii R. The connection pad 6 was formed. Then, approximately spherical terminals 7 made of solder are joined to the surfaces of the connection pads 6 to form connection pads 6.
And semiconductor element housing package samples A to H in which the radius of curvature R at the junction with the substantially spherical terminal 7 was changed. Further, as a sample of the comparative example, a sample in which the surface of the connection pad 6 was made the same flat surface as the lower surface of the insulating base 1 was also manufactured.
I got

【0030】このようにして得た試料A〜Iを厚さ 1.6
mmのFR4基板から成る外部電気回路基板の配線導体
上に約 0.5mmのギャップで実装し、−40℃と+125 ℃
の温度サイクル試験を行なって接合部が破断に至るまで
の温度サイクル数を求め、半導体素子収納用パッケージ
と外部電気回路基板との接合寿命を評価した。
The samples A to I obtained as described above were prepared with a thickness of 1.6
-4 ℃ and + 125 ℃ mounted on the wiring conductor of the external electric circuit board consisting of FR4
The temperature cycle test was performed to determine the number of temperature cycles until the joint portion was broken, and the joining life between the semiconductor device housing package and the external electric circuit board was evaluated.

【0031】この結果を表1に示す。なお、表1のR対
(r2 +d2 )/2dの欄においてR<、R=、R≧と
あるのは、それぞれR<(r2 +d2 )/2d、R=
(r2+d2 )/2d、R≧(r2 +d2 )/2dであ
ることを示している。
Table 1 shows the results. In the column of R pair (r 2 + d 2 ) / 2d in Table 1, R <, R =, and R ≧ mean that R <(r 2 + d 2 ) / 2d and R =
(R 2 + d 2 ) / 2d, and R ≧ (r 2 + d 2 ) / 2d.

【0032】[0032]

【表1】 [Table 1]

【0033】表1の結果から、1.0 <R/r≦ 9.0、R
≧(r2 +d2 )/2dの各条件式を満足する試料B〜
Gにおいてはいずれも破断に至る温度サイクル数が少な
くとも 950サイクル以上であり、上記条件式を満足しな
い試料AおよびHでは高々 500サイクル、接続パッド表
面が平坦な試料Iではわずかに 100サイクルであるのに
対して非常に良好な接合寿命であることが分かる。
From the results in Table 1, it is found that 1.0 <R / r ≦ 9.0, R
Samples B to satisfy each conditional expression of ≧ (r 2 + d 2 ) / 2d
In G, the number of temperature cycles leading to fracture is at least 950 or more, and in Samples A and H which do not satisfy the above conditional expression, at most 500 cycles, and in Sample I having a flat connection pad surface, only 100 cycles. It can be seen that the bonding life is very good with respect to.

【0034】次に、同様にして凹部1bの深さdを 0.3
mmとし、種々の曲率半径Rの円弧状の窪みを有する接
続パッド6を形成してほぼ球状の端子7を接合し、半導
体素子収納用パッケージ試料J〜Qを得た。また、接続
パッド6の表面を平坦面としたものも作製し、試料Rを
得た。
Next, similarly, the depth d of the concave portion 1b is set to 0.3.
mm, connection pads 6 having arc-shaped depressions having various curvature radii R were formed, and substantially spherical terminals 7 were joined to obtain semiconductor element storage package samples J to Q. Further, a sample in which the surface of the connection pad 6 had a flat surface was also manufactured, and a sample R was obtained.

【0035】これらに上記と同様の温度サイクル試験を
行なって接合寿命を評価した結果を表2に示す。
Table 2 shows the results of the same temperature cycle test as described above and the evaluation of the bonding life.

【0036】[0036]

【表2】 [Table 2]

【0037】表2の結果からも、1.0 <R/r≦9.0 、
R≧(r2 +d2 )/2dの各条件式を満足する試料J
〜Pにおいてはいずれも破断に至る温度サイクル数が少
なくとも1000サイクル以上であり、上記条件式を満足し
ない試料Qでは高々 300サイクル、接続パッド表面が平
坦な試料Rではわずかに 100サイクルであるのに対して
非常に良好な接合寿命であることが分かる。
From the results in Table 2, it can be seen that 1.0 <R / r ≦ 9.0,
Sample J that satisfies each condition of R ≧ (r 2 + d 2 ) / 2d
PP, the number of temperature cycles leading to fracture is at least 1000 cycles or more. Sample Q, which does not satisfy the above conditional expression, has at most 300 cycles, and sample R, which has a flat connection pad surface, has only 100 cycles. It can be seen that the bonding life is very good.

【0038】これらの結果により、本発明の半導体素子
収納用パッケージによれば内部に収容する半導体素子の
各電極を長期間にわたり所定の外部電気回路基板に安定
して電気的に接続させることが可能であることが確かめ
られた。
According to these results, according to the semiconductor device housing package of the present invention, each electrode of the semiconductor device housed therein can be stably electrically connected to a predetermined external electric circuit board for a long period of time. Was confirmed.

【0039】[0039]

【発明の効果】本発明の半導体素子収納用パッケージに
よれば、電気絶縁材料から成り、上面に半導体素子が載
置される載置部を、下面に多数の凹部を有する絶縁基体
と、その絶縁基体の前記載置部周辺から前記凹部底面に
かけて導出される複数個のメタライズ配線層と、そのメ
タライズ配線層と電気的に接続され、下面に円弧状の窪
みを有するように凹部内に形成された複数個の接続パッ
ドと、その接続パッドに接合され、前記絶縁基体の下面
にほぼ球状の突出部を有する端子とから成る半導体素子
収納用パッケージであって、前記接続パッドの円弧状の
窪みの曲率半径をR、前記凹部の半径をr、凹部の深さ
をdとしたとき、1.0 <R/r≦ 9.0、R≧(r2 +d
2 )/2dなる条件式を満足するように成したことか
ら、ほぼ球状の端子を円弧状の窪みを有する接続パッド
に強固に接合させることが可能になり、半導体素子収納
用パッケージの内部に半導体素子を収容するとともに外
部電気回路基板に実装した場合、半導体素子の作動時の
発熱が絶縁基板と外部電気回路基板の両方に繰り返し印
加され、両者の熱膨張係数の相違に起因する大きな熱応
力が半導体素子収納用パッケージに形成された接続パッ
ドとほぼ球状の端子との接合部に加わったとしても、円
弧状の接続パッドとほぼ球状の端子との間の接合面積を
十分に確保できるとともに、それらが強固に組み合わさ
れて接合されているため、剥離や疲労破壊が容易に発生
することはなく、その結果、半導体素子収納用パッケー
ジの内部に収容する半導体素子の各電極を長期間にわた
り所定の外部電気回路基板に安定して電気的に接続させ
ることが可能となる。
According to the package for housing a semiconductor element of the present invention, an insulating base made of an electrically insulating material and having a mounting portion on the upper surface on which the semiconductor element is mounted, a plurality of concave portions on the lower surface, and the insulating base. A plurality of metallized wiring layers led from the periphery of the mounting portion to the bottom surface of the concave portion and electrically connected to the metallized wiring layer, and formed in the concave portion so as to have an arc-shaped concave portion on the lower surface. What is claimed is: 1. A semiconductor device housing package comprising: a plurality of connection pads; and a terminal joined to the connection pads and having a substantially spherical protrusion on a lower surface of the insulating base, wherein a curvature of an arc-shaped recess of the connection pads is provided. When the radius is R, the radius of the concave portion is r, and the depth of the concave portion is d, 1.0 <R / r ≦ 9.0, R ≧ (r 2 + d)
2 ) / 2d, the substantially spherical terminal can be firmly bonded to the connection pad having the arc-shaped depression, and the semiconductor device is housed inside the semiconductor element housing package. When the element is housed and mounted on an external electric circuit board, heat generated during operation of the semiconductor element is repeatedly applied to both the insulating substrate and the external electric circuit board, and a large thermal stress caused by a difference in thermal expansion coefficient between the two. Even if it is added to the joint between the connection pad formed on the semiconductor element housing package and the substantially spherical terminal, the bonding area between the arc-shaped connection pad and the substantially spherical terminal can be sufficiently secured, and Are firmly combined and joined, so that peeling or fatigue failure does not easily occur, and as a result, the semiconductor device is housed inside the semiconductor device housing package. It is possible to electrically connect the electrodes of the conductive elements stably over a long period of time to a predetermined external electric circuit board.

【0040】よって、本発明の半導体素子収納用パッケ
ージによれば、半導体素子収納用パッケージに形成され
た接続パッドとほぼ球状の端子との接合部における半導
体素子の作動に伴う発熱による疲労破壊の発生を防止す
ることにより、内部に収容する半導体素子の各電極を長
期間にわたり所定の外部電気回路に安定して電気的に接
続することができる半導体素子収納用パッケージを提供
することができた。
Therefore, according to the semiconductor element housing package of the present invention, the occurrence of fatigue destruction due to the heat generated by the operation of the semiconductor element at the junction between the connection pad formed on the semiconductor element housing package and the substantially spherical terminal. Thus, it is possible to provide a semiconductor element housing package that can stably and electrically connect each electrode of a semiconductor element housed therein to a predetermined external electric circuit for a long period of time.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体素子収納用パッケージの一実施
形態を示す断面図である。
FIG. 1 is a cross-sectional view showing one embodiment of a package for housing a semiconductor element of the present invention.

【図2】図1に示す半導体素子収納用パッケージの要部
拡大断面図である。
2 is an enlarged cross-sectional view of a main part of the package for housing a semiconductor element shown in FIG. 1;

【符号の説明】[Explanation of symbols]

1・・・・・絶縁基体 1a・・・載置部 1b・・・凹部 2・・・・・蓋体 3・・・・・半導体素子 5・・・・・メタライズ配線層 6・・・・・接続パッド 7・・・・・端子 7b・・・ほぼ球状の突出部 DESCRIPTION OF SYMBOLS 1 ... Insulating base 1a ... Placement part 1b ... Concave part 2 ... Lid 3 ... Semiconductor element 5 ... Metallized wiring layer 6 ...・ Connection pad 7 ・ ・ ・ ・ ・ ・ ・ Terminal 7b ・ ・ ・ Almost spherical projection

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 電気絶縁材料から成り、上面に半導体素
子が載置される載置部を、下面に多数の凹部を有する絶
縁基体と、該絶縁基体の前記載置部周辺から前記凹部底
面にかけて導出される複数個のメタライズ配線層と、前
記凹部内に形成され、前記メタライズ配線層と電気的に
接続されている複数個の接続パッドと、該接続パッドに
接合され、前記絶縁基体の下面にほぼ球状の突出部を有
する端子とから成る半導体素子収納用パッケージであっ
て、前記接続パッドはその下面に円弧状の窪みを有し、
該円弧状の窪みの曲率半径をR、前記凹部の半径をr、
凹部の深さをdとしたとき、下記条件式を満足すること
を特徴とする半導体素子収納用パッケージ。 1.0<R/r≦9.0 R≧(r2 +d2 )/2d
1. A mounting portion made of an electrically insulating material, on which a semiconductor element is mounted on an upper surface, an insulating substrate having a plurality of concave portions on a lower surface, and a portion extending from the periphery of the insulating portion to the bottom surface of the concave portion. A plurality of metallized wiring layers to be led out, a plurality of connection pads formed in the recesses and electrically connected to the metallized wiring layer, and joined to the connection pads, on a lower surface of the insulating base. A terminal having a substantially spherical protrusion, wherein the connection pad has an arc-shaped depression on the lower surface thereof,
The radius of curvature of the arc-shaped recess is R, the radius of the recess is r,
A semiconductor element storage package characterized by satisfying the following conditional expression when the depth of the concave portion is d. 1.0 <R / r ≦ 9.0 R ≧ (r 2 + d 2 ) / 2d
JP19927196A 1996-07-29 1996-07-29 Package for storing semiconductor elements Expired - Fee Related JP3372769B2 (en)

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JP19927196A JP3372769B2 (en) 1996-07-29 1996-07-29 Package for storing semiconductor elements

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JP19927196A JP3372769B2 (en) 1996-07-29 1996-07-29 Package for storing semiconductor elements

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JPH1050768A true JPH1050768A (en) 1998-02-20
JP3372769B2 JP3372769B2 (en) 2003-02-04

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009141054A (en) * 2007-12-05 2009-06-25 Furukawa Electric Co Ltd:The Semiconductor device
US8796563B2 (en) 2009-02-13 2014-08-05 Hitachi Automotive Systems, Ltd. Connection structure, power module and method of manufacturing the same
JP2020077869A (en) * 2018-11-03 2020-05-21 ナノコイル株式会社 Fine wiring jointed body and manufacturing method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009141054A (en) * 2007-12-05 2009-06-25 Furukawa Electric Co Ltd:The Semiconductor device
US8796563B2 (en) 2009-02-13 2014-08-05 Hitachi Automotive Systems, Ltd. Connection structure, power module and method of manufacturing the same
JP2020077869A (en) * 2018-11-03 2020-05-21 ナノコイル株式会社 Fine wiring jointed body and manufacturing method thereof

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