JPH10304408A - Cross-connect device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To operate a device with low power consumption without the need for a high speed storage element by using m-sets of demultiplexer circuits to demultiplex a received n-channel multiplexed signal into n-sets of parallel signals, selecting n×m sets of latched data in time division according to a read address, reading the data, multiplexing the data and providing an output. SOLUTION: Signals from a-sets of channels are multiplexed at a multiplex conversion circuit 1 for each of n-sets (a>n) of signals and converted into m-sets of n-multiplexed signals. The converted n-multiplexed signals are given to m-sets of demultiplexer circuits 2, where the signals are converted into n×m signals, that is, a-sets of parallel data, and stored in storage circuits 3 having the a-sets of storage elements. Selection circuits 4 as output circuits select the a-sets of data in the storage circuits 3 in time division according to each controlled read address, read and multiplex the data and provide outputs of m-sets of n-multiplexed signals to multiplexer demultiplexer circuits 5, and in the case of reading, required cross connect is conducted. The multiplexer demultiplexer circuits 5 convert the m-sets of the multiplexed signals into parallel signals and demultiplex them into a-sets of channel data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a cross-connect device for cross-connecting high-speed signals.

[0002]

2. Description of the Related Art In recent years, a cross-connect device that can not only perform multiplexing but also output a multiplexed signal to an arbitrary port in an appropriate unit is used for a transmission device. FIG. 3 is a block diagram for explaining a conventional cross-connect device of this type that realizes cross-connection of a-channel signals. In FIG. 3, reference numeral 10 denotes a multiplex conversion circuit, 2
0 is a selection circuit, 30 and 40 are bit storage elements,
50 is a selection circuit, and 60 is a demultiplexing circuit.

[0003] The a channel data is multiplexed by the multiplex conversion circuit 10.
Is converted into one channel multiplexed data. The multiplexed data is alternately written to the storage elements 30 or 40 by the selection circuit 20 sequentially. Read-side selection circuit 50
The read address is controlled so that the order of the output signals is arbitrarily changed, and the multiplexed data read with the multiplexed order changed is input to the demultiplexing circuit 60 and converted into a parallel data. The data is output to the output port, but the read address is changed so that the desired channel data can be output from the desired port.

[0004]

The conventional cross-connect device operates and operates as described above. However, since all the data of the a-channel are multiplexed into one signal, as a result, the data of the a-channel before multiplexing is obtained. In order to maintain the same transmission speed as (parallel signal), the speed of multiplexed data must be increased by a times. Therefore, if such a conventional cross-connect device attempts to perform a multi-channel and high-speed signal cross-connect, a high-speed storage element is required as a storage element.

That is, since signals of all channels are multiplexed in the signal stored in the storage element, it is difficult to realize a high-speed storage element that can store and update the signal as it is at this signal speed. As in the prior art, it is necessary to use two storage elements and to convert the frequency to a frequency at which these storage elements can operate. However, there is a problem that a large storage element is required and power consumption is increased.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and even when multi-channel cross-connect is performed at high speed, a high-speed storage element is not required and operation can be performed with low power consumption. It is intended to provide a cross-connect device.

[0007]

SUMMARY OF THE INVENTION The present invention relates to a cross-connect device for cross-connecting multi-channel data.
M separation circuits for separating the signals into parallel signals, and n holding the n × m data output from the m separation circuits
× m holding circuits and n × m held by the holding circuits
Multi-port TSW (time / time) comprising m selection circuits for selecting data in a time division manner in accordance with a controlled read address, reading and multiplexing the data, and outputting the selected data to an output port.
Switch).

Further, in a cross-connect device for cross-connecting multi-channel (hereinafter referred to as a-channel) data, m multiplex conversion circuits for converting a signal from the a channel into m n-channel multiplex signals, and an input port That separates an n-channel multiplexed signal input to n into n parallel signals
Separation circuits and n output from the m separation circuits
N × m holding circuits for holding × m data, and n × m data held by the holding circuit are selected and read and multiplexed in a time-division manner according to a read address to be controlled, thereby n-channel multiplexing. A multi-port TSW composed of m selection circuits for outputting to the output port as a signal, and converting an n-channel multiplexed signal output from the output port of the multi-port TSW into n parallel signals and converting the signal into an a-channel signal M demultiplexing circuits are provided.

[0009] Further, a multiport RAM is used for the multiport TSW.

Further, the multiport RAM is manufactured by a custom LSI.

The cross-connect device of the present invention having the above-described configuration enables high-speed multi-channel cross-connect.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a device configuration of a cross-connect device according to the present invention, showing a case where a-channel cross-connect is performed. In the figure, 1
M multiplexes a channels into m (a> m) signals
Multiplex conversion circuits 2, m separation circuits (serial-parallel conversion circuits) for separating the signal from the multiplex conversion circuit 1 into parallel signals (a signals), 3 a holding circuit for holding parallel signals, Reference numeral 4 denotes an m number of selection circuits for selecting, reading, and multiplexing the parallel signals held in the holding circuit 3 according to a controlled read address, and 5 denotes converting the multiplexed signals from the selection circuit 4 into parallel signals (a signals). There are m demultiplexing circuits to be converted. Note that the separation circuit 2, the holding circuit 3, and the selection circuit 4
W (time switch) unit 100.

Next, the operation of the embodiment shown in FIG. 1 will be described. The signal from the channel a is multiplexed by the multiplex conversion circuit 1 for every n (a> n) signals, and is converted into m n multiplexed signals. The converted n-multiplexed signal is divided into n × m by m separation circuits 2.
That is, the data is converted into a number of parallel data and held in the holding circuit 3 having a number of storage elements. The selection circuit 4 on the output side selects and reads out a data of the holding circuit 3 in a time-division manner according to the read address to be controlled, multiplexes the data, and outputs it to the demultiplexing circuit 5 as m n-multiplexed signals. The necessary cross connect is performed at the time of this reading. The demultiplexing circuit 5 converts each of the m multiplexed signals into parallel signals and separates them into a channel data.

That is, in the present embodiment, high-speed multi-channel signals can be processed at high speed by forming m short n-multiplexed signals by m multiplex conversion circuits, and short n-multiplexed signals by using m separation circuits. A signal is made into a signal data in parallel and stored in a storage elements so that the data can be stored in real time even if the storage speed of the storage element is not so high, and the read side is similarly configured. This realizes high-speed signal cross-connect with multiple channels.

FIG. 2 shows an embodiment of the present invention.
A case where signals of 56 channels are cross-connected is shown.
Numeral 1 designates 64 multiplex conversion circuits for multiplexing signals of four channels to make a total of 64 multiplex signals, and 2 each comprises an 8-bit shift register (that is, 25).
The multiplexed signal is converted into 25 by 64 separation circuits (performing processing of 6 channels × 2 bits) (serial-parallel conversion circuit)
6 parallel data. Reference numeral 3 denotes a holding circuit composed of 256 registers for holding parallel data, and 4 selects and reads the parallel data held by the holding circuit 3 in accordance with a controlled read address to form a 4-bit 64 multiplexed signal. The 64 selecting circuits for conversion and 5 are 64 demultiplexing circuits for converting the multiplexed signal from the selecting circuit 4 into 256 parallel signals. The separating circuit 2, the holding circuit 3, and the selecting circuit 4 are referred to as a TSW (time switch) unit 100.

Next, the operation of the embodiment shown in FIG. 2 will be described. The 256-channel signal is multiplexed by the multiplex conversion circuit 1 into 64 4-channel multiplexed signals, and the TSW unit 10
0 is input to each of the 64 8-bit shift registers, converted into 256 parallel data, and held in the 256 bit registers. The 64 selection circuits 4 on the output side select and read out 256 data in a time-division manner from the 256 bit registers according to the read address to be controlled, and as 64 multiplexed signals, 64 demultiplexing circuits 5
, The necessary cross-connect is performed at the time of reading. The demultiplexing circuit 5 converts each of the 64 multiplexed signals into four parallel signals and separates them into 256 channels.

A TSW (time switch) unit 100
Can use a multi-port RAM, and a commercially available multi-port RAM can be used. However, it is preferable that the multi-port RAM be formed of a custom LSI in view of selection of the number of ports.

[0018]

As described above, the cross-connect device of the present invention can realize a multi-channel, high-speed signal cross-connect with small size and low power consumption by reducing the speed of the multiplexed signal input to the storage element. effective.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a device configuration of a cross-connect device of the present invention.

FIG. 2 is a block diagram showing one embodiment of the present invention.

FIG. 3 is a block diagram for explaining a conventional cross-connect device of this type.

[Explanation of symbols]

 Reference Signs List 1 multiplex conversion circuit 2 separation circuit (serial-parallel conversion circuit) 3 holding circuit 4 selection circuit 5 multiplex separation circuit 10 multiplex conversion circuit 20, 50 selection circuit 30, 40 storage element 60 multiplex separation circuit 100 TSW (time switch) section

Claims (4)

[Claims] 1. A cross-connect device for cross-connecting multi-channel data, comprising: m separation circuits for separating an n-channel multiplexed signal input to an input port into n parallel signals; Nxm holding circuits for holding nxm data output from the circuit, and selecting and reading nxm data held by the holding circuits in a time-division manner in accordance with controlled read addresses A cross-connect device comprising a multi-port TSW (time switch) composed of m selection circuits that multiplex and output to an output port. 2. A cross-connect device for cross-connecting multi-channel (hereinafter referred to as a-channel) data, comprising: m multiplex conversion circuits for converting a signal from an a channel into m multiplexed n-channel signals; M separating circuits for separating an n-channel multiplexed signal input to n into n parallel signals, and n × m holding circuits for holding n × m data output from the m separating circuits And m selection circuits for selecting and reading and multiplexing the nxm data held by the holding circuit in a time-sharing manner in accordance with a controlled read address and outputting the multiplexed signal to an output port as an n-channel multiplexed signal. Multi-port TSW, n output from the output port of the multi-port TSW
Each of the channel multiplexed signals is converted into n parallel signals, and a
A cross-connect device, comprising: m demultiplexing circuits serving as channel signals. 3. The cross-connect device according to claim 1, wherein a multi-port RAM is used for the multi-port TSW. 4. The multi-port RAM has a custom LS
4. The cross-connect device according to claim 3, wherein the cross-connect device is manufactured in I.