JPH10270833A - Semiconductor device mounting construction - Google Patents
Semiconductor device mounting constructionInfo
- Publication number
- JPH10270833A JPH10270833A JP9074770A JP7477097A JPH10270833A JP H10270833 A JPH10270833 A JP H10270833A JP 9074770 A JP9074770 A JP 9074770A JP 7477097 A JP7477097 A JP 7477097A JP H10270833 A JPH10270833 A JP H10270833A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- resin
- circuit board
- connection
- conductive paste
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81194—Lateral distribution of the bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83194—Lateral distribution of the layer connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置を回路
基板に実装する際の構造と方法に関するものであり、リ
ペアーが容易でありかつ接続信頼性を向上させるための
半導体装置の実装構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure and a method for mounting a semiconductor device on a circuit board, and more particularly, to a mounting structure of a semiconductor device for easy repair and improving connection reliability.
【０００２】[0002]
【従来の技術】従来、半導体装置の回路基板上への実装
には、いわゆるＳＯＰやＱＦＰといった半導体パッケー
ジをＳＭＴ方式によりリフロー接続する技術がよく利用
されてきた。しかしながら、接続端子数の増加や半導体
装置の実装面積の縮小化の要求からベアチップ実装によ
る微細ピッチ化が進められている。2. Description of the Related Art Conventionally, for mounting a semiconductor device on a circuit board, a technique of reflow-connecting a semiconductor package such as a so-called SOP or QFP by an SMT method has been often used. However, due to a demand for an increase in the number of connection terminals and a reduction in the mounting area of the semiconductor device, a fine pitch by a bare chip mounting is being promoted.
【０００３】このベアチップ実装の例として図２（ａ）
を示す。この実装方法（特公平６−３０２６４９号公
報）では、半導体装置１に設けた突起電極２と回路基板
の接続パッド部６との間に導電性ペースト３を介在させ
半導体装置１と回路基板７とを位置決めして搭載し、加
熱して接続を行う。そして、接続力を高め、接続部の信
頼性を高めるためにエポキシ系などの有機系材料からな
る封止樹脂８を注入し、熱処理を行い封止樹脂８を硬化
する。その後に、電気的な接続の確認が行われるという
方法を採用している。FIG. 2A shows an example of this bare chip mounting.
Is shown. In this mounting method (Japanese Patent Publication No. 6-302649), the conductive paste 3 is interposed between the protruding electrode 2 provided on the semiconductor device 1 and the connection pad portion 6 of the circuit board, and the semiconductor device 1 and the circuit board 7 are connected to each other. Is positioned and mounted, and heated for connection. Then, a sealing resin 8 made of an organic material such as an epoxy-based material is injected to increase the connection force and the reliability of the connection portion, and heat treatment is performed to cure the sealing resin 8. Thereafter, a method of confirming the electrical connection is employed.
【０００４】また、図２（ｂ）には、ＡＣＦ（異方性導
電フィルム）により接続した例を示す。本接続方式は、
回路基板上にＡＣＦを張り付け、半導体装置と回路基板
とを対向させて位置合わせを行い、荷重、熱を加えＡＣ
Ｆを硬化させて接続をするという比較的簡単な工程で接
続を行える。半導体装置と回路基板間に接続するのに十
分な密着力を得られるという長所を有している。FIG. 2 (b) shows an example of connection by ACF (anisotropic conductive film). This connection method
ACF is attached on the circuit board, the semiconductor device and the circuit board are opposed to each other, and the circuit is positioned.
The connection can be performed by a relatively simple process of curing and connecting the F. It has the advantage that a sufficient adhesive force can be obtained for connection between the semiconductor device and the circuit board.
【０００５】[0005]
【発明が解決しようとする課題】上記の方法にて微細ピ
ッチ接続をした時の課題を以下に示す。Problems to be solved when a fine pitch connection is made by the above method will be described below.
【０００６】図２（ａ）の方法では突起電極の微細化に
伴い、突起電極上に転写される導電性ペーストの量が少
量になるために、半導体装置の突起電極と回路基板の接
続パッド間に接着強度が大きく、しかも信頼性の高い接
続を得るのが困難である。そのため、突起電極上に導電
性ペーストを転写し、回路基板に搭載した段階で接続の
良否を確認することは難しく、接続の良否の確認は搭載
後に半導体装置と回路基板間に封止樹脂８を注入し、接
続力を強化した後に行う必要がある。従って、封止樹脂
硬化後に接続の良否を確認し、接続不良の場合にチップ
を除去し再ボンディングすることは非常に困難であると
いう課題を有している。In the method shown in FIG. 2A, the amount of conductive paste transferred onto the projecting electrodes is reduced with the miniaturization of the projecting electrodes, so that the distance between the projecting electrodes of the semiconductor device and the connection pads of the circuit board is reduced. In addition, it is difficult to obtain a highly reliable connection with high adhesive strength. For this reason, it is difficult to transfer the conductive paste onto the protruding electrodes and to check the connection quality at the stage of mounting on the circuit board, and to check the connection quality after mounting the sealing resin 8 between the semiconductor device and the circuit board. It needs to be done after injection and strengthening the connection strength. Therefore, there is a problem that it is very difficult to check the connection quality after curing the sealing resin, and to remove and re-bond the chip when the connection is defective.
【０００７】図２（ｂ）の方法では、接続とＡＣＦ９の
硬化が同時に行われるために、接続後のリペアーは困難
である。In the method shown in FIG. 2B, the connection and the curing of the ACF 9 are performed simultaneously, so that the repair after the connection is difficult.
【０００８】また、接続時に樹脂を半硬化させ仮接続を
行い、電気的な接続の確認を行った後に本硬化をすると
いう方法も考えられるが、微細化された突起電極では仮
接続時に十分な電気的接続を得るのが難しいという問題
を有しているるために、本方式においてもリペアーが困
難であるという課題を有している。It is also conceivable to perform a temporary connection by semi-curing the resin at the time of connection, confirm the electrical connection, and then perform a full cure. Since there is a problem that it is difficult to obtain an electrical connection, there is a problem that repair is also difficult in this method.
【０００９】すなわち図２（ａ）（ｂ）の接続方法は、
共に接続工程の途中に電気的な接続の良否を確認するこ
とが出来なく、また接続不良チップを除去することが非
常に困難である。That is, the connection method shown in FIGS.
In both cases, the quality of the electrical connection cannot be confirmed during the connection process, and it is very difficult to remove the defective connection chip.
【００１０】そこで本発明の目的は、これらの課題を解
決するため、半導体装置と回路基板との接続を行った後
のリペアー性に優れており、しかも容易に、信頼性高く
接続可能な実装構造を提供することにある。In order to solve these problems, an object of the present invention is to provide a mounting structure which is excellent in repairability after connection between a semiconductor device and a circuit board and which can be connected easily and with high reliability. Is to provide.
【００１１】[0011]
【課題を解決するための手段】上記課題を解決するた
め、本発明では下記記載の構成を採用する。In order to solve the above problems, the present invention employs the following configuration.
【００１２】請求項１に記載の半導体装置の実装構造
は、突起電極を持つ半導体装置と該突起電極に対応する
接続パッドを有する回路基板とを接続して電子回路装置
を製造する半導体装置の実装構造において、半導体装置
の突起電極に対向するところの回路基板の接続パッドよ
り内側の部分に第一の樹脂が存在し、該突起電極と該接
続パッドの間には樹脂中に導電性を持つ粒子を分散させ
た導電性ペーストが存在していることを特徴とする半導
体装置の実装構造である。According to a first aspect of the present invention, there is provided a semiconductor device mounting structure for manufacturing an electronic circuit device by connecting a semiconductor device having a projecting electrode to a circuit board having a connection pad corresponding to the projecting electrode. In the structure, the first resin exists in a portion inside the connection pad of the circuit board opposite to the bump electrode of the semiconductor device, and particles having conductivity in the resin are provided between the bump electrode and the connection pad. Is a mounting structure of a semiconductor device, characterized in that a conductive paste in which is dispersed is present.
【００１３】請求項２に記載の半導体装置の実装構造
は、突起電極を持つ半導体装置と該突起電極に対応する
接続パッドを有する回路基板とを接続して電子回路装置
を製造する半導体装置の実装構造において、半導体装置
の突起電極に対向するところの回路基板の接続パッドよ
り内側の部分に第一の樹脂が存在し、該突起電極と該接
続パッドの間には樹脂中に導電性を持つ粒子を分散させ
た導電性ペーストが存在し、更に半導体装置と回路基板
間にはフィラーを含む熱硬化性の第二の樹脂を存在させ
ることを特徴とする半導体装置の実装構造である。According to a second aspect of the present invention, there is provided a semiconductor device mounting structure for manufacturing an electronic circuit device by connecting a semiconductor device having a protruding electrode and a circuit board having a connection pad corresponding to the protruding electrode. In the structure, the first resin exists in a portion inside the connection pad of the circuit board opposite to the bump electrode of the semiconductor device, and particles having conductivity in the resin are provided between the bump electrode and the connection pad. A semiconductor device mounting structure characterized in that a conductive paste in which is dispersed is present, and a thermosetting second resin containing a filler is present between the semiconductor device and the circuit board.
【００１４】請求項３に記載の半導体装置の実装構造
は、第一の樹脂はシート形状であることを特徴とする請
求項１又は２記載の半導体装置の実装構造である。According to a third aspect of the present invention, in the semiconductor device mounting structure, the first resin has a sheet shape.
【００１５】上記実装構造により、粘着性の強い第１の
樹脂が半硬化状態で電気的な接続が可能であり、接続不
良の半導体装置の除去が可能となる。また、微細ピッチ
接続において、接続不良の半導体装置の除去が可能とな
る。また、微細ピッチ接続において、信頼性の向上を図
るために導電性ペーストを含む熱可塑性の樹脂を、突起
電極と接続パッドとの間には導電性ペーストを介在させ
ることにより、基板のうねりや反りを吸収することが可
能である。According to the above mounting structure, the first resin having strong adhesiveness can be electrically connected in a semi-cured state, and a semiconductor device having poor connection can be removed. Further, in the fine pitch connection, it is possible to remove a semiconductor device having a connection failure. In addition, in fine-pitch connection, a thermoplastic resin containing a conductive paste is used to improve reliability, and a conductive paste is interposed between the protruding electrodes and the connection pads, so that undulation and warpage of the substrate are caused. Can be absorbed.
【００１６】更に半導体装置と回路基板との間にフィラ
ー入りの熱硬化性の第２の樹脂を用いて封止した場合
に、接続部での熱応力の緩和を図り、接続信頼性の向上
を図ることが可能である。Further, when sealing is performed between the semiconductor device and the circuit board using a thermosetting second resin containing a filler, thermal stress at the connection portion is relaxed to improve connection reliability. It is possible to plan.
【００１７】[0017]
【発明の実施の形態】前記のような構成で半導体装置と
回路基板とを接続することにより、半導体装置のリペア
ーが可能であり、更に良好な接続抵抗値でかつ信頼性の
高い接続が得られる。DESCRIPTION OF THE PREFERRED EMBODIMENTS By connecting a semiconductor device and a circuit board in the above-described configuration, the semiconductor device can be repaired, and a connection with a better connection resistance value and higher reliability can be obtained. .
【００１８】以下、本発明による実施例を図面に基づい
て説明する。図１は、半導体装置の実装断面構造を示す
概略図である。１は半導体装置であり、２は突起電極で
あり、３は隣接する突起電極と短絡しないように形成さ
れた導電性ペーストである。４は第一の樹脂であり、５
は接続部分の信頼性の向上を目的で注入された第二の樹
脂である。以上のように構成された半導体装置の実装構
造とその方法について図面を用いて説明する。An embodiment according to the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram showing a mounting cross-sectional structure of a semiconductor device. 1 is a semiconductor device, 2 is a protruding electrode, and 3 is a conductive paste formed so as not to short-circuit with an adjacent protruding electrode. 4 is the first resin, 5
Is a second resin injected for the purpose of improving the reliability of the connection portion. The mounting structure and method of the semiconductor device configured as described above will be described with reference to the drawings.
【００１９】まず、半導体装置の電極部分に突起電極を
形成する。微細ピッチ接続の場合、ワイヤーボンダー或
いは、メッキ法により得られた突起電極の先端は非常に
小さく、電極部分での接続面積が非常に小さくなる恐れ
がある。そこで半導体装置上に設けた突起電極に対して
平坦化処理を施し、先端部の面積を増加させると良い。
なお本実施例においては、微細ピッチ検討用にワイヤボ
ンディング装置により得られた金の突起電極の平坦化処
理後の高さ３５μｍ、先端の形状はφ３５μｍ程度とな
っている。First, a protruding electrode is formed on an electrode portion of a semiconductor device. In the case of fine pitch connection, the tip of a protruding electrode obtained by a wire bonder or a plating method is very small, and there is a possibility that the connection area at the electrode portion becomes very small. Therefore, a planarization process is preferably performed on the protruding electrode provided on the semiconductor device to increase the area of the tip.
In the present embodiment, the height of the gold protruding electrode obtained by the wire bonding apparatus after the flattening process is 35 μm and the shape of the tip is about φ35 μm for fine pitch consideration.
【００２０】また、基板のうねりや反りを吸収したり接
続部の熱応力を緩和する必要のある接続条件の場合に
は、図３（ａ）に示すように突起電極２に導電性ペース
ト３を転写する、或いは（ｂ）に示すように回路基板の
接続パッド部６に導電性ペースト３をプリコートすると
良い。どちらの方法も工程が簡単であり、導電性ペース
トが供給された電極を容易に得ることが可能である。本
実施例においては、突起電極に銀ペーストを転写してお
り、接続部に異金属が介在されていても接続抵抗値を低
く抑えることが可能である。In the case of connection conditions that need to absorb the undulation or warpage of the substrate or to reduce the thermal stress of the connection, the conductive paste 3 is applied to the bump electrode 2 as shown in FIG. It is preferable that the conductive paste 3 be transferred or pre-coated with the conductive paste 3 on the connection pad portions 6 of the circuit board as shown in FIG. Either method has a simple process, and an electrode supplied with a conductive paste can be easily obtained. In this embodiment, the silver paste is transferred to the protruding electrodes, so that the connection resistance value can be kept low even if a different metal is interposed in the connection portion.
【００２１】回路基板には図４の例に示すように所定の
サイズの第一の樹脂４を接続パッドの内側に配置する。
第一の樹脂の形状は、上に示した形状に限ったものでは
なく円形状でもかまわい。接続条件により形状を決定す
ると良い。ここで本実施例においては、第一の樹脂とし
て厚さ４０μｍのシート形状をした樹脂を用いている。
この第一の樹脂の厚さは、接続時の樹脂の広がりに大き
く影響してくるので、適切な厚さの樹脂を選択する。As shown in the example of FIG. 4, a first resin 4 of a predetermined size is arranged on the circuit board inside the connection pad.
The shape of the first resin is not limited to the shape described above, but may be a circular shape. The shape should be determined according to the connection conditions. In this embodiment, a sheet-like resin having a thickness of 40 μm is used as the first resin.
Since the thickness of the first resin greatly affects the spread of the resin at the time of connection, a resin having an appropriate thickness is selected.
【００２２】ここで、第一の樹脂の存在範囲が制御しや
すく、かつリペアーが容易であるためにシート状の第一
の樹脂を用いたが、液状の樹脂を回路基板上にポッティ
ングしてもかまわない。液状の樹脂を用いる場合には、
配線パッド部を樹脂が覆わないようにポッティングする
量や樹脂の粘性を制御する。Here, the sheet-shaped first resin is used because the existing range of the first resin is easy to control and the repair is easy. However, even if the liquid resin is potted on the circuit board, I don't care. When using a liquid resin,
The amount of potting and the viscosity of the resin are controlled so that the wiring pad is not covered with the resin.
【００２３】図５に示すように、以上のようにして得た
電極を有する半導体装置と第一の樹脂を張付けた回路基
板とを相対させ、所定の位置に位置決めし、フェースダ
ウンで搭載した後、荷重と熱を加え接続する。As shown in FIG. 5, the semiconductor device having the electrodes obtained as described above and the circuit board to which the first resin is attached are opposed to each other, positioned at a predetermined position, and mounted face down. , Apply load and heat and connect.
【００２４】なお、本実施例での加熱条件は、第一の樹
脂、導電性ペーストが硬化或いは半硬化する温度である
約１６０℃〜２００℃、２０ｓｅｃで加熱して接続を行
う。この段階で接続の良否を目視または電気的に確認を
行う。ここで、不良を確認した場合には、半導体装置１
を除去し、再度接続を行う。The heating conditions in this embodiment are such that the first resin and the conductive paste are cured or semi-cured at a temperature of about 160 ° C. to 200 ° C. for 20 seconds for connection. At this stage, the quality of the connection is visually or electrically confirmed. Here, when a defect is confirmed, the semiconductor device 1
And remove and reconnect.
【００２５】更に信頼性の向上を図る場合には、図１に
示すように半導体装置１と回路基板７との間にフィラー
を有する第二の樹脂５にて封止し硬化させる。In order to further improve the reliability, the semiconductor device 1 is sealed and cured with a second resin 5 having a filler between the semiconductor device 1 and the circuit board 7 as shown in FIG.
【００２６】本実施例の場合、第二の樹脂として長瀬チ
バ製Ｔ４４８を用いて約１５０℃１ｈのオーブンで硬化
させ、半導体装置の実装構造を得ている。In the case of the present embodiment, a semiconductor device mounting structure is obtained by using T448 manufactured by Chise Nagase as the second resin and curing it in an oven at about 150 ° C. for 1 hour.
【００２７】以上のようにして得られた半導体装置の初
期接続抵抗は、４端子法で測定した結果、約１００ｍΩ
であり良好な接続抵抗値であった。The initial connection resistance of the semiconductor device obtained as described above was about 100 mΩ as a result of measurement by the four-terminal method.
And a good connection resistance value.
【００２８】なお図６に示すように、半導体装置１と回
路基板７との間に電気的な接続を行うのに十分な密着力
を得られる場合には、第２の樹脂を封止せずに、第一の
樹脂４と導電性ペースト３のみで接続を行っても良い。As shown in FIG. 6, when a sufficient adhesive force can be obtained between the semiconductor device 1 and the circuit board 7 to make electrical connection, the second resin is not sealed. Alternatively, the connection may be made only with the first resin 4 and the conductive paste 3.
【００２９】また、このようにして作成された半導体装
置の実装体のリペアー方法の一例を挙げる。目視または
電気的チェックで接続不良を確認した半導体装置の実装
体は、加熱されたリペアーツールを用いて半導体装置に
モーメントをかけることにより、半導体装置の除去が可
能である。An example of a method for repairing the semiconductor device package thus manufactured will be described. The mounted body of the semiconductor device, whose connection failure has been confirmed visually or by an electrical check, can be removed by applying a moment to the semiconductor device using a heated repair tool.
【００３０】また回路基板に残された硬化樹脂は、アセ
トンなどの有機溶剤を用いることにより容易に除去する
ことが可能である。The cured resin remaining on the circuit board can be easily removed by using an organic solvent such as acetone.
【００３１】本発明の半導体装置の実装構造は、上記し
た方法により従来の接続法では困難であった微細ピッチ
接続や半導体装置のリペアーを可能とし、極めて安定で
信頼性が高い接続方法を安価で可能とした実装体であ
る。The mounting structure of the semiconductor device according to the present invention enables fine pitch connection and repair of the semiconductor device by the above-mentioned method, which were difficult with the conventional connection method. This is a possible implementation.
【００３２】[0032]
【発明の効果】以上の説明で明らかにしたように、本発
明の回路基板の接続パッドの内側の箇所に第一の樹脂を
存在させた場合、第一の樹脂には十分な密着力があるた
め、第一の樹脂が半硬化時に半導体装置の突起電極部と
回路基板上の配線パッド部との間に電気的接続を得るこ
とが可能である。従って第一の樹脂が半硬化時に電気的
接続の確認を行えば、半導体装置を除去し再ボンディン
グすることが可能である。As has been clarified in the above description, when the first resin is present inside the connection pad of the circuit board of the present invention, the first resin has a sufficient adhesive force. Therefore, when the first resin is semi-cured, it is possible to obtain an electrical connection between the protruding electrode portion of the semiconductor device and the wiring pad portion on the circuit board. Therefore, if the electrical connection is confirmed when the first resin is semi-cured, the semiconductor device can be removed and re-bonded.
【００３３】また、接続後に半導体装置と回路基板間に
第二の樹脂により封止をすることによって電極部の接続
力を高め、信頼性を向上させることが可能である。Further, by sealing the semiconductor device and the circuit board between the semiconductor device and the circuit board after the connection, it is possible to increase the connection strength of the electrode portion and improve the reliability.
【００３４】更に熱可塑性の導電性ペーストを半導体装
置と回路基板間に介在させることにより、回路基板の反
りやうねりを吸収することが可能であり、半導体装置と
回路基板間に生じる熱応力の緩和を図ることが可能であ
る。Further, by interposing a thermoplastic conductive paste between the semiconductor device and the circuit board, it is possible to absorb the warpage and undulation of the circuit board, and to alleviate the thermal stress generated between the semiconductor device and the circuit board. It is possible to achieve.
【図１】本発明の実施例を説明するための半導体装置の
実装構造を示す断面図である。FIG. 1 is a cross-sectional view showing a mounting structure of a semiconductor device for explaining an embodiment of the present invention.
【図２】（ａ）従来の実装構造（ペースト転写方式）を
説明するための断面図である。 （ｂ）従来の実装構造（ＡＣＦ接続方式）を説明するた
めの断面図である。FIG. 2A is a cross-sectional view for explaining a conventional mounting structure (paste transfer method). (B) It is sectional drawing for demonstrating the conventional mounting structure (ACF connection system).
【図３】（ａ）本発明の実施例で用いる導電性ペースト
の突起電極への転写形状を説明するための断面図であ
る。（ｂ）本発明の実施例で用いる導電性ペーストの回
路基板上へのプリコート形状を説明するための断面図で
ある。FIG. 3A is a cross-sectional view for explaining a transfer shape of a conductive paste used in an embodiment of the present invention to a protruding electrode. (B) It is sectional drawing for demonstrating the pre-coat shape on the circuit board of the conductive paste used by the Example of this invention.
【図４】本発明で回路基板へ貼り付ける第一の樹脂の形
状の例を示した図である。FIG. 4 is a diagram showing an example of a shape of a first resin to be attached to a circuit board in the present invention.
【図５】本発明の接続方法を説明するための断面図であ
るFIG. 5 is a sectional view for explaining a connection method of the present invention.
【図６】本発明の他の実施例を説明するための断面図で
あるFIG. 6 is a cross-sectional view for explaining another embodiment of the present invention.
１ 半導体装置 ２ 突起電極 ３ 導電性ペースト ４ 第一の樹脂 ５ 第二の樹脂 ６ 接続パッド ７ 回路基板 ８ 封止樹脂 ９ ＡＣＦ（異方性導電フィルム） DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Protruding electrode 3 Conductive paste 4 First resin 5 Second resin 6 Connection pad 7 Circuit board 8 Sealing resin 9 ACF (anisotropic conductive film)
Claims (3)
に対応する接続パッドを有する回路基板とを接続して電
子回路装置を製造する半導体装置の実装構造において、
半導体装置の突起電極に対向するところの回路基板の接
続パッドより内側の部分に第一の樹脂が存在し、該突起
電極と該接続パッドの間には樹脂中に導電性を持つ粒子
を分散させた導電性ペーストが存在していることを特徴
とする半導体装置の実装構造。1. A mounting structure of a semiconductor device for manufacturing an electronic circuit device by connecting a semiconductor device having a projecting electrode and a circuit board having a connection pad corresponding to the projecting electrode,
The first resin is present in a portion inside the connection pad of the circuit board opposite to the projection electrode of the semiconductor device, and conductive particles are dispersed in the resin between the projection electrode and the connection pad. A mounting structure for a semiconductor device, wherein a conductive paste is present.
に対応する接続パッドを有する回路基板とを接続して電
子回路装置を製造する半導体装置の実装構造において、
半導体装置の突起電極に対向するところの回路基板の接
続パッドより内側の部分に第一の樹脂が存在し、該突起
電極と該接続パッドの間には樹脂中に導電性を持つ粒子
を分散させた導電性ペーストが存在し、更に半導体装置
と回路基板間にはフィラーを含む熱硬化性の第二の樹脂
を存在させることを特徴とする半導体装置の実装構造。2. A semiconductor device mounting structure for manufacturing an electronic circuit device by connecting a semiconductor device having a projecting electrode and a circuit board having a connection pad corresponding to the projecting electrode,
The first resin is present in a portion inside the connection pad of the circuit board opposite to the projection electrode of the semiconductor device, and conductive particles are dispersed in the resin between the projection electrode and the connection pad. A conductive paste, and a thermosetting second resin containing a filler between the semiconductor device and the circuit board.
徴とする請求項１又は２記載の半導体装置の実装構造。3. The mounting structure for a semiconductor device according to claim 1, wherein the first resin has a sheet shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9074770A JPH10270833A (en) | 1997-03-27 | 1997-03-27 | Semiconductor device mounting construction |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9074770A JPH10270833A (en) | 1997-03-27 | 1997-03-27 | Semiconductor device mounting construction |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10270833A true JPH10270833A (en) | 1998-10-09 |
Family
ID=13556864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9074770A Pending JPH10270833A (en) | 1997-03-27 | 1997-03-27 | Semiconductor device mounting construction |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10270833A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6590287B2 (en) | 2000-08-01 | 2003-07-08 | Nec Corporation | Packaging method and packaging structures of semiconductor devices |
| JP2011066231A (en) * | 2009-09-17 | 2011-03-31 | Sharp Corp | Solar battery module and method for manufacturing the same |
-
1997
- 1997-03-27 JP JP9074770A patent/JPH10270833A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6590287B2 (en) | 2000-08-01 | 2003-07-08 | Nec Corporation | Packaging method and packaging structures of semiconductor devices |
| JP2011066231A (en) * | 2009-09-17 | 2011-03-31 | Sharp Corp | Solar battery module and method for manufacturing the same |
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