JPH10260275A - Oscillation circuit, electronic circuit employing it, semiconductor device, electronic apparatus and clock employing them - Google Patents

Abstract

PROBLEM TO BE SOLVED: To oscillate an oscillation circuit with a low power consumption by setting the sum of absolute value of threshold voltage of first and second semiconductor switching elements constituting a signal inversion amplifier higher than the absolute value of a power supply voltage thereby reducing short circuit current flowing through the signal inversion amplifier. SOLUTION: A crystal oscillation circuit comprises a signal inversion amplifier 30, and a feedback circuit having a crystal oscillator 10. The signal inversion amplifier 30 comprises first and second circuits 40, 50 having P type or N type field effect transistors 42, 52 functioning as semiconductor switching elements. Sum of the absolute value of the transistors 42, 52 is set higher than the absolute value of a power supply voltage Vreg being applied from a power supply circuit section 60 to the signal inversion amplifier 30 and the absolute value of threshold voltage of the transistors 42, 52 is set lower than the absolute value of the power supply voltage Vreg.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillation circuit, an electronic circuit using the same, a semiconductor device using the same, an electronic device, and a timepiece.

[0002]

2. Description of the Related Art Oscillation circuits using quartz oscillators have been widely used in portable wristwatches, portable telephones, computer terminals, and the like. In such a portable electronic device, it is necessary to save power consumption and extend the life of the battery.

The crystal oscillation circuit comprises a signal inverting amplifier,
And a feedback circuit having a crystal oscillator. The signal inverting amplifier includes a pair of transistors, each transistor has, for example, a gate whose input side,
The drain is used as output. In this case, the respective transistors have their drain sides connected to each other, and their source sides connected to the ground and the power supply voltage side, respectively.

In the crystal oscillation circuit having the above configuration, when a power supply voltage is applied to the signal inverting amplifier, the output of the signal inverting amplifier is inverted by 180 degrees and fed back to the gate of each transistor. By this feedback operation, the transistors constituting the signal inverting amplifier are alternately turned on and off, the oscillation output of the crystal oscillation circuit gradually increases, and finally the vibrator performs stable oscillation.

However, in the conventional crystal oscillation circuit, the absolute value of the voltage Vreg applied to the signal inverting amplifier is calculated by using the threshold voltages VTP,
It was set to be equal to or greater than the sum of the absolute values of VTN.

| Vreg |> | VTP | + | VTN | (1) The inventor of the present invention has found that this causes a short-circuit current Is to flow from the high potential side to the low potential side in the signal inverting amplifier, resulting in the entire circuit. It has been found that this is a problem in reducing power consumption.

An object of the present invention is to provide an oscillation circuit capable of reducing a short-circuit current flowing through a signal inverting amplifier and oscillating with low power consumption, an electronic circuit using the same, a semiconductor device using the same, an electronic apparatus and a clock. Is to provide.

[0008]

To achieve the above object, according to the present invention, there is provided a signal inverting amplifier comprising:
The sum of the absolute values of the threshold voltages of the semiconductor switching element and the second semiconductor switching element is set to a value equal to or greater than the absolute value of the power supply voltage of the signal inverting amplifier, thereby limiting the short-circuit current flowing through the signal inverting amplifier. It is characterized by the following.

According to a second aspect of the present invention, there is provided a signal inverting amplifier, and a crystal oscillator connected between an output side and an input side of the signal inverting amplifier, wherein a phase of an output signal of the signal inverting amplifier is adjusted. A feedback circuit that inverts and feeds back the signal to the signal inverting amplifier, wherein the signal inverting amplifier is connected to a first potential side, and is driven on and off by the feedback input to drive the crystal resonator. A first circuit including a first semiconductor switching element, and a second potential side different from the first potential, connected to a second potential side, and driven on and off at a timing different from that of the first semiconductor switching element by the feedback input; A second circuit including a second semiconductor switching element for exciting and driving the element; and a first semiconductor forming a signal inverting amplifier. A switching element, the sum of the absolute value of the threshold voltage of the second semiconductor switching element, characterized in that it is set to the absolute value or more of the values of the potential difference of the first potential and the second potential.

In the crystal oscillation circuit according to the first and second aspects of the present invention, when a voltage is applied to the signal inverting amplifier, excitation driving of the crystal resonator is started. The output of the signal inverting amplifier is phase-inverted by a feedback circuit and fed back. Then, the operation of inverting and amplifying the feedback input signal by the signal inverting amplifier and outputting the inverted signal is repeatedly performed.

At this time, the first and second semiconductor switching elements constituting the signal inverting amplifier are driven on and off at different timings by the feedback input to drive the crystal resonator.

In the present invention, the sum of the absolute values of the threshold voltages of the first and second semiconductor switching elements is set to a value equal to or greater than the absolute value of the power supply voltage of the signal inverting amplifier. Therefore, it is possible to avoid that the first and second semiconductor switching elements are simultaneously turned on at the time of driving the circuit. As a result, the short-circuit current flowing through the signal inverting amplifier is greatly limited, and the power consumption can be reduced. it can.

In particular, according to the first and second aspects of the present invention, the first and second transistors are manufactured so as to satisfy the condition of the threshold voltage, thereby making it possible to end the countermeasures against the short-circuit current. This eliminates the need for special circuit components for short-circuit countermeasures. This makes it possible to reduce the power consumption of the crystal oscillation circuit without lowering the degree of integration of the entire circuit.

In the first and second aspects of the present invention, the absolute values of the threshold voltages of the first and second semiconductor switching elements are both set to values lower than the absolute value of the power supply voltage of the signal inverting amplifier. There is a need.

According to a third aspect of the present invention, there is provided a bias for applying a first DC bias voltage and a second DC bias voltage to gates of a first semiconductor switching element and a second semiconductor switching element constituting a signal inverting amplifier. Circuit, wherein the first DC bias voltage and the second DC bias voltage are set so that the first semiconductor switching element and the second semiconductor switching element do not have a common ON period. And the second
Wherein the DC potential of the feedback input of the signal inverting amplifier, which is input to each gate of the semiconductor switching element, is individually shifted.

According to a fourth aspect of the present invention, there is provided a signal inverting amplifier, and a crystal oscillator connected between an output side and an input side of the signal inverting amplifier, wherein a phase of an output signal of the signal inverting amplifier is inverted. And a bias circuit for applying a direct current bias voltage to the signal inverting amplifier, wherein the signal inverting amplifier is connected to a first potential side and has an input connected to a gate. A first circuit including a first semiconductor switching element that is driven on and off by the feedback input to excite the crystal resonator and is connected to a second potential side different from the first potential, and is connected to a gate. Is turned on and off at a timing different from that of the first semiconductor switching element to excite the crystal resonator. A second circuit including a second semiconductor switching element, wherein the bias circuit applies a first DC bias voltage to a gate of the first semiconductor switching element forming a signal inverting amplifier. A bias circuit, and a second bias circuit for applying a second DC bias voltage to a gate of a second semiconductor switching element forming the signal inverting amplifier, wherein the first DC bias voltage and the second The DC bias voltage is set so that the first semiconductor switching element and the second semiconductor switching element do not have a common ON period.
The DC potential of the feedback input of the signal inverting amplifier input to each gate of the semiconductor switching element and the second semiconductor switching element is individually shifted.

According to the third and fourth aspects of the present invention, the first and second DC bias voltages are respectively applied to the gates of the first and second semiconductor switching elements constituting the signal inverting amplifier.

The first DC bias voltage and the second DC bias voltage are set to values such that the first semiconductor switching element and the second semiconductor switching element do not have a common ON period. And individually shifting the DC potential of the feedback input of the signal inverting amplifier input to each gate of the second semiconductor switching element.

By employing the above configuration, according to the present invention, the first and second semiconductor switching elements constituting the signal inverting amplifier are turned on and off at different timings by the feedback input, and When the element is driven to excite, a common ON period in which the first and second semiconductor switching elements are both turned on does not occur. For this reason, it is possible to greatly reduce the short-circuit current flowing through the signal inverting amplifier, and to obtain a crystal oscillation circuit capable of performing stable oscillation with low power consumption.

In particular, according to the third and fourth aspects of the present invention, even when the absolute value of each threshold voltage of the first and second semiconductor switching elements is small, the short-circuit current of the signal inverting amplifier can be reduced. . For this reason, the power supply voltage of the crystal oscillation circuit can be reduced by that much,
From this aspect as well, it is possible to reduce the power consumption of the oscillation circuit.

According to a fifth aspect of the present invention, in the fourth aspect, the first DC bias voltage is set to the first potential, and the second DC bias voltage is set to the second potential. It is characterized by that.

According to the present invention, by applying the DC bias voltage, the DC potential of the feedback input to each gate of the first semiconductor switching element and the second semiconductor switching element is individually changed to the first power supply of the power supply. The potential is shifted to the second potential side. Thus, it is possible to obtain a crystal oscillation circuit capable of reliably reducing the short-circuit current of the signal inverting amplifier with a simple circuit configuration.

According to a sixth aspect of the present invention, in any one of the first to fifth aspects, the first and second semiconductor switching elements are formed using field effect transistor elements of different conductivity types. I do.

An electronic circuit according to a seventh aspect of the present invention is the electronic circuit according to the first aspect.
6 is provided.

The semiconductor device according to the invention of claim 8 is the first invention.
6. The electronic circuit according to claim 6, wherein the oscillation circuit includes any one of the oscillation circuits according to any one of (1) to (6).

According to the ninth aspect of the present invention, there is provided an electronic apparatus according to the first aspect.
6. The electronic circuit according to claim 6, further comprising: an oscillation circuit according to claim 6.

By doing so, the power consumption of a portable electronic device such as a mobile phone or a portable computer terminal can be reduced, and the power consumption of a built-in battery or a secondary battery such as a battery can be reduced. It is possible to do.

The timepiece of the invention according to claim 10 is the watch according to claims 1 to 6.
Or an electronic circuit according to claim 7.

By doing so, a portable timepiece with low power consumption can be realized. As a result, the size of the entire timepiece can be reduced by using a smaller battery, and the same In the case of using a battery having a capacity of, it is possible to extend the life of the battery.

[0030]

Next, preferred embodiments of the present invention will be described in detail with reference to the drawings.

(First Embodiment) FIG. 1 shows a crystal oscillation circuit according to a first embodiment of the present invention. The crystal oscillation circuit of the present embodiment is a crystal oscillation circuit used in a quartz wristwatch.

The crystal oscillation circuit according to the present embodiment includes a signal inverting amplifier 30 and a feedback circuit. The feedback circuit includes a quartz oscillator 10,
It is configured to include a resistor 14 and capacitors 16 and 18 for phase compensation. The output VD (t) of the signal inverting amplifier 30 is
The phase is inverted, and this is fed back to the gate of the signal inverting amplifier 30 as a gate signal VG (t).

The signal inverting amplifier 30 is connected to a first potential side and a second potential side lower than the first potential side, and is configured to be supplied with power and driven by a potential difference between the two potentials. Here, the first potential is a ground potential VDD.
, And the second potential is set to the negative power supply potential Vreg supplied from the power supply circuit unit 60.

The signal inverting amplifier 30 includes a first circuit 4
0 and the second circuit 50.

The first circuit 40 includes a P-type field effect transistor 42 functioning as a first semiconductor switching element. The source of the transistor 42 is connected to the ground, and the drain is an output terminal. 80, the gate of which is connected to the feedback signal V
G (t) is applied.

The second circuit 50 includes an N-type field effect transistor 52 functioning as a second semiconductor switching element. The source of the transistor 52 is connected to the power supply terminal of the power supply circuit section 60. The drain is connected to the output terminal 80 side (here, connected to the drain of the transistor 42), and the feedback signal VG (t) is applied to the gate.

As the transistor 42, a P-type and enhancement type field effect transistor is used, and as the transistor 52, an N-type and enhancement type transistor is used. The threshold voltage VTP of the transistor 42 and the threshold voltage VTP of the transistor 52
As shown in the following equation, the value of TN is the sum of the absolute values of the power supply voltage and the power supply voltage applied to the signal inverting amplifier 30 (in this embodiment, since the ground potential VDD is set to 0,
The power supply voltage is Vreg which is the potential difference between the ground potential and the power supply potential.
Is set to be a value equal to or greater than the absolute value of | Vreg | ■ ≦ | VTP | + | VTN | (2) Further, the absolute value of the threshold voltage of each of the transistors 42 and 52 is a value lower than the absolute value of the power supply voltage as shown by the following equations. It is set to be. | Vreg | ■> | VTP | | Vreg | ■> | VTN | (3) As a result, the crystal oscillation circuit of the present embodiment greatly reduces the value of the short-circuit current flowing to the signal inverting amplifier 30 during circuit driving. Power consumption can be reduced.

The reason will be described below.

FIG. 2 is a timing chart of a conventional crystal oscillation circuit, and FIG. 3 is a timing chart of the crystal oscillation circuit of the present embodiment. The power supply voltage Vreg is applied from the power supply circuit section 60 on the horizontal axis. The lapsed time since the operation is performed, and the vertical axis represents the feedback input VG (t) to the signal inverting amplifier 30 and the ON / OFF states of the transistors 42 and 52, respectively.

As described above, in the conventional crystal oscillation circuit, the threshold voltages of the two transistors 42 and 52 constituting the signal inverting amplifier 30 are set so as to satisfy the above equation (1). In this case, the relationship between the threshold voltages of the transistors 42 and 52 and the ground potential VDD and the power supply potential Vreg is shown in FIG.
It becomes as shown in. That is, when the value of the feedback input VG (t) to the signal inverting amplifier 30 takes a value in the range of VTP> VG (t)> VTN with respect to the potentials of the threshold voltages VTP and VTN, both transistors 42 , 52 are both turned on.

Therefore, as shown in FIG. 2, while the transistors 42 and 52 are alternately turned on and off by the feedback signal VG (t), both transistors 42 and 52 are driven.
Are periodically turned on, and a short-circuit current flows from the high potential (VDD) to the low potential (Vreg) side, which hinders reduction in power consumption. Was.

On the other hand, in the present embodiment, the threshold voltages of the transistors 42 and 52 are set so as to satisfy the above equations (2) and (3).
In this case, each threshold voltage and the ground potential V
FIG. 5 shows the relationship between DD and the power supply potential Vreg. That is, if the value of the feedback input VG (t) to the signal inverting amplifier 30 takes a value in the range of VTN> VG (t)> VTP with respect to the potentials of the threshold voltages VTP and VTN, both transistors 42 , 52 are surely turned off, and there is no common ON period during which both transistors 42, 52 are turned on as in the prior art.

That is, as shown in FIG. 3, while the transistors 42 and 52 are alternately turned on and off by the feedback signal VG (t), both transistors 42 and 5 are driven.
There is no longer a period during which both the transistors 2 are turned on, so that the short-circuit current, which has conventionally been a problem, can be greatly reduced, and the power consumption of the crystal oscillation circuit can be reduced.

In particular, in the present embodiment, a countermeasure against a short-circuit current of the signal inverting amplifier 30 can be performed without increasing the number of circuit components.

In the present embodiment, the absolute value of the threshold voltage of each of the transistors 42 and 52 is set to a value smaller than the absolute value of the power supply voltage Vreg as shown in the above equation (3). Thus, low power consumption can be realized while maintaining a stable oscillation operation of the crystal oscillation circuit.

That is, in the crystal oscillation circuit, the absolute value of the amplitude of the feedback signal VG (t) of the signal inverting amplifier 30 does not exceed the absolute value of the power supply voltage Vreg of the signal inverting amplifier. Therefore, by setting the absolute values of the threshold voltages of the transistors 42 and 52 so as to satisfy the above equation (3),
2 can be stably turned on and off alternately.

According to the experiments performed by the present inventors, the absolute value was set to 0.
When the oscillation circuit is driven by using the power supply voltage Vreg of 9 volts, a favorable oscillation state can be maintained even if the sum of the absolute values of the threshold voltages of the transistors 42 and 52 is changed within the range shown by the following equation. It was confirmed that power consumption was possible.

1.4 volts> | VTP | + | VTN
> 0.9 volts Further, in the present embodiment, the off-leak current of transistors 42 and 52 can be reduced for the following reasons, and from this aspect also, the power consumption of the entire circuit can be reduced.

FIG. 6 is a characteristic diagram showing the relationship between the drain current ID of the enhancement transistor and the gate-source voltage VGS. As shown in the figure, in the enhancement type transistor, the characteristic curve of ID-VGS shifts to the left as the threshold voltage is lowered, and its off-leakage current increases as shown by the broken line in the figure (see FIG. When VGS is lower than the threshold voltage VTH and the transistor is off, the current ID flowing through this transistor becomes an off-leakage current as shown by the broken line in the figure).

Therefore, when the threshold voltages of the transistors 42 and 52 are set low as in the conventional oscillation circuit, the off-leakage current below the threshold voltage increases and the power consumption increases accordingly.

On the other hand, in the present embodiment, since the threshold voltages of the transistors 42 and 52 are set to a large value as shown by the equation (2), each transistor 4
The value of the off-leak current flowing through the circuits 2 and 52 is significantly reduced, and the power consumption of the entire circuit can be reduced.

(Second Embodiment) In the first embodiment, the case where the threshold voltages of the transistors 42 and 52 are configured to satisfy the above equation (2) and the short-circuit current is reduced. Although described in the example, in the second embodiment, even when the transistors 42 and 52 are formed under the condition shown in the equation (1) as in the related art,
By applying a DC bias voltage to the gates of the transistors 42 and 52, the short-circuit current of the signal inverting amplifier 30 can be reduced, as in the first embodiment.

FIG. 7 shows a crystal oscillation circuit according to the present embodiment, and FIG. 8 shows a timing chart thereof.

The crystal oscillation circuit of the present embodiment has a first bias for individually shifting the DC potential of the feedback input VG (t) of the signal inverting amplifier 30 input to each gate of each of the transistors 42 and 52. The circuit 70 includes a second bias circuit 80.

Each of the bias circuits 70 and 80 includes capacitors 72 and 82 for removing a DC component and resistors 74 and 84 for applying a DC bias voltage.

The capacitors 72 and 82 are used to remove a DC component from the gate signal VG (t) and apply the signal to the gates of the corresponding transistors 42 and 52.

The resistor 74 is connected between the gate of the transistor 42 and the ground VDD, and raises the DC potential of the feedback input VG (t) input to the gate of the transistor 42 to the ground potential VDD.

The resistor 84 is connected between the gate of the transistor 52 and the power supply Vreg, and lowers the DC potential of the feedback input VG (t) input to the gate of the transistor 52 to the power supply potential Vreg.

With the above configuration, the gate signal VG (t) fed back to the signal inverting amplifier 30 is supplied to the first and second bias circuits 70 and 80 so that VGP (t) and VGN ( As shown in t), each of the transistors 4 is changed in a state where the DC potential is changed to VDD and the power supply potential Vreg.
2, 52 are applied to the gates.

Therefore, while the transistors 42 and 52 are alternately turned on and off, both transistors 42 and 52 are driven.
52, there is no longer a period during which both the transistors 52 are turned on. As a result, the signal inverting amplifier 3
It is possible to greatly reduce the short-circuit current flowing through the inside of 0 and reduce power consumption.

In particular, in this embodiment, even if the absolute value of each threshold voltage of the enhancement type transistors 42 and 52 is set to a small value, the short-circuit current can be reduced. As a result, the power supply voltage applied to the signal inverting amplifier 30 can be reduced, and power consumption can be reduced in this respect as well.

Note that the first bias circuit 70 and the second
The bias voltage applied by the bias circuit 80 is set to a potential other than in the above-described embodiment, provided that the transistors 42 and 52 do not have a common ON period. The positions may be shifted individually.

The present invention is not limited to the above embodiments, and various modifications can be made within the scope of the present invention.

For example, in the above embodiment, the first circuit 40 and the second circuit 50 constituting the signal inverting amplifier 30
Has been described using a single transistor as an example, but the first and second circuits 4 and 4 may be used as necessary.
It is also possible to configure a circuit by combining circuit elements other than those described above without impairing the functions of 0 and 50.

Further, the crystal oscillation circuit of the above embodiment,
It is preferable to constitute a semiconductor device including an electronic circuit and mount it on a portable electronic device having a limited power supply capacity, such as a portable telephone, a portable computer terminal, and other portable devices.

In this embodiment, the case where the crystal oscillation circuit is used for an electronic circuit for a timepiece has been described as an example. However, the present invention is not limited to this, and other applications, such as a portable telephone, It is also extremely effective when used widely in portable electronic devices with limited power supply capacity, such as portable computer terminals and other portable devices.

[0067]

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of a crystal oscillation circuit according to the present invention.

FIG. 2 is a timing chart of a conventional circuit.

FIG. 3 is a timing chart of the circuit shown in FIG. 1;

FIG. 4 is an explanatory diagram showing a relationship between a threshold voltage, a power supply potential, and a ground potential of a conventional circuit.

FIG. 5 is an explanatory diagram illustrating a relationship between a threshold voltage, a power supply potential, and a ground potential according to the first embodiment.

FIG. 6: VGS-ID of an enhancement type transistor
It is a characteristic diagram.

FIG. 7 is a circuit diagram of a crystal oscillation circuit according to a second embodiment of the present invention.

FIG. 8 is a timing chart of the second embodiment.

[Explanation of symbols]

 REFERENCE SIGNS LIST 10 crystal oscillator 14 feedback resistor 30 signal inverting amplifier 40 first circuit 42 field effect transistor 50 second circuit 52 field effect transistor 60 power supply circuit unit 70, 80 first and second bias circuits

Claims (10)

[Claims] 1. The sum of absolute values of threshold voltages of a first semiconductor switching element and a second semiconductor switching element constituting a signal inverting amplifier is set to a value equal to or greater than an absolute value of a power supply voltage of the signal inverting amplifier. An oscillation circuit for limiting a short-circuit current flowing through the signal inverting amplifier. 2. A signal inverting amplifier, comprising: a crystal oscillator connected between an output side and an input side of the signal inverting amplifier; A feedback circuit for feedback-inputting the signal to the amplifier, wherein the signal inverting amplifier is connected to a first potential side, and is driven on and off by the feedback input to drive the crystal resonator.
A first circuit including a semiconductor switching element, and a quartz oscillator that is connected to a second potential side different from the first potential and is driven on and off at a timing different from that of the first semiconductor switching element by the feedback input. A second circuit including a second semiconductor switching element for exciting and driving the first semiconductor switching element, and a sum of absolute values of threshold voltages of the first semiconductor switching element and the second semiconductor switching element forming a signal inverting amplifier. Is set to a value equal to or greater than the absolute value of the potential difference between the first potential and the second potential. 3. A bias circuit for applying a first DC bias voltage and a second DC bias voltage to gates of a first semiconductor switching element and a second semiconductor switching element constituting a signal inverting amplifier, The first DC bias voltage and the second DC bias voltage are set so that the first semiconductor switching element and the second semiconductor switching element do not have a common ON period.
An oscillation circuit which individually shifts a DC potential of a feedback input of the signal inverting amplifier input to each gate of the semiconductor switching element and the second semiconductor switching element. 4. A signal inverting amplifier, comprising: a crystal resonator connected between an output side and an input side of the signal inverting amplifier; And a bias circuit for applying a DC bias voltage to the signal inverting amplifier, wherein the signal inverting amplifier is connected to a first potential side and the feedback input is input to a gate. A first circuit including a first semiconductor switching element which is driven on and off by the device to excite and drive the crystal resonator; and a feedback input connected to a second potential side different from the first potential and inputted to a gate. By the first
A second circuit including a second semiconductor switching element that is driven on and off at a timing different from that of the semiconductor switching element to excite the crystal resonator, and wherein the bias circuit includes a first inverting amplifier constituting a signal inverting amplifier. A first DC bias voltage applied to a gate of the semiconductor switching element;
And a second circuit for applying a second DC bias voltage to a gate of a second semiconductor switching element constituting a signal inverting amplifier.
Wherein the first DC bias voltage and the second DC bias voltage are set to a value in which the first semiconductor switching element and the second semiconductor switching element do not have a common ON period. An oscillation circuit for individually shifting a DC potential of a feedback input of the signal inverting amplifier input to each gate of the first semiconductor switching element and the gate of the second semiconductor switching element. 5. The method according to claim 4, wherein the first DC bias voltage is set to the first potential, and the second DC bias voltage is set to the second potential. Oscillation circuit. 6. The oscillation circuit according to claim 1, wherein said first and second semiconductor switching elements are formed using field-effect transistor elements of different conductivity types. 7. An electronic circuit comprising the oscillation circuit according to claim 1. 8. A semiconductor device comprising the oscillation circuit according to claim 1 or the electronic circuit according to claim 7. 9. An electronic device comprising the oscillation circuit according to claim 1 or the electronic circuit according to claim 7. 10. A timepiece comprising the oscillation circuit according to claim 1 or the electronic circuit according to claim 7.