JPH10256719A - Soldering method, circuit board suitable therefor and surface mount component - Google Patents

Soldering method, circuit board suitable therefor and surface mount component

Info

Publication number
JPH10256719A
JPH10256719A JP8182797A JP8182797A JPH10256719A JP H10256719 A JPH10256719 A JP H10256719A JP 8182797 A JP8182797 A JP 8182797A JP 8182797 A JP8182797 A JP 8182797A JP H10256719 A JPH10256719 A JP H10256719A
Authority
JP
Japan
Prior art keywords
circuit board
surface mount
heat
solder
mount component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8182797A
Other languages
Japanese (ja)
Inventor
Tomoyuki Nakai
智之 中井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Corp
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Corp, Omron Tateisi Electronics Co filed Critical Omron Corp
Priority to JP8182797A priority Critical patent/JPH10256719A/en
Publication of JPH10256719A publication Critical patent/JPH10256719A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent a surface mount component from lifting from a circuit board in a mounting step by the reflow soldering, making the most of the mount ing structure advantages without adhesives. SOLUTION: Surface mount components 4 are temporarily bonded to a circuit board 1 with a paste solder 3, the board 1 is fed in a reflow furnace to heat the entire board, until the solder 3 melts to solder the components 4 to a conductor pattern 2 on the board 1. The heating of the board 1 is made while letting the heat of the components 4 escape to the board 1 from a bypass heat conduction passage made of a material having a higher thermal conductivity than that of the air, for bypassing the normal heat conduction path of the solder 3.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、表面実装部品がペ
ースト半田で仮止めされた回路基板をリフロー炉内に導
入して全体的に加熱し、これによりペースト半田を溶融
させて表面実装部品を回路基板上の導体パターンに接合
するリフロー式の半田付け方法、並びに、同方法に好適
な回路基板及び表面実装部品に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board in which surface-mounted components are temporarily fixed with paste solder, introduced into a reflow furnace and heated as a whole. The present invention relates to a reflow soldering method for bonding to a conductor pattern on a circuit board, and a circuit board and a surface mount component suitable for the method.

【0002】[0002]

【従来の技術】従来において、表面実装部品を回路基板
上の導体パターンに接合するためになされていた表面実
装技術は、大別すると(a)接着剤なしの方法、(b)
接着剤ありの方法、に分けられる。
2. Description of the Related Art Conventionally, surface mounting techniques for joining a surface mounting component to a conductor pattern on a circuit board are roughly classified into (a) a method without an adhesive, and (b) a method without an adhesive.
It is divided into the method with adhesive.

【0003】前者の(a)の方法が適用される表面実装
部品の実装構造は、図9に示すように、回路基板1上に
配置された導体パターン2の上面にペースト半田3を塗
布後、表面実装部品4を載せた構造のものであって、回
路基板1に対し表面実装部品4が固定されていない。
[0003] The mounting structure of a surface mount component to which the former method (a) is applied is, as shown in FIG. 9, after a paste solder 3 is applied to the upper surface of a conductor pattern 2 disposed on a circuit board 1. This is a structure having the surface mount component 4 mounted thereon, and the surface mount component 4 is not fixed to the circuit board 1.

【0004】他方、後者の(b)の方法が適用される表
面実装部品の実装構造は、図10に示すように、図9の
実装構造に接着剤5が付加されて回路基板1に対し表面
実装部品4が固定されている。
On the other hand, as shown in FIG. 10, the mounting structure of the surface mounting component to which the latter method (b) is applied is such that an adhesive 5 is added to the mounting structure of FIG. The mounting component 4 is fixed.

【0005】このため、特に表面実装部品4が回路基板
1よりも先に加熱される温風加熱によるリフロー式の半
田付け工程において、前者の(a)の方法が適用される
表面実装部品の実装構造によると、ペースト半田3を溶
融させて表面実装部品4を回路基板1上の導電パターン
2に接合する際、図11の如く表面実装部品4が指向性
が定まることなく浮き上がるチップ浮き不良や、図12
の如く表面実装部品4が立ち上がるツームストーン不良
がしばしば発生する。
[0005] For this reason, in the reflow soldering step by hot air heating in which the surface mount component 4 is heated before the circuit board 1 is mounted, the former method (a) is applied. According to the structure, when the solder paste 3 is melted and the surface-mounted component 4 is joined to the conductive pattern 2 on the circuit board 1, a chip floating defect in which the surface-mounted component 4 is lifted without determining the directivity as shown in FIG. FIG.
As described above, a tombstone defect in which the surface mount component 4 rises often occurs.

【0006】それに対し、後者の(b)の方法が適用さ
れる表面実装部品の実装構造では、表面実装部品4と回
路基板1を接着剤5で固定した構造のため、上記不良が
回避される。
On the other hand, in the mounting structure of the surface mounting component to which the latter method (b) is applied, the above defect is avoided because the surface mounting component 4 and the circuit board 1 are fixed with the adhesive 5. .

【0007】しかしながら、後者の(b)の方法が適用
される表面実装部品の実装構造の場合には、いわゆる半
田のセルフアライメント効果が利用できなくなる。
However, in the case of the mounting structure of a surface mounting component to which the latter method (b) is applied, the so-called self-alignment effect of solder cannot be used.

【0008】この半田のセルフアライメント効果は、半
田が溶融する場合に、半田の界面張力により、回路基板
に対して表面実装部品が位置ずれしていても正しい位置
に回復するというセルフアライメント現象に起因する効
果である。そして、この半田のセルフアライメント効果
を期待することができないと、次に説明するような問題
が発生する。
The self-alignment effect of the solder is caused by a self-alignment phenomenon that, when the solder is melted, due to the interfacial tension of the solder, even if the surface-mounted component is misaligned with respect to the circuit board, the component is recovered to a correct position. Effect. If the self-alignment effect of the solder cannot be expected, the following problem will occur.

【0009】回路基板に表面実装部品を位置ずれなく実
装するためには、実装機の精度以外に回路基板の表面状
態も大きな要因となる。回路基板の位置ずれに関する要
因は、回路基板を構築する基板材料が樹脂をベースとす
る複合材料であることもあり、回路基板の表面状態を安
定に維持することは、比較的難しい課題である。半田付
けするための実装工程としては、回路基板への表面実装
部品の搭載精度の悪さをある程度許容した方が、コスト
的に有利である。このことにより、接着剤を用いる図1
0の実装構造は、半田のセルフアライメント効果を期待
することができなくなり、表面実装部品の実装精度に関
して回路基板に対する要求が厳しくなりコストが高くな
る。例えば、実装工程で基板そりが発生しない耐熱性の
高い高級回路基板が必要となることがある。
In order to mount surface-mounted components on a circuit board without displacement, the surface condition of the circuit board as well as the accuracy of the mounting machine is a major factor. A factor related to the displacement of the circuit board is that the substrate material for constructing the circuit board may be a resin-based composite material, and it is relatively difficult to maintain a stable surface state of the circuit board. As a mounting step for soldering, it is more cost-effective to allow a certain degree of inaccuracy in mounting surface-mounted components on a circuit board. As a result, FIG.
In the case of the mounting structure of No. 0, the self-alignment effect of the solder cannot be expected, and the requirement for the mounting accuracy of the surface mounting components on the circuit board becomes strict, and the cost increases. For example, a high-grade circuit board with high heat resistance that does not cause board warpage in the mounting process may be required.

【0010】[0010]

【発明が解決しようとする課題】こうした観点から、半
田のセルフアライメント効果を期待することができる図
9の実装構造を採用し、表面実装部品がペースト半田で
仮止めされた回路基板をリフロー炉内に導入して全体的
に加熱し、これによりペースト半田を溶融させて表面実
装部品を回路基板上の導体パターンに接合するリフロー
式の半田付け方法を実施する方が有利である。
From this point of view, the mounting structure shown in FIG. 9, which can expect a self-alignment effect of the solder, is employed. It is more advantageous to carry out a reflow soldering method in which the solder paste is melted by this and the paste solder is melted to join the surface mount component to the conductor pattern on the circuit board.

【0011】しかし、前述したようなチップ浮きの現象
に対処する必要があるので、チップ浮きのメカニズムに
ついて検討及び実験をおこなった。この検討及び実験の
内容について説明する。
However, since it is necessary to cope with the phenomenon of chip floating as described above, the mechanism and mechanism of the chip floating were examined and tested. The contents of the study and the experiment will be described.

【0012】図11、図12に夫々示したチップ浮き
は、ペースト半田を溶融させ半田付けを行うリフロー炉
中で発生する。このチップ浮きのメカニズムは、図13
に示す関係であり、表面実装部品が回路基板より早く昇
温した場合にチップ浮きが発生する。表面実装部品が回
路基板より早く昇温した場合、リフロー炉中での熱の流
れは、図13中の矢印aの流れとなる。
The chip floating shown in FIGS. 11 and 12 occurs in a reflow furnace for melting and soldering the paste solder. The mechanism of this chip floating is shown in FIG.
The chip floating occurs when the temperature of the surface-mounted component rises faster than that of the circuit board. When the temperature of the surface-mounted component rises faster than that of the circuit board, the flow of heat in the reflow furnace is as indicated by an arrow a in FIG.

【0013】この場合、ペースト半田は表面実装部品4
と接しているところが最も高温となり、ペースト半田の
中に温度分布差が現れて溶融温度に達した箇所から次第
に順次溶融される。そして、溶融を始めたペースト半田
部分は、その半田の界面張力により周囲の未溶融半田の
粒子を吸い寄せながら溶融領域を拡大していき、最終的
には全てのペースト半田が溶融することになる。
In this case, the paste solder is used for the surface mount component 4.
The temperature is highest at the part in contact with the solder paste, and a difference in temperature distribution appears in the paste solder, and the solder is gradually melted from the point where the melting temperature is reached. Then, the paste solder portion that has started to melt expands the melting region while attracting surrounding unmelted solder particles due to the interfacial tension of the solder, and eventually all the paste solder is melted.

【0014】そのため、上記の溶融部分が周囲の未溶融
粒子を吸い寄せる時、表面実装部品自体はその反作用を
受ける。この反作用により表面実装部品が浮き上がる。
Therefore, when the above-mentioned molten portion draws in the surrounding unmelted particles, the surface-mounted component itself receives the reaction. This reaction causes the surface mount component to float.

【0015】このようなことから、表面実装部品の浮き
上がりは、ペースト半田中に過度の温度分布差が発生す
ることによりひき起されると結論ずけることができる。
From the above, it can be concluded that the lifting of the surface-mounted component is caused by an excessive temperature distribution difference in the paste solder.

【0016】前述した理由により、従来の接着剤を利用
しないリフロー式の半田付け方法による実装工程の場合
に於いては、その実装工程で回路基板から表面実装部品
が浮き上がるというチップ浮き不良が発生するという問
題点があった。
For the above-mentioned reason, in the case of the mounting process by the conventional reflow soldering method without using the adhesive, a chip floating defect that the surface mounting component is lifted from the circuit board in the mounting process occurs. There was a problem.

【0017】これに伴ない、チップ浮きの有無を実装工
程の最終工程で検査したり、またチップ浮きがあれば半
田を溶かし、表面実装部品を所定位置に位置決めした後
半田付けをやり直す、という無駄作業が必要となる問題
点があった。
Along with this, the presence or absence of chip floating is inspected in the final step of the mounting process, and if there is chip floating, the solder is melted, and the surface mounting component is positioned at a predetermined position, and then re-soldering is performed. There was a problem that required work.

【0018】この発明は、このような従来の問題点に着
目してなされたものであり、その目的とするところは、
接着剤なしの実装構造の利点を生かしつつ、リフロー式
の半田付け方法による実装工程で回路基板から表面実装
部品が浮き上がるというチップ浮き不良の発生を防止し
得る半田付け方法、並びに、同方法に好適な回路基板及
び表面実装部品を提供することにある。
The present invention has been made in view of such a conventional problem.
A soldering method capable of preventing the occurrence of chip floating failure, in which surface mounting components are lifted from a circuit board in a mounting process using a reflow soldering method, while taking advantage of the mounting structure without an adhesive, and suitable for the same method. To provide a simple circuit board and a surface mount component.

【0019】[0019]

【課題を解決するための手段】この出願の請求項1に記
載の発明は、表面実装部品がペースト半田で仮止めされ
た回路基板をリフロー炉内に導入して全体的に加熱し、
これによりペースト半田を溶融させて表面実装部品を回
路基板上の導体パターンに接合するリフロー式の半田付
け方法であって、前記回路基板の加熱は、ペースト半田
を経由する熱伝経路をバイパスしかつ空気よりも熱伝導
率が高い物質からなるバイパス熱伝経路により、表面実
装部品の熱を回路基板に逃がしつつ行われることを特徴
とする半田付け方法にある。
According to a first aspect of the present invention, a circuit board having surface-mounted components temporarily fixed by paste solder is introduced into a reflow furnace and heated as a whole.
This is a reflow soldering method of melting the paste solder and joining the surface mount component to the conductor pattern on the circuit board, wherein the heating of the circuit board bypasses a heat transfer path via the paste solder and The soldering method is characterized in that the heat of the surface mount component is released to a circuit board by a bypass heat transfer path made of a substance having a higher thermal conductivity than air.

【0020】そして、この出願の請求項1に記載の発明
によれば、溶融半田の中に過度の温度分布差が発生する
のを防止して、チップ浮き不良の発生を防止することが
できる。
According to the first aspect of the present invention, it is possible to prevent an excessive difference in temperature distribution from occurring in the molten solder, thereby preventing a chip floating defect.

【0021】この出願の請求項2に記載の発明は、表面
実装部品が実装される予定領域には、実装される表面実
装部品の下面に接してその熱を回路基板に逃がす空気よ
りも熱伝導率が高い熱伝導部材が配置されていることを
特徴とする回路基板にある。
According to the invention described in claim 2 of the present application, in the area where the surface mount component is to be mounted, heat conduction is higher than air that contacts the lower surface of the surface mount component to be mounted and releases the heat to the circuit board. In a circuit board, a heat conductive member having a high rate is disposed.

【0022】そして、この出願の請求項2に記載の発明
によれば、ペースト半田の中に過度の温度分布差が発生
するのを回路基板によって防止して、チップ浮き不良の
発生を防止することができる。
According to the invention as set forth in claim 2 of the present application, the occurrence of an excessive temperature distribution difference in the paste solder is prevented by the circuit board, and the occurrence of chip floating failure is prevented. Can be.

【0023】この出願の請求項3に記載の発明は、請求
項2に記載の発明において、前記熱伝導部材は、所定厚
さに塗布されたフラックスであることを特徴とする回路
基板にある。
According to a third aspect of the present invention, there is provided a circuit board according to the second aspect, wherein the heat conductive member is a flux applied to a predetermined thickness.

【0024】そして、この出願の請求項3に記載の発明
によれば、フラックスを回路基板上に塗布する際、同時
にそのフラックスをチップ浮き不良の発生を防止するた
めの熱伝導部材として回路基板上に形成することができ
る。
According to the third aspect of the present invention, when the flux is applied to the circuit board, the flux is simultaneously applied to the circuit board as a heat conductive member for preventing the occurrence of chip floating defects. Can be formed.

【0025】この出願の請求項4に記載の発明は、請求
項2に記載の発明において、前記熱伝導部材は、所定厚
さの導体パターンであることを特徴とする回路基板にあ
る。
According to a fourth aspect of the present invention, there is provided the circuit board according to the second aspect, wherein the heat conductive member is a conductor pattern having a predetermined thickness.

【0026】そして、この出願の請求項4に記載の発明
によれば、表面実装部品の熱容量に合わせて導体パター
ンの熱伝導能力を変更し得ると共に、その導体パターン
を熱伝導専用若しくは信号線等との兼用とすることがで
きる。
According to the invention described in claim 4 of this application, the heat conduction capability of the conductor pattern can be changed in accordance with the heat capacity of the surface mount component, and the conductor pattern can be used exclusively for heat conduction or a signal line or the like. Can also be used.

【0027】この出願の請求項5に記載の発明は、請求
項2に記載の発明において、前記熱伝導部材は、所定厚
さのレジスト被膜であることを特徴とする回路基板にあ
る。
According to a fifth aspect of the present invention, in the circuit board according to the second aspect, the heat conductive member is a resist film having a predetermined thickness.

【0028】そして、この出願の請求項5に記載の発明
によれば、レジスト被膜を回路基板上に形成する際、同
時にそのレジスト被膜をチップ浮き不良の発生を防止す
るための熱伝導部材として形成することができる。
According to the invention as set forth in claim 5 of the present application, when a resist film is formed on a circuit board, the resist film is simultaneously formed as a heat conductive member for preventing occurrence of chip floating failure. can do.

【0029】この出願の請求項6に記載の発明は、回路
基板上に搭載した際にその下面に相当する部分には、回
路基板の表面に接する程度に突出された熱伝突部を有す
ることを特徴とする表面実装部品にある。
According to the invention described in claim 6 of the present application, when mounted on a circuit board, a portion corresponding to a lower surface thereof has a heat projecting portion protruding to an extent of contacting the surface of the circuit board. A surface mount component characterized by the following.

【0030】そして、この出願の請求項6に記載の発明
によれば、ペ−スト半田の中に過度の温度分布差が発生
するのを表面実装部品の熱伝突部によって防止して、チ
ップ浮き不良の発生を防止することができる。
According to the invention as set forth in claim 6 of the present application, an excessive temperature distribution difference is prevented from being generated in the paste solder by the heat transfer portion of the surface mount component. The occurrence of floating failure can be prevented.

【0031】[0031]

【発明の実施の形態】以下、この発明の好ましい実施の
形態につき、添付図面を参照して詳細に説明する。
Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

【0032】この発明の好ましい実施の形態が適用され
る表面実装部品の実装構造を図1に示す。
FIG. 1 shows a mounting structure of a surface mounting component to which a preferred embodiment of the present invention is applied.

【0033】図1には、半田のセルフアライメント効果
を期待することが可能な接着剤なしの実装構造が示され
ている。同図に示されるように、回路基板1上の導体パ
ターン2には、表面実装部品4を接合するためにぺース
ト半田3が塗布されており、また表面実装部品4が実装
される予定領域には、実装される表面実装部品4の下面
に接してその熱を回路基板1に逃がす空気よりも熱伝導
率が高い熱伝導部材6が配置されている。詳しくは、熱
伝導部材6を配置した箇所は、表面実装部品4の真下で
あって、導体パターン2の形成されていない領域A内で
ある。換言すれば、熱伝導部材6は、表面実装部品4の
下面と回路基板1の上面との間の隙間に位置することと
なる。
FIG. 1 shows a mounting structure without an adhesive capable of expecting a self-alignment effect of solder. As shown in FIG. 1, a paste solder 3 is applied to a conductor pattern 2 on a circuit board 1 for bonding a surface mount component 4, and a paste solder 3 is applied to a region where the surface mount component 4 is to be mounted. A heat conductive member 6 having a higher thermal conductivity than air that contacts the lower surface of the surface mount component 4 to be mounted and releases the heat to the circuit board 1 is disposed. Specifically, the place where the heat conductive member 6 is arranged is right below the surface mount component 4 and in the area A where the conductor pattern 2 is not formed. In other words, the heat conducting member 6 is located in a gap between the lower surface of the surface mount component 4 and the upper surface of the circuit board 1.

【0034】そして、このような実装構造によれば、表
面実装部品4がペースト半田3で仮止めされた回路基板
1は、前述したリフロー炉内に導入されて全体的に加熱
され、これによりペースト半田3が溶融されて、表面実
装部品4を回路基板1上の導体パターン2に接合される
リフロー式の半田付けがなされる際、表面実装部品4か
ら不用な熱が次のように逃がされる。
According to such a mounting structure, the circuit board 1 on which the surface-mounted components 4 are temporarily fixed by the paste solder 3 is introduced into the above-mentioned reflow furnace and is entirely heated. When the solder 3 is melted and the reflow soldering for joining the surface mount component 4 to the conductor pattern 2 on the circuit board 1 is performed, unnecessary heat is released from the surface mount component 4 as follows.

【0035】即ち、このようなリフロー式の半田付けが
なされる際、回路基板1の加熱は、図2に矢印にて示さ
れるように、ペースト半田3を経由する通常の熱伝経路
aをバイパスしかつ空気よりも熱伝導率が高い熱伝導物
材6で形成される熱伝経路bにより、表面実装部品4の
熱を回路基板1に逃がしつつ行われる。
That is, when such reflow soldering is performed, the circuit board 1 is heated by bypassing the normal heat transfer path a passing through the paste solder 3 as shown by the arrow in FIG. In addition, the heat of the surface mount component 4 is released to the circuit board 1 by the heat transfer path b formed of the heat conductive material 6 having a higher heat conductivity than air.

【0036】このため、リフロー炉内での表面実装部品
4と回路基板1との間の温度分布差を小さくすることが
できる。その温度分布差を小さくすることにより、ペー
スト半田3内の温度分布差も小さくなり、表面実装部品
4を浮かす推力ベクトルが小さくなる。
Therefore, the difference in temperature distribution between the surface mount component 4 and the circuit board 1 in the reflow furnace can be reduced. By reducing the temperature distribution difference, the temperature distribution difference in the paste solder 3 is also reduced, and the thrust vector for floating the surface mount component 4 is reduced.

【0037】ここで、表面実装部品4を浮かす推力ベク
トルについて、図3を参照しつつ説明する。
Here, the thrust vector that floats the surface mount component 4 will be described with reference to FIG.

【0038】図3は、回路基板1上の導体パターン2に
塗布されたペースト半田3内の温度分布状態を模式的に
表した図であり、領域内の温度分布差がなだらかな領域
Xと、領域内の温度分布差が急峻な領域Yとに区分して
示している。
FIG. 3 is a diagram schematically showing a temperature distribution state in the paste solder 3 applied to the conductor pattern 2 on the circuit board 1. The region Y is divided into a region Y in which the temperature distribution difference in the region is steep.

【0039】領域Xは、領域内の温度分布差がなだらか
なため、状態X1の如く周囲の半田粒子を吸い寄せるよ
りも、その場で溶融する傾向が強い。そのため、周囲の
半田粒子を吸い寄せる力のベクトルがそろい難く、表面
実装部品4を浮かす推力が発生しない。
In the region X, since the temperature distribution difference in the region is gentle, there is a stronger tendency to melt in-situ than to attract the surrounding solder particles as in the state X1. Therefore, it is difficult to make the vectors of the force for attracting the surrounding solder particles uniform, and no thrust for floating the surface mount component 4 is generated.

【0040】他方、領域Yは、領域内の温度分布差が急
峻なため、状態Y1の如く周辺の半田粒子を吸い寄せな
がら溶融していき、領域内の温度分布差が急峻なほどこ
の力のベクトルが一定方向を向きやすい。
On the other hand, in the region Y, since the temperature distribution difference in the region is steep, the peripheral solder particles are melted while attracting the solder particles as in the state Y1, and the vector of the force is increased as the temperature distribution difference in the region becomes steeper. But it is easy to turn in a certain direction.

【0041】そして、表面実装部品4を浮かす推力ベク
トルが小さいと、図11、図12に夫々示した如くのチ
ップ浮きの発生を無くすことができる。
If the thrust vector for floating the surface mount component 4 is small, the occurrence of chip floating as shown in FIGS. 11 and 12 can be eliminated.

【0042】次に、この発明の実施に好適な回路基板1
及び表面実装部品4の各形態について説明する。
Next, a circuit board 1 suitable for implementing the present invention will be described.
Each form of the surface mount component 4 will be described.

【0043】回路基板1の第1の形態は、図1の熱伝導
部材6として、図4に示す如く所定厚さに塗布されたフ
ッラクス6Aを適用した。この回路基板1の第1の形態
によると、フラックスを回路基板1上に塗布する際、同
時にそのフラックスをチップ浮き不良の発生を防止する
ための熱伝導部材用フッラクス6Aとして回路基板1上
に形成することができる。よって回路基板1上に図1の
熱伝導部材6を配置するうえでの作業性の観点で優れた
ものとなる。
In the first embodiment of the circuit board 1, a flux 6A applied to a predetermined thickness as shown in FIG. 4 is applied as the heat conducting member 6 in FIG. According to the first embodiment of the circuit board 1, when the flux is applied on the circuit board 1, the flux is formed on the circuit board 1 at the same time as the flux 6 </ b> A for the heat conducting member for preventing the occurrence of chip floating failure. can do. Therefore, it is excellent in terms of workability in arranging the heat conductive member 6 of FIG. 1 on the circuit board 1.

【0044】回路基板1の第2の形態は、図5に上面図
(a),断面図(b)で示すように、表面実装部品が実
装される予定領域4aとなるその表面実装部品を導体パ
ターンに接合する位置のランド(導体パターン2)7の
相互間に、所定厚さの導体パターンを適用した熱伝導部
材6を配置した。尚、回路基板1は上面がレジスト被膜
8で覆われており、レジスト開口部8aの各箇所に熱伝
導部材6、ランド7が露出される。この回路基板1の第
2の形態によると、表面実装部品4の熱容量に合わせて
熱伝導部材6用の導体パターンの熱伝導能力を変更し得
ると共に、その導体パターンを熱伝導専用若しくは信号
線等との兼用とすることができる。詳しくは、図6に示
す如くランド7の相互間に熱伝導部材としての導体パタ
ーン6aを配置し、かつ表面実装部品が実装される予定
領域4aでは少なくとも導体パターン6aの幅を信号線
等用の導体パターンの幅よりも太くすることにより、熱
伝導部材6用の導体パターンの熱伝導能力が向上され
る。また、同じく図6に示す如く導体パターン6aには
信号線等用の導体パターンに接続される導体パターン6
bが一体に形成されており、これにより導体パターン6
aを信号線等との兼用とし得ると共に、熱伝導部材6用
の導体パターンの熱伝導能力の向上を図れる。尚、導体
パターン6bが存在しなければ導体パターン6aは、熱
伝導部材として専用されるものとなる。
In the second embodiment of the circuit board 1, as shown in a top view (a) and a cross-sectional view (b) of FIG. A heat conductive member 6 to which a conductor pattern having a predetermined thickness is applied is arranged between lands (conductor patterns 2) 7 at positions where the lands are joined to the pattern. The circuit board 1 has an upper surface covered with a resist coating 8, and the heat conductive member 6 and the lands 7 are exposed at respective locations of the resist opening 8a. According to the second embodiment of the circuit board 1, the heat conduction capability of the conductor pattern for the heat conduction member 6 can be changed according to the heat capacity of the surface mount component 4, and the conductor pattern is dedicated to heat conduction or a signal line or the like. Can also be used. Specifically, as shown in FIG. 6, a conductor pattern 6a as a heat conducting member is arranged between the lands 7, and at least a width of the conductor pattern 6a in a region 4a where a surface mount component is to be mounted is set for a signal line or the like. By making the width larger than the width of the conductor pattern, the heat conduction capability of the conductor pattern for the heat conduction member 6 is improved. Also, as shown in FIG. 6, a conductor pattern 6a connected to a conductor pattern for signal lines or the like is provided on the conductor pattern 6a.
b are formed integrally with each other so that the conductor pattern 6
a can be used also as a signal line or the like, and the heat conduction capability of the conductor pattern for the heat conduction member 6 can be improved. If there is no conductor pattern 6b, the conductor pattern 6a is exclusively used as a heat conducting member.

【0045】回路基板1の第3の形態は、熱伝導部材6
として、所定厚さのレジスト被膜を適用した。この回路
基板1の第3実施例によると、レジスト被膜を回路基板
1上に形成する際、同時にそのレジスト被膜をチップ浮
き不良の発生を防止するための熱伝導部材として形成す
ることができる。特に、図7に示す関係で回路基板1上
のレジスト被膜8上面とランド7上面との間の寸法Sが
通常の半田付けがなされる場合に50ミクロン以上とな
るように、レジスト被膜8の厚さを厚くすることによ
り、回路基板1への表面実装部品4の実装後も、表面実
装部品4と回路基板1の表面とがレジスト被膜8によっ
て密着された状態に維持され好適である。
The third mode of the circuit board 1 is a heat conductive member 6
, A resist film having a predetermined thickness was applied. According to the third embodiment of the circuit board 1, when the resist film is formed on the circuit board 1, the resist film can be formed at the same time as a heat conductive member for preventing occurrence of chip floating failure. In particular, according to the relationship shown in FIG. 7, the thickness S of the resist film 8 is set so that the dimension S between the upper surface of the resist film 8 on the circuit board 1 and the upper surface of the land 7 becomes 50 μm or more when ordinary soldering is performed. By increasing the thickness, the surface mount component 4 and the surface of the circuit board 1 are preferably kept in close contact with the resist film 8 even after the surface mount component 4 is mounted on the circuit board 1, which is preferable.

【0046】表面実装部品4の第1の形態は、熱伝導部
材として、図8に示す如く回路基板1の表面に接する程
度に突出された熱伝突部6aを有するものを適用した。
この表面実装部品4の第1の形態の構成よると、ペース
ト半田の中に過度の温度分布差が発生しないように熱伝
突部6aによって表面実装部品4の熱を回路基板1に逃
がしつつ回路基板1の加熱をおこなえるので、チップ浮
き不良の発生を防止することができる。
In the first embodiment of the surface mount component 4, a heat conductive member having a heat projecting portion 6a protruding to the extent that it contacts the surface of the circuit board 1 as shown in FIG. 8 is applied.
According to the configuration of the first embodiment of the surface mount component 4, the heat of the surface mount component 4 is dissipated to the circuit board 1 by the heat transfer portion 6 a so that an excessive temperature distribution difference does not occur in the paste solder. Since the substrate 1 can be heated, it is possible to prevent occurrence of chip floating failure.

【0047】このような構成で熱伝導部材6の機能を回
路基板1又は表面実装部品4に持たせたので、接着剤な
しの実装構造の利点を生かしつつ、リフロー式の半田付
け方法による実装工程で回路基板から表面実装部品が浮
き上がるというチップ浮き不良の発生を防止し得ること
になる。
Since the function of the heat conductive member 6 is provided to the circuit board 1 or the surface mount component 4 in such a configuration, the mounting process using the reflow soldering method can be performed while taking advantage of the mounting structure without an adhesive. Thus, it is possible to prevent the occurrence of chip floating failure, in which the surface-mounted components rise from the circuit board.

【0048】[0048]

【発明の効果】以上の説明で明らかなように、本発明に
よれば、接着剤なしの実装構造の利点を生かしつつ、リ
フロー式の半田付け方法による実装工程で回路基板から
表面実装部品が浮き上がるというチップ浮き不良の発生
を防止し得る半田付け方法、並びに、同方法に好適な回
路基板及び表面実装部品を提供することができる。
As is apparent from the above description, according to the present invention, surface mounting components are lifted from a circuit board in a mounting process by a reflow soldering method while taking advantage of a mounting structure without an adhesive. And a circuit board and a surface mount component suitable for the method can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施に係る半田付け方法で半田付け対
象となる表面実装部品の実装構造及び熱伝導部材の断面
形状を表す図である。
FIG. 1 is a diagram showing a mounting structure of a surface mounting component to be soldered by a soldering method according to an embodiment of the present invention and a cross-sectional shape of a heat conductive member.

【図2】本発明の実施に係る半田付け方法により回路基
板に半田付けされる表面実装部品から回路基板への熱の
流れを模式的に表す図である。
FIG. 2 is a diagram schematically illustrating a flow of heat from a surface mount component to a circuit board which is soldered to the circuit board by a soldering method according to an embodiment of the present invention.

【図3】本発明の実施に係る半田付け方法を説明するた
めに用いたペースト半田の状態遷移を表す図である。
FIG. 3 is a diagram illustrating a state transition of paste solder used for describing a soldering method according to an embodiment of the present invention.

【図4】本発明の実施に係る半田付け方法に好適な回路
基板の第1の形態の構成を表す図である。
FIG. 4 is a diagram illustrating a configuration of a first embodiment of a circuit board suitable for a soldering method according to an embodiment of the present invention.

【図5】本発明の実施に係る半田付け方法に好適な回路
基板の第2の形態の構成を表す図である。
FIG. 5 is a diagram illustrating a configuration of a second embodiment of a circuit board suitable for a soldering method according to an embodiment of the present invention.

【図6】本発明の実施に係る半田付け方法に好適な回路
基板の第2の形態を詳細説明するために用いた図であ
る。
FIG. 6 is a view used for explaining in detail a second embodiment of a circuit board suitable for a soldering method according to an embodiment of the present invention.

【図7】本発明の実施に係る半田付け方法に好適な回路
基板の第3の形態を詳細説明するために用いた図であ
る。
FIG. 7 is a view used for explaining in detail a third embodiment of a circuit board suitable for a soldering method according to an embodiment of the present invention.

【図8】本発明の実施に係る半田付け方法に好適な表面
実装部品の第1の形態の構成を表す図である。
FIG. 8 is a diagram illustrating a configuration of a first embodiment of a surface mount component suitable for a soldering method according to an embodiment of the present invention.

【図9】接着剤なしの表面実装部品の実装構造を表す図
である。
FIG. 9 is a diagram illustrating a mounting structure of a surface mount component without an adhesive.

【図10】接着剤ありの表面実装部品の実装構造を表す
図である。
FIG. 10 is a diagram illustrating a mounting structure of a surface mounting component with an adhesive.

【図11】チップ浮き不良の一例を表す図である。FIG. 11 is a diagram illustrating an example of a chip floating defect.

【図12】チップ浮き不良の他の一例を表す図である。FIG. 12 is a diagram illustrating another example of a chip floating defect.

【図13】チップ浮きのメカニズムを説明するために用
いた図である。
FIG. 13 is a view used to explain the mechanism of chip floating.

【符号の説明】[Explanation of symbols]

1 回路基板 2 導体パターン 3 ペースト半田 4 表面実装部品 5 接着剤 6 熱伝導部材 7 ランド 8 レジスト被膜 DESCRIPTION OF SYMBOLS 1 Circuit board 2 Conductor pattern 3 Paste solder 4 Surface mount component 5 Adhesive 6 Thermal conductive member 7 Land 8 Resist coating

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 表面実装部品がペースト半田で仮止めさ
れた回路基板をリフロー炉内に導入して全体的に加熱
し、これによりペースト半田を溶融させて表面実装部品
を回路基板上の導体パターンに接合するリフロー式の半
田付け方法であって、 前記回路基板の加熱は、ペースト半田を経由する熱伝経
路をバイパスしかつ空気よりも熱伝導率が高い物質から
なるバイパス熱伝経路により、表面実装部品の熱を回路
基板に逃がしつつ行われることを特徴とする半田付け方
法。
1. A circuit board on which surface mount components are temporarily fixed by paste solder is introduced into a reflow furnace and heated as a whole, whereby the paste solder is melted to convert the surface mount components into conductor patterns on the circuit board. A reflow soldering method for bonding to the circuit board, wherein the heating of the circuit board is performed by a bypass heat transfer path made of a substance having a higher thermal conductivity than air, bypassing a heat transfer path passing through the paste solder. A soldering method, wherein the heat is carried out while radiating heat of a mounted component to a circuit board.
【請求項2】 表面実装部品が実装される予定領域に
は、実装される表面実装部品の下面に接してその熱を回
路基板に逃がす空気よりも熱伝導率が高い熱伝導部材が
配置されていることを特徴とする回路基板。
2. A heat conductive member having a higher thermal conductivity than air that contacts the lower surface of the mounted surface mount component and releases heat to the circuit board is disposed in the area where the surface mount component is to be mounted. A circuit board, comprising:
【請求項3】 前記熱伝導部材は、所定厚さに塗布され
たフラックスであることを特徴とする請求項2に記載の
回路基板。
3. The circuit board according to claim 2, wherein the heat conducting member is a flux applied to a predetermined thickness.
【請求項4】 前記熱伝導部材は、所定厚さの導体パタ
ーンであることを特徴とする請求項2に記載の回路基
板。
4. The circuit board according to claim 2, wherein the heat conductive member is a conductor pattern having a predetermined thickness.
【請求項5】 前記熱伝導部材は、所定厚さのレジスト
被膜であることを特徴とする請求項2に記載の回路基
板。
5. The circuit board according to claim 2, wherein the heat conductive member is a resist film having a predetermined thickness.
【請求項6】 回路基板上に搭載した際にその下面に相
当する部分には、回路基板の表面に接する程度に突出さ
れた熱伝突部を有することを特徴とする表面実装部品。
6. A surface-mounted component having a heat transfer portion protruding to such an extent as to come into contact with the surface of a circuit board, on a portion corresponding to a lower surface when mounted on the circuit board.
JP8182797A 1997-03-14 1997-03-14 Soldering method, circuit board suitable therefor and surface mount component Pending JPH10256719A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8182797A JPH10256719A (en) 1997-03-14 1997-03-14 Soldering method, circuit board suitable therefor and surface mount component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8182797A JPH10256719A (en) 1997-03-14 1997-03-14 Soldering method, circuit board suitable therefor and surface mount component

Publications (1)

Publication Number Publication Date
JPH10256719A true JPH10256719A (en) 1998-09-25

Family

ID=13757317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8182797A Pending JPH10256719A (en) 1997-03-14 1997-03-14 Soldering method, circuit board suitable therefor and surface mount component

Country Status (1)

Country Link
JP (1) JPH10256719A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012104659A (en) * 2010-11-10 2012-05-31 Fdk Corp Electronic component mount substrate
US11038317B2 (en) 2018-06-14 2021-06-15 Nichia Corporation Semiconductor device and method of manufacturing the semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012104659A (en) * 2010-11-10 2012-05-31 Fdk Corp Electronic component mount substrate
US11038317B2 (en) 2018-06-14 2021-06-15 Nichia Corporation Semiconductor device and method of manufacturing the semiconductor device
US11581699B2 (en) 2018-06-14 2023-02-14 Nichia Corporation Semiconductor device and method of manufacturing the semiconductor device
US11949209B2 (en) 2018-06-14 2024-04-02 Nichia Corporation Semiconductor device and method of manufacturing the semiconductor device

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