JPH10246676A - Method, circuit, and system for detecting junction temperature of mos gate power semiconductor device - Google Patents
Method, circuit, and system for detecting junction temperature of mos gate power semiconductor deviceInfo
- Publication number
- JPH10246676A JPH10246676A JP2293998A JP2293998A JPH10246676A JP H10246676 A JPH10246676 A JP H10246676A JP 2293998 A JP2293998 A JP 2293998A JP 2293998 A JP2293998 A JP 2293998A JP H10246676 A JPH10246676 A JP H10246676A
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- circuit
- resistor
- voltage
- temperature
- value
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 238000000034 method Methods 0.000 title claims abstract description 24
- 238000001514 detection method Methods 0.000 claims description 17
- 230000006870 function Effects 0.000 claims description 13
- 238000009966 trimming Methods 0.000 claims description 13
- 238000005259 measurement Methods 0.000 claims description 7
- 238000012544 monitoring process Methods 0.000 claims description 4
- 238000009529 body temperature measurement Methods 0.000 claims description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 15
- 229920005591 polysilicon Polymers 0.000 abstract description 15
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 230000008569 process Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 5
- 238000012937 correction Methods 0.000 description 3
- 230000003044 adaptive effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/01—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using semiconducting elements having PN junctions
- G01K7/015—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using semiconducting elements having PN junctions using microstructures, e.g. made of silicon
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/16—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
- G01K7/18—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a linear resistance, e.g. platinum resistance thermometer
- G01K7/20—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a linear resistance, e.g. platinum resistance thermometer in a specially-adapted circuit, e.g. bridge circuit
- G01K7/21—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a linear resistance, e.g. platinum resistance thermometer in a specially-adapted circuit, e.g. bridge circuit for modifying the output characteristic, e.g. linearising
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/16—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/16—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
- G01K7/22—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a non-linear resistance, e.g. thermistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
- H01L29/7804—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
- H03K17/0822—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in field-effect transistor switches
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K2217/00—Temperature measurement using electric or magnetic components already present in the system to be measured
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Nonlinear Science (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、パワーMOSFE
TやIGBTダイスなどのMOSゲート・パワー半導体
デバイスの接合部温度(junction temperature)を検出す
る方法および回路ならびにシステムに関する。さらに具
体的には、本発明は単純な温度センサをMOSゲート・
デバイス・ダイスに集積することに関し、さらに、セン
サをトリミングし、検出する方法および集積回路ならび
にシステムに関する。The present invention relates to a power MOSFET.
The present invention relates to a method, a circuit, and a system for detecting a junction temperature of a MOS gate power semiconductor device such as a T or an IGBT dice. More specifically, the present invention provides a simple temperature sensor with a MOS gate
The present invention relates to integrating into device dice, and to methods and integrated circuits and systems for trimming and detecting sensors.
【0002】[0002]
【従来の技術】パワー半導体デバイスの接合部温度(T
j )を正確に測定することは高度のレベルの動作信頼性
を達成する上で重要である。この問題が特に重要である
のは、抵抗値が6ミリオームであるデバイスのように、
Rds,on が非常に低いパワーMOSFETの場合であ
り、これらのデバイスは過負荷に対する保護が非常に困
難であるためである。2. Description of the Related Art The junction temperature of a power semiconductor device (T
Accurate measurement of j ) is important in achieving a high level of operational reliability. This problem is particularly important, as in devices with a resistance of 6 milliohms.
This is the case for power MOSFETs where R ds, on is very low, since these devices are very difficult to protect against overload.
【0003】パワー半導体デバイスの接合部温度を測定
するために集積回路が採用されていることは公知であ
る。しかし、Siemens 社製のTEMPFET などのような従来
のFETデバイスでは、パワー・デバイスの上またはそ
の近くにICをマウントする必要がある。もっと望まし
いことは、集積回路を標準パッケージに別々にパッケー
ジするか、あるいは集積回路をパワー・デバイスと一緒
にコパッケージ(co-package)できるようにすることであ
る。It is well known that integrated circuits have been employed to measure the junction temperature of power semiconductor devices. However, conventional FET devices, such as the Siemens TEMPFET, require mounting the IC on or near the power device. Even more desirable is to package the integrated circuit separately in a standard package or to allow the integrated circuit to be co-packaged with the power device.
【0004】温度センサをパワー半導体デバイスに集積
するにはさまざまな方法がある。1つの例として、ポリ
シリコン(polysilicon) ・ダイオード、P+/epi基
板ダイオードまたはラテラル(lateral) MOSFETが
温度検出のために組み込まれている。しかし、これらの
公知センサには制約があり、余分のマスクを使用する標
準外のプロセスを用いる製造が要求される。従って、望
ましいことは既存の半導体デバイスを製造する現存プロ
セスと整合性のある温度センサを組み込むことである。There are various ways to integrate a temperature sensor into a power semiconductor device. As one example, a polysilicon diode, a P + / epi substrate diode or a lateral MOSFET is incorporated for temperature sensing. However, these known sensors have limitations and require fabrication using non-standard processes that use extra masks. Therefore, what is desired is to incorporate a temperature sensor that is compatible with existing processes for manufacturing existing semiconductor devices.
【0005】[0005]
【発明が解決しようとする課題】N+ポリシリコン抵抗
などの抵抗をパワー半導体デバイスに組み入れて、接合
部温度を検出することが提案されている。ポリシリコン
抵抗を作るための標準的プロセスは、例えば、+/−2
0%といったように、変動幅が非常に大きいために、例
えば、0.1%/℃といったように、非常に低い温度係
数と比較したとき、測定温度の変動幅が+/−200℃
になる可能性がある。この問題はセンサを読み取るIC
をトリミングすることで解決できるが、個々のICの各
々をそれぞれのMOSFETまたはIGBT用にトリミ
ングすると、ICの大量生産プロセスが非常に複雑化す
ることになる。従って、さらに望ましいことは、ICを
パワー・デバイスに適応化させることを単純化すること
である。It has been proposed to incorporate a resistor, such as an N + polysilicon resistor, into a power semiconductor device to detect the junction temperature. Standard processes for making polysilicon resistors are, for example, +/- 2
Since the fluctuation range is very large, such as 0%, the fluctuation range of the measured temperature is +/− 200 ° C. when compared with a very low temperature coefficient, for example, 0.1% / ° C.
Could be The problem is the IC that reads the sensor
However, trimming each individual IC for a respective MOSFET or IGBT greatly complicates the mass production process of the IC. Therefore, what is further desirable is to simplify adapting an IC to a power device.
【0006】[0006]
【課題を解決するための手段】本発明によれば、N+ポ
リシリコン抵抗を組み入れてMOSゲート・半導体デバ
イスの接合部温度を検出するようにし、パワー・デバイ
スに自己適応する(self-adapting) 集積回路を採用して
いる。SUMMARY OF THE INVENTION In accordance with the present invention, an N + polysilicon resistor is incorporated to detect the junction temperature of a MOS gate-semiconductor device and is self-adapting integrated into a power device. Circuit is adopted.
【0007】接合部温度を検出するためにN+ポリシリ
コン抵抗を使用することには、いくつかの利点がある。
このセンサはInternational Rectifier Corporation 社
製のHEXFETパワーMOSFETや同じくInternational
Rectifier Corporation 社製のIGBTなどのように、
現存のMOSゲート半導体デバイスと互換性をもってい
る。センサはパワー・デバイスの中心から容易にルーチ
ング(route) してピーク温度を検出することができる。
熱時定数は非常に低く、代表例として、1μsのオーダ
であり、その大きさはオーダで従来のデバイスのそれよ
りも低くなっている。中心は電界酸化物(field oxide)
によってパワー端子から完全に絶縁されているため、そ
の絶縁は低電圧HEXFET MOSFETでは少なく
とも+\−60ボルト、IGBTではそれより高くなっ
ている。従って、ハイ・サイド(high side) パワー半導
体デバイスの温度はアースされたICコントロールを使
用して容易に検出することができる。[0007] There are several advantages to using an N + polysilicon resistor to sense junction temperature.
This sensor is a HEXFET power MOSFET manufactured by International Rectifier Corporation or International
Like IGBT made by Rectifier Corporation,
It is compatible with existing MOS gate semiconductor devices. The sensor can easily route from the center of the power device to detect peak temperatures.
Thermal time constants are very low, typically on the order of 1 μs, and are of the order of magnitude lower than those of conventional devices. Center is field oxide
Is completely insulated from the power terminals by a voltage of at least + \-60 volts for low voltage HEXFET MOSFETs and higher for IGBTs. Thus, the temperature of the high side power semiconductor device can be easily detected using grounded IC controls.
【0008】自己適応ICは代表例として、約10ビッ
トの小さな不揮発性メモリとトリミング・シーケンサを
含んでいる。集積回路が印刷配線基板上にあるいはハイ
ブリッドまたはパワー・モジュール内にパワー半導体デ
バイスと一緒に組み立てられ、エンドユーザによってテ
ストされるとき、代表例として5ボルトのプログラミン
グ信号がICの特殊な入力端に印加される。この信号は
ICの内部のトリミング・シーケンスを開始するが、こ
れは、 International Rectifier Corporation社から販
売されているIR3010デバイスで使用されているも
のと類似している。次に、ICはセンサのそれぞれの室
温抵抗に整合する最適なビット組合せを判断する。トリ
ミング・シーケンスはユーザからは完全に見えないよう
になっている。プログラミング・ピンがリリースされる
と、10ビット・ワードがICメモリに永久的にストア
される。A self-adaptive IC typically includes a small non-volatile memory of about 10 bits and a trimming sequencer. When an integrated circuit is assembled with a power semiconductor device on a printed wiring board or in a hybrid or power module and tested by an end user, typically a 5 volt programming signal is applied to a special input of the IC. Is done. This signal initiates a trimming sequence inside the IC, which is similar to that used in the IR3010 device sold by International Rectifier Corporation. Next, the IC determines the best bit combination that matches the room temperature resistance of each of the sensors. The trimming sequence is completely invisible to the user. When the programming pin is released, the 10-bit word is permanently stored in IC memory.
【0009】ICはポリシリコン抵抗の値をパワー・デ
バイスの接合部温度のイメージとして使用する。この集
積回路は検出温度が所定のしきい値を越えたとき単純な
過温度(overtemperature:OT)信号、プリ・アラーム
/シャット・ダウンを示すデュアルOT信号、または接
合部温度Tj の線形的測定値を提供する機能をもたせる
ことも可能である。これらの機能は比較的単純なアナロ
グ処理によって提供することができる。また、集積回路
はブリッジ接続された4ないし6個までのパワー半導体
デバイスの接合部温度をモニタする機能をもたせること
も可能である。The IC uses the value of the polysilicon resistor as an image of the junction temperature of the power device. The integrated circuit provides a simple overtemperature (OT) signal when the detected temperature exceeds a predetermined threshold, a dual OT signal indicating pre-alarm / shutdown, or a linear measurement of the junction temperature Tj. It is also possible to have the function of providing a value. These functions can be provided by relatively simple analog processing. The integrated circuit can also have the function of monitoring the junction temperature of up to four or six bridged power semiconductor devices.
【0010】本発明によれば、温度測定回路を自己トリ
ミングする方法はパワー半導体デバイスに配置されたそ
れぞれの温度検出抵抗に適応している。複数の連続カウ
ント値が生成され、可変電流が温度検出抵抗に供給さ
れ、この可変電流は各連続カウント値の関数として増加
する。抵抗の両端電圧が測定され、温度検出抵抗の両端
電圧があらかじめ定義した値まで達したときカウントは
中止される。これらの複数の値のうちの最終値がストア
される。According to the present invention, a method for self-trimming a temperature measurement circuit is adapted for each temperature sensing resistor located in a power semiconductor device. A plurality of successive count values are generated and a variable current is provided to the temperature sensing resistor, the variable current increasing as a function of each successive count value. The voltage across the resistor is measured and counting is stopped when the voltage across the temperature sensing resistor reaches a predefined value. The final value of these multiple values is stored.
【0011】連続カウント値の生成を開始するリセット
信号を供給することができる。一定電流値はストアされ
たカウント値、温度検出抵抗に供給された電流、および
測定された温度検出抵抗の両端電圧の関数として生成す
ることができる。測定電圧はあらかじめ定義した値に比
例する制限値と比較することができ、測定電圧が制限値
を越えたとき過温度信号を生成することができる。A reset signal for starting the generation of the continuous count value can be supplied. The constant current value can be generated as a function of the stored count value, the current supplied to the temperature sensing resistor, and the measured voltage across the temperature sensing resistor. The measured voltage can be compared to a limit value that is proportional to a predefined value, and an over-temperature signal can be generated when the measured voltage exceeds the limit value.
【0012】あらかじめ定義した値はバンドギャップ(b
andgap) 電圧に比例することができる。この方法は集積
回路によって実行することも可能である。The predefined value is the band gap (b
andgap) can be proportional to voltage. The method can also be performed by an integrated circuit.
【0013】本発明の別の形態によれば、自己トリミン
グ温度モニタリング回路はパワー半導体デバイスに配置
されたそれぞれの温度検出抵抗に適応している。シーケ
ンサは複数の連続カウント値を生成し、電流源は各連続
カウント値の関数として増加する値をもつ可変電流を温
度検出抵抗に供給する。測定回路は温度検出抵抗の両端
電圧を測定し、検出回路は温度検出抵抗の両端電圧があ
らかじめ定義した値まで達したときシーケンサのオペレ
ーションを中止する。カウント値のうちの最終値はメモ
リにストアされる。According to another aspect of the present invention, a self-trimming temperature monitoring circuit is adapted for each temperature sensing resistor located in a power semiconductor device. The sequencer generates a plurality of successive count values, and the current source supplies a variable current to the temperature sensing resistor having a value that increases as a function of each successive count value. The measuring circuit measures the voltage across the temperature detecting resistor, and the detecting circuit stops the operation of the sequencer when the voltage across the temperature detecting resistor reaches a predetermined value. The final value of the count value is stored in the memory.
【0014】リセット信号ジェネレータはシーケンサの
オペレーションを開始する信号を生成することができ
る。電流源は可変比率電流ミラー(variable ratio curr
ent mirror) を含むことが可能であり、シーケンサはカ
ウンタを含むことが可能である。あらかじめ定義した値
はバンドギャップ電圧に比例することができる。The reset signal generator can generate a signal that initiates operation of the sequencer. The current source is a variable ratio curr
ent mirror) and the sequencer can include a counter. The predefined value can be proportional to the bandgap voltage.
【0015】電流源はメモリにストアされた値の関数と
して一定電流を生成する一定電流源を含むことが可能で
あり、測定回路はこの一定電流を使用して抵抗の両端電
圧を測定することが可能である。過電圧検出回路は、一
定電流が温度検出抵抗の両端に供給されたとき、抵抗の
両端電圧をあらかじめ定義した値に比例する制限値と比
較し、過温度信号ジェネレータは測定電圧が制限値を越
えたとき過温度信号を生成する。The current source can include a constant current source that produces a constant current as a function of a value stored in memory, and the measurement circuit can use this constant current to measure the voltage across the resistor. It is possible. The overvoltage detection circuit compares the voltage across the resistor with a limit value that is proportional to a predefined value when a constant current is supplied across the temperature detection resistor, and the overtemperature signal generator detects that the measured voltage has exceeded the limit value. When the over temperature signal is generated.
【0016】回路は集積回路にすることが可能であり、
メモリはEEPROMにすることが可能である。The circuit can be an integrated circuit,
The memory can be an EEPROM.
【0017】本発明の別の形態によれば、システムはパ
ワー半導体デバイスの接合部温度を測定し、パワー半導
体デバイスに配置された温度検出抵抗と、温度検出抵抗
に適応可能である自己トリミング温度検出回路とを含ん
でいる。According to another aspect of the invention, a system measures a junction temperature of a power semiconductor device, and includes a temperature sensing resistor disposed on the power semiconductor device, and a self-trimming temperature sensing adaptable to the temperature sensing resistor. Circuit.
【0018】半導体デバイスはMOSFETにすること
も、IGBTにすることも可能である。回路は集積回路
にすることができ、集積回路とパワー半導体デバイスを
コパッケージすることが可能である。The semiconductor device can be a MOSFET or an IGBT. The circuit can be an integrated circuit, and the integrated circuit and the power semiconductor device can be co-packaged.
【0019】本発明のその他の特徴と利点は、以下添付
図面を参照して詳述されている本発明の説明から理解さ
れるはずである。Other features and advantages of the present invention will be understood from the description of the invention, which is set forth in detail below with reference to the accompanying drawings.
【0020】[0020]
【発明の実施の形態】以下、添付図面を参照して本発明
について詳しく説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the accompanying drawings.
【0021】図1は温度センサ・ポリシリコン抵抗をM
OSゲート・パワー半導体デバイス・ダイス(die) 9に
どのようにして実装できるかを示す図である。このダイ
ス9は例えば、パワーMOSFETまたはIGBTにす
ることができる。ポリシリコン抵抗10はピーク温度を
検出するためにソース・パッド11の付近で幅が狭くな
っている。抵抗の正方形の総数は1000から2000
までであり、これらはそれぞれ25Kオームから50K
オームに対応している。ゲート・パッド12、ドレイン
13、およびソース・パッド11はそれぞれ従来のパッ
ケージのピン14、15および16に接続されている。
センス・ピン1と2はそれぞれダイス9の抵抗側のセン
ス・パッド17と18に接続されている。FIG. 1 shows a temperature sensor / polysilicon resistor M
FIG. 3 is a diagram showing how the device can be mounted on an OS gate power semiconductor device die 9. The dice 9 can be, for example, a power MOSFET or IGBT. The polysilicon resistor 10 has a reduced width near the source pad 11 to detect peak temperature. The total number of resistance squares is 1000 to 2000
These are 25K ohms to 50K respectively
It corresponds to Ohm. Gate pad 12, drain 13 and source pad 11 are connected to pins 14, 15 and 16, respectively, of a conventional package.
Sense pins 1 and 2 are connected to sense pads 17 and 18 on the resistance side of dice 9, respectively.
【0022】図2は自己適応IC20を示す概略ブロッ
ク図である。IC20の自己適応オペーションを以下に
説明する。+5VがPROG入力端21に供給される
と、リセット信号がカウンタ22に送られる。これを受
けて、カウンタ22はカウントアップを開始し、可変電
流ミラー23の比率を大きくしていき、順に、抵抗10
に供給される電流を大きくしていく。センス抵抗10に
供給される電流は、抵抗両端電圧がライン29に現れた
バンドギャップ基準電圧Vbgの値を0.87倍した値に
達するまでランプアップ(ramp up) していく。このバン
ドギャップ基準電圧はバンドギャップ基準電圧供給源3
7から供給され、ディバイダ38の両端で分割されたあ
と、演算増幅器(op−amp)35に供給され、そこ
で分割電圧0.87Vbgが抵抗10の両端電圧と比較さ
れる。抵抗10の両端電圧が0.87Vbgに達すると、
演算増幅器35はステートを変え、その出力がANDゲ
ート39に供給され、そこで順にクロック・イネーブル
41がオフにされる。そのあと、ライン30に現れたイ
ネーブル信号はローになり、カウンタ22はカウントを
中止し、カウンタから供給された最終ビット・ワードが
EEPROM31にストアされる。FIG. 2 is a schematic block diagram showing the self-adaptive IC 20. The self-adaptive operation of IC 20 is described below. When +5 V is supplied to the PROG input terminal 21, a reset signal is sent to the counter 22. In response, the counter 22 starts counting up, increases the ratio of the variable current mirror 23, and sequentially sets the resistance 10
The current supplied to is increased. The current supplied to the sense resistor 10 ramps up until the voltage across the resistor reaches 0.87 times the value of the bandgap reference voltage V bg appearing on line 29. This band gap reference voltage is supplied to the band gap reference voltage source 3
7 and divided at both ends of the divider 38, the divided voltage is supplied to an operational amplifier (op-amp) 35 where the divided voltage 0.87V bg is compared with the voltage across the resistor 10. When the voltage across the resistor 10 reaches 0.87V bg ,
The operational amplifier 35 changes state, and its output is supplied to an AND gate 39, where the clock enable 41 is turned off in sequence. Thereafter, the enable signal appearing on line 30 goes low, counter 22 stops counting, and the last bit word provided by the counter is stored in EEPROM 31.
【0023】正常の温度検出オペレーション期間では、
PROG入力端21はプルダウン抵抗32によってアー
ス電位に保持されている。電流源40はゼロ温度係数電
流を生成し、これは電流ミラー23を流れ、センス抵抗
10の両端に流れる。抵抗に供給される電流の値は室温
において抵抗の両端電圧が0.87Vbgになるように、
EEPROM31にストアされた値を使用して制御され
る。During a normal temperature detection operation period,
The PROG input terminal 21 is held at the ground potential by a pull-down resistor 32. Current source 40 produces a zero temperature coefficient current, which flows through current mirror 23 and across sense resistor 10. The value of the current supplied to the resistor is set so that the voltage across the resistor is 0.87 V bg at room temperature.
It is controlled using the values stored in the EEPROM 31.
【0024】パワー・デバイスが170℃以上に発熱す
ると、センス電圧はVbgに達するので演算増幅器36は
ステートを変え、過温度(OT)信号がハイになる。電
流源40は温度係数がゼロであるため、IC温度がOT
しきい値に影響することが防止される。When the power device heats above 170 ° C., the sense voltage reaches V bg and the operational amplifier 36 changes state, causing the over-temperature (OT) signal to go high. Since the current source 40 has a temperature coefficient of zero, the IC temperature is OT
It does not affect the threshold.
【0025】EEPROM31はCMOS/EEPRO
Mプロセッサを使用して実現することも、「ツェナー・
ザッピング(zener zapping) 」によって実現することも
可能である。ICのサイズはわずか数mm2 である。The EEPROM 31 is a CMOS / EEPRO
It can also be implemented using M processors,
It is also possible to realize by "zener zapping". The size of the IC is only a few mm 2 .
【0026】図3はIC20の実際の実装例を示す図で
ある。IC20は非常に小さい表面マウント・パッケー
ジに組み立てることも、MOSFETやIGBTなどの
パワー・デバイス50と一緒にパワー・モジュール内に
コパッケージすることも可能である。FIG. 3 is a diagram showing an example of actual mounting of the IC 20. The IC 20 can be assembled in a very small surface mount package or co-packaged in a power module with a power device 50 such as a MOSFET or IGBT.
【0027】上記設計を行う際に注意すべきことは、ポ
リシリコン抵抗の温度係数(TC)の変動を制御するこ
とである。これらの変動はOTしきい値の変動に直接に
変換される。従って、TCの変動幅は+/−10%未満
であることが好ましい。It should be noted that the above-mentioned design should control the variation of the temperature coefficient (TC) of the polysilicon resistor. These variations translate directly into OT threshold variations. Therefore, it is preferable that the fluctuation range of TC is less than +/− 10%.
【0028】また、EEPROMのデータ消失を防止す
る注意も必要であり、このデータ消失は周囲温度が高く
なると起こる可能性がある。例えば、自動車応用分野で
は周囲温度は150℃であり、パワー・モジュール応用
分野では周囲温度が200℃であることが要求されてい
る。上記応用分野では、EEPROM31ではなく「ザ
ップ(zap) 」手法を使用した方が有利である。It is also necessary to take care to prevent data loss in the EEPROM, and this data loss may occur when the ambient temperature increases. For example, the ambient temperature is 150 ° C. for automotive applications and 200 ° C. for power module applications. In the above applications, it is advantageous to use a "zap" approach instead of the EEPROM 31.
【0029】以上、本発明の特定実施例を示して本発明
を説明してきたが、この分野の精通者ならば理解される
ように、種々態様に変更し、他の用途に応用することも
可能である。従って、本発明は上述した具体的開示内容
に限定されるものではなく、請求項に記載されている事
項によってのみ制限されるものである。Although the present invention has been described with reference to specific embodiments of the present invention, as will be understood by those skilled in the art, the present invention can be modified in various forms and applied to other uses. It is. Therefore, the present invention is not limited to the specific disclosure contents described above, but is limited only by the matters described in the claims.
【0030】[0030]
【発明の効果】以上説明したように、本発明のMOSゲ
ート・パワー半導体デバイスの接合部温度Tj を検出す
る方法および回路ならびにシステムによれば、N+ポリ
シリコン抵抗を組み入れてパワー・デバイスに自己適応
する集積回路を採用することによりICの大量生産プロ
セスを複雑化させないMOSゲート・パワー半導体デバ
イスの接合部温度Tj を検出する方法および回路ならび
にシステムを提供することが可能である。As described above, according to the method, circuit and system for detecting the junction temperature Tj of a MOS gated power semiconductor device according to the present invention, a self-powered device is incorporated by incorporating an N + polysilicon resistor. It is possible to provide a method and circuit and system for detecting the junction temperature Tj of a MOS gated power semiconductor device that does not complicate the mass production process of ICs by employing an adaptive integrated circuit.
【図1】温度検出ポリシリコン抵抗が本発明に従って組
み込まれているMOSゲート・パワー半導体デバイスを
示す平面図である。FIG. 1 is a plan view illustrating a MOS gated power semiconductor device in which a temperature sensing polysilicon resistor is incorporated according to the present invention.
【図2】本発明による温度検出集積回路を示すブロック
図である。FIG. 2 is a block diagram showing a temperature detection integrated circuit according to the present invention.
【図3】図2に示す集積回路をパワー半導体デバイスと
一体的に実装した例を示す概略図である。3 is a schematic diagram showing an example in which the integrated circuit shown in FIG. 2 is mounted integrally with a power semiconductor device.
1,2 センス・ピン 9 MOSゲート・パワー半導体デバイス・ダイス 10 ポリシリコン抵抗 11 ソース・パッド 12 ゲート・パッド 13 ドレイン 14,15,16 ピン 17,18 センス・パッド 20 自己適応IC 21 PROG入力端 22 カウンタ 23 可変電流ミラー 31 EEPROM 32 プルダウン抵抗 35 演算増幅器 38 ディバイダ 40 電流源 50 パワー・デバイス 1, 2 Sense pin 9 MOS gate power semiconductor device dice 10 Polysilicon resistor 11 Source pad 12 Gate pad 13 Drain 14, 15, 16 pin 17, 18 Sense pad 20 Self-adaptive IC 21 PROG input terminal 22 Counter 23 variable current mirror 31 EEPROM 32 pull-down resistor 35 operational amplifier 38 divider 40 current source 50 power device
─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成10年3月3日[Submission date] March 3, 1998
【手続補正1】[Procedure amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】特許請求の範囲[Correction target item name] Claims
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【特許請求の範囲】[Claims]
Claims (27)
ぞれの温度検出抵抗に適応するように温度測定回路を自
己トリミングする方法において、該方法は、 複数の連続カウント値を生成するステップと、 可変電流を温度検出抵抗に供給するステップであって、
前記電流の値は各連続カウント値の関数として増加する
ものと、 抵抗の両端電圧を測定するステップと、 温度検出抵抗の両端電圧があらかじめ定義した値までに
達したときカウントを中止するステップと、 前記複数の連続カウント値のうちの最終値をストアする
ステップとを備えたことを特徴とする方法。1. A method of self-trimming a temperature measurement circuit to adapt to respective temperature sensing resistors located on a power semiconductor device, the method comprising: generating a plurality of continuous count values; Supplying to the temperature detection resistor,
A step of measuring the voltage across the resistor, wherein the value of the current increases as a function of each successive count value, and a step of stopping counting when the voltage across the temperature detection resistor reaches a predefined value. Storing a final value of said plurality of consecutive count values.
連続カウント値を生成する前記ステップを開始するため
にリセット信号を供給するステップをさらに備えたこと
を特徴とする方法。2. The method of claim 1, further comprising: providing a reset signal to initiate said step of generating a plurality of consecutive count values.
し、その一定電流を前記温度検出抵抗に供給するステッ
プと、 温度検出抵抗の両端電圧を測定するステップとをさらに
備えたことを特徴とする方法。3. The method of claim 1, further comprising: generating a constant current as a function of a stored count value; supplying the constant current to the temperature sensing resistor; and measuring a voltage across the temperature sensing resistor. Performing the method.
と比較するステップと、 前記測定電圧が前記制限値を超えたとき過温度信号を生
成するステップとをさらに備えたことを特徴とする方
法。4. The method according to claim 3, wherein a measured voltage is compared to a limit value proportional to the predefined value, and an over-temperature signal is generated when the measured voltage exceeds the limit value. And a step.
らかじめ定義した値はバンドギャップ電圧に比例するこ
とを特徴とする方法。5. The method of claim 1, wherein the predefined value is proportional to a bandgap voltage.
は集積回路によって実行されることを特徴とする方法。6. The method of claim 1, wherein the method is performed by an integrated circuit.
ぞれの温度検出抵抗に適応する自己トリミング温度モニ
タリング回路において、該回路は、 複数の連続カウント値を生成するシーケンサと、 可変電流を温度検出抵抗に供給する電流源であって、前
記電流の値は各連続カウント値の関数として増加するも
のと、 温度検出抵抗の両端電圧を測定する測定回路と、 温度検出抵抗の両端電圧があらかじめ定義した値まで達
したとき前記シーケンサのオペレーションを中止する検
出回路と、 前記複数の連続カウント値のうちの最終値をストアする
メモリとを備えたことを特徴とする自己トリミング温度
モニタリング回路。7. A self-trimming temperature monitoring circuit adapted to each temperature detection resistor arranged in a power semiconductor device, the circuit comprising: a sequencer for generating a plurality of continuous count values; and a variable current supplied to the temperature detection resistor. A current source that increases as a function of each successive count value; a measurement circuit that measures the voltage across the temperature detection resistor; and a voltage measurement circuit that measures the voltage across the temperature detection resistor to a predefined value. A self-trimming temperature monitoring circuit, comprising: a detection circuit that stops the operation of the sequencer when the operation has been performed; and a memory that stores a final value of the plurality of continuous count values.
ーケンサのオペレーションを開始する信号を生成するリ
セット信号ジェネレータをさらに備えたことを特徴とす
る回路。8. The circuit according to claim 7, further comprising a reset signal generator for generating a signal for starting operation of said sequencer.
流源は可変比率電流ミラーを含むことを特徴とする回
路。9. The circuit of claim 7, wherein said current source comprises a variable ratio current mirror.
シーケンサはカウンタを含むことを特徴とする回路。10. The circuit according to claim 7, wherein said sequencer includes a counter.
あらかじめ定義した値はバンドギャップ電圧に比例する
ことを特徴とする回路。11. The circuit according to claim 7, wherein said predefined value is proportional to a bandgap voltage.
電流源は一定電流源を含み、該電流源は前記メモリにス
トアされた値の関数として一定電流を生成し、前記測定
回路は前記一定電流を使用して前記抵抗の両端電圧を測
定することを特徴とする回路。12. The circuit according to claim 7, wherein said current source comprises a constant current source, said current source producing a constant current as a function of a value stored in said memory, and said measuring circuit comprising said constant current source. A circuit using current to measure the voltage across said resistor.
記一定電流が前記温度検出抵抗の両端に供給されたと
き、該抵抗の両端の測定電圧を前記あらかじめ定義した
値に比例する制限値と比較する過電圧検出回路と、前記
測定電圧が前記制限値を超えたとき過温度信号を生成す
る過温度信号ジェネレータとをさらに備えたことを特徴
とする回路。13. The circuit of claim 12, wherein when the constant current is applied across the temperature sensing resistor, a measured voltage across the resistor is compared to a limit value proportional to the predefined value. A circuit for generating an over-temperature signal when the measured voltage exceeds the limit value.
回路は集積回路であることを特徴とする回路。14. The circuit according to claim 7, wherein said circuit is an integrated circuit.
メモリはEEPROMであることを特徴とする回路。15. The circuit according to claim 7, wherein said memory is an EEPROM.
測定するシステムにおいて、該システムは、 前記パワー半導体デバイスに配置された温度検出抵抗
と、 前記温度検出抵抗に適応可能である自己トリミング温度
検出回路とを備え、該自己トリミング温度検出回路は、 複数の連続カウント値を生成するシーケンサと、 可変電流を温度検出抵抗に供給する電流源であって、前
記電流の値は各連続カウント値の関数として増加するも
のと、 温度検出抵抗の両端電圧を測定する測定回路と、 温度検出抵抗の両端電圧があらかじめ定義した値まで達
したとき前記シーケンサのオペレーションを中止する検
出回路と、 前記複数の連続カウント値のうちの最終値をストアする
メモリとを備えたことを特徴とするシステム。16. A system for measuring a junction temperature of a power semiconductor device, the system comprising: a temperature sensing resistor disposed on the power semiconductor device; a self-trimming temperature sensing circuit adaptable to the temperature sensing resistor. A self-trimming temperature detection circuit, comprising: a sequencer that generates a plurality of continuous count values; and a current source that supplies a variable current to a temperature detection resistor, wherein the value of the current increases as a function of each continuous count value. A measurement circuit for measuring the voltage across the temperature detection resistor; a detection circuit for stopping the operation of the sequencer when the voltage across the temperature detection resistor reaches a predefined value; and A system for storing a final value of the system.
て、前記シーケンサのオペレーションを開始する信号を
生成するリセット信号ジェネレータをさらに備えたこと
を特徴とするシステム。17. The system according to claim 16, further comprising a reset signal generator for generating a signal to start operation of said sequencer.
て、前記電流源は可変比率電流ミラーを含むことを特徴
とするシステム。18. The system of claim 16, wherein said current source comprises a variable ratio current mirror.
て、前記シーケンサはカウンタを含むことを特徴とする
システム。19. The system according to claim 16, wherein said sequencer includes a counter.
て、前記あらかじめ定義した値はバンドギャップ電圧に
比例することを特徴とするシステム。20. The system of claim 16, wherein said predefined value is proportional to a bandgap voltage.
て、前記電流源は一定電流源を含み、該電流源は前記メ
モリにストアされた値の関数として一定電流を生成し、
前記測定回路は前記一定電流を使用して前記抵抗の両端
電圧を測定することを特徴とするシステム。21. The system of claim 16, wherein the current source comprises a constant current source, the current source generating a constant current as a function of a value stored in the memory.
The system of claim 2, wherein the measurement circuit measures the voltage across the resistor using the constant current.
て、前記一定電流が前記温度検出抵抗の両端に供給され
たとき、該抵抗の両端の電圧を前記あらかじめ定義した
値に比例する制限値と比較する過電圧検出回路と、前記
測定電圧が前記制限値を超えたとき過温度信号を生成す
る過温度信号ジェネレータとをさらに備えたことを特徴
とするシステム。22. The system of claim 21, wherein when the constant current is applied across the temperature sensing resistor, the voltage across the resistor is compared to a limit value proportional to the predefined value. The system further comprises an overvoltage detection circuit and an overtemperature signal generator that generates an overtemperature signal when the measured voltage exceeds the limit value.
て、該回路は集積回路であることを特徴とするシステ
ム。23. The system according to claim 16, wherein said circuit is an integrated circuit.
て、前記メモリはEEPROMであることを特徴とする
システム。24. The system according to claim 16, wherein said memory is an EEPROM.
て、前記パワー半導体デバイスはMOSFETであるこ
とを特徴とするシステム。25. The system according to claim 16, wherein said power semiconductor device is a MOSFET.
て、前記パワー半導体デバイスはIGBTであることを
特徴とするシステム。26. The system according to claim 16, wherein said power semiconductor device is an IGBT.
て、前記集積回路および前記パワー半導体デバイスはコ
パッケージされていることを特徴とするシステム。27. The system of claim 23, wherein said integrated circuit and said power semiconductor device are co-packaged.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US79883597A | 1997-02-12 | 1997-02-12 | |
US08/798,835 | 1997-02-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH10246676A true JPH10246676A (en) | 1998-09-14 |
JP2846309B2 JP2846309B2 (en) | 1999-01-13 |
Family
ID=25174399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2293998A Expired - Lifetime JP2846309B2 (en) | 1997-02-12 | 1998-02-04 | Method and circuit and system for detecting junction temperature of MOS gate power semiconductor device |
Country Status (8)
Country | Link |
---|---|
JP (1) | JP2846309B2 (en) |
KR (1) | KR19980070752A (en) |
DE (1) | DE19805734A1 (en) |
FR (1) | FR2759456B1 (en) |
GB (1) | GB2322709B (en) |
IT (1) | IT1298182B1 (en) |
SG (1) | SG55452A1 (en) |
TW (1) | TW385548B (en) |
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JP2003149055A (en) * | 2001-11-08 | 2003-05-21 | Toshiba Corp | Temperature sensor and method of adjusting the same |
CN100374872C (en) * | 2005-10-14 | 2008-03-12 | 北京工业大学 | Semiconductor PN node diode device temperature rise measuring method and apparatus |
JP2009240024A (en) * | 2008-03-26 | 2009-10-15 | Denso Corp | Temperature detector |
CN102928109A (en) * | 2012-10-25 | 2013-02-13 | 重庆长安汽车股份有限公司 | Signal collecting circuit |
CN103323135A (en) * | 2013-06-09 | 2013-09-25 | 广东明阳龙源电力电子有限公司 | IGBT temperature detection circuit |
KR20200096730A (en) * | 2019-02-04 | 2020-08-13 | 이엠. 마이크로일레크트로닉-마린 쏘시에떼 아노님 | Flicker noise reduction in a temperature sensor arrangement |
JP2021526319A (en) * | 2018-07-19 | 2021-09-30 | ミツビシ・エレクトリック・アールアンドディー・センター・ヨーロッパ・ビーヴィMitsubishi Electric R&D Centre Europe B.V. | Power semiconductor modules, masks, measurement methods, computer software, and recording media |
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DE10023950A1 (en) * | 2000-05-16 | 2001-11-22 | Bosch Gmbh Robert | Semiconductor component with power switch connectable to load |
DE10220587B4 (en) | 2002-05-08 | 2007-07-19 | Infineon Technologies Ag | Temperature sensor for MOS circuitry |
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WO2009141347A1 (en) * | 2008-05-19 | 2009-11-26 | X-Fab Semiconductor Foundries Ag | Operating temperature measurement for an mos power component, and mos component for carrying out the method |
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CN106501699B (en) * | 2016-10-20 | 2019-02-19 | 北京工业大学 | The method for real-time measurement of bipolar transistor junction temperature under a kind of saturation state |
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-
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- 1998-01-19 SG SG1998000139A patent/SG55452A1/en unknown
- 1998-01-22 GB GB9801403A patent/GB2322709B/en not_active Expired - Fee Related
- 1998-01-23 IT IT98MI000111 patent/IT1298182B1/en active IP Right Grant
- 1998-01-23 KR KR1019980002017A patent/KR19980070752A/en not_active Application Discontinuation
- 1998-02-04 TW TW87101360A patent/TW385548B/en active
- 1998-02-04 JP JP2293998A patent/JP2846309B2/en not_active Expired - Lifetime
- 1998-02-11 FR FR9801599A patent/FR2759456B1/en not_active Expired - Fee Related
- 1998-02-12 DE DE1998105734 patent/DE19805734A1/en not_active Withdrawn
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JP2003149055A (en) * | 2001-11-08 | 2003-05-21 | Toshiba Corp | Temperature sensor and method of adjusting the same |
CN100374872C (en) * | 2005-10-14 | 2008-03-12 | 北京工业大学 | Semiconductor PN node diode device temperature rise measuring method and apparatus |
JP2009240024A (en) * | 2008-03-26 | 2009-10-15 | Denso Corp | Temperature detector |
CN102928109A (en) * | 2012-10-25 | 2013-02-13 | 重庆长安汽车股份有限公司 | Signal collecting circuit |
CN103323135A (en) * | 2013-06-09 | 2013-09-25 | 广东明阳龙源电力电子有限公司 | IGBT temperature detection circuit |
JP2021526319A (en) * | 2018-07-19 | 2021-09-30 | ミツビシ・エレクトリック・アールアンドディー・センター・ヨーロッパ・ビーヴィMitsubishi Electric R&D Centre Europe B.V. | Power semiconductor modules, masks, measurement methods, computer software, and recording media |
KR20200096730A (en) * | 2019-02-04 | 2020-08-13 | 이엠. 마이크로일레크트로닉-마린 쏘시에떼 아노님 | Flicker noise reduction in a temperature sensor arrangement |
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US11579023B2 (en) | 2019-02-04 | 2023-02-14 | Em Microelectronic-Marin S.A. | Flicker noise reduction in a temperature sensor arrangement |
Also Published As
Publication number | Publication date |
---|---|
DE19805734A1 (en) | 1998-08-20 |
JP2846309B2 (en) | 1999-01-13 |
FR2759456B1 (en) | 1999-07-02 |
ITMI980111A1 (en) | 1999-07-23 |
SG55452A1 (en) | 1998-12-21 |
KR19980070752A (en) | 1998-10-26 |
IT1298182B1 (en) | 1999-12-20 |
GB2322709A (en) | 1998-09-02 |
TW385548B (en) | 2000-03-21 |
GB2322709B (en) | 2000-11-01 |
GB9801403D0 (en) | 1998-03-18 |
FR2759456A1 (en) | 1998-08-14 |
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