JPH1022505A - Thin film transistor array and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the reduction (blacking) of a transparent conductive thin film, the increase of the resistance of an Ohmic contact layer or abnormal growth of Si grains. SOLUTION: The surface of a transparent substrate 10 is covered with a light-permeable insulative thin film 2. A scanning wiring SB, signal wiring GB, array of thin film transistors and pixel electrodes PI are formed on the substrate 10. The thin film transistor has a pair of source and drain electrodes S, D one of which is also the pixel electrode PI. The pair of source and drain electrodes S, D form a laminate structure with a transparent conductive thin film 3 and metal silicide thin film 4 formed at least on the surface. An ohmic contact layer 5 is formed selectively on this silicide film 4. his realizes a low- resistance and high-reliability ohmic contact and prevents the quality deterioration such as blacking of the conductive film 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a thin film transistor array in which an ohmic contact layer is selectively formed on a drain electrode, in particular, a source / drain electrode is formed of a transparent conductive thin film, and one of the thin film transistors also functions as a pixel electrode, and a method of manufacturing the same.

[0002]

2. Description of the Related Art A technique for selectively growing a silicon film only on a wiring or electrode made of a metal or oxide conductive film on an insulating substrate made of glass, silicon nitride or the like is reported in the following literature. ing. 1 GN Parsons, Appl. Phys. Lett. 59 (1991) p.2
546 2 GN Parsons, IEEE Electron Device Lett. Vol.
13 (1992) p. 803 Y. Takizawa, et al., AM-LCD 94 (1994) p. 172 In these documents, it is necessary to simultaneously introduce SiH ₄ gas and PH ₃ gas into H ₂ gas plasma. By alternately repeating the process of depositing a ⁺ type silicon thin film and the process of etching silicon only with H ₂ gas plasma, a low resistance n ⁺ type microcrystalline silicon thin film is selectively formed only on conductive wiring or electrodes. It has been shown that can be formed. As an example of a conventional technique to which this technique is applied, a thin film transistor array (hereinafter abbreviated as a TFT array) used in a liquid crystal display device and a method of manufacturing the same will be described with reference to FIGS.

A light-shielding film 3 having a predetermined pattern is formed on a light-transmitting substrate.
1 and an interlayer insulating film 32 made of SiOx film on the entire surface.
Is formed (FIG. 8), a tin-added indium oxide (hereinafter abbreviated as ITO) film 33 is formed, and scanning wiring SB having a predetermined pattern, TFT source and drain electrodes S and D,
Then, a pixel electrode PI is formed (FIG. 9). Then, using a plasma CVD apparatus, the above-described scanning wiring S made of an ITO film 33 is formed by the method of forming the above-mentioned n ⁺ type microcrystalline silicon thin film.
B, an ohmic contact layer 34 is selectively formed only on the source / drain electrodes S and D of the TFT and the pixel electrode PI (FIG. 10), and then a semiconductor layer 35 and a gate insulating film 36 are formed on the entire surface. I do. After the conductive film 37 is further formed, a photoresist 38 having a predetermined pattern is formed (FIG. 11), and the conductive film 37 is removed by etching using the photoresist 38 as a mask to form the gate electrode G and the signal wiring G.
B is formed, and subsequently, the gate insulating film 36 and the semiconductor layer 35 on the pixel electrode PI are removed by etching, and the photoresist 38 is removed to complete the TFT array (FIG. 1).
2). By using such a TFT array process, the number of photomasks can be significantly reduced as compared with the related art, and cost reduction and improvement in productivity can be achieved.

Next, a method of selectively forming a silicon thin film only on a predetermined wiring or electrode will be described in detail. Plasma CVD using reactive gas such as SiH ₄
When a silicon thin film is grown by the method, first, silicon fine particles serving as nuclei are generated on a film forming surface, and the silicon thin film is formed around the growth nuclei. At this time, the time during which the growth nuclei are generated differs depending on the material constituting the surface of the base substrate, the surface condition, the pattern, and the like, but particularly strongly depends on the material constituting the surface. Therefore, by appropriately selecting a wiring or an electrode for forming a silicon thin film and a base film material, silicon is selectively grown only on a specific material surface. Generally, the time for this selective growth is very short, and in an actual process, silicon grows on a non-selected surface although it is thinner than a selected surface. Therefore, by introducing an etching gas such as H ₂ gas without stopping the plasma discharge, only the silicon slightly grown on the non-selected surface is etched away. At this time, the silicon thin film grown on the selected surface is also etched, but since the silicon thin film is deposited thicker than the non-selected surface as described above, the silicon thin film remains only on the selected surface. As described above, by alternately repeating the growth of silicon and the etching of the non-selected surface in a certain time cycle, a silicon thin film can be formed only on the selected surface.

[0005]

In the above prior art, when a silicon thin film is selectively formed only on a specific electrode,
An oxide transparent conductive film such as an ITO film is used as an electrode. This is because a semiconductor element such as a liquid crystal display device requires a light-transmitting electrode as a pixel electrode. However, when a film is formed on the ITO film by using a reactive plasma containing H ₂ gas as described above, the ITO film is reduced by the H ₂ plasma and the transmittance is reduced (blackened) or the like. There has been a problem that the ohmic contact has a high resistance and a problem that abnormally grown silicon grains having a diameter of several μm are generated on the ITO film. As described above, in the element structure in which the ITO film also functions as the source / drain electrodes and the pixel electrodes of the TFT, the ITO film
A decrease in the transmittance of the film leads to a decrease in screen brightness and contrast, or an increase in power consumption. In addition, abnormal growth of silicon on the wiring causes a cross-short between the signal wiring and the scanning wiring, peeling of a constituent film, and the like, resulting in a problem that the manufacturing yield is significantly reduced.

Accordingly, an object of the present invention is to provide a semiconductor device having a structure in which a transparent conductive film made of an oxide such as ITO is used for a wiring or an electrode as in the above-mentioned TFT array, for example, and a yield in forming an ohmic contact portion. To improve the reliability of the transparent conductive film.
It is an object of the present invention to reduce costs and improve productivity without deteriorating the display performance of a TFT array of a liquid crystal display device used for source / drain electrodes or pixel electrodes of an FT.

[0007]

According to a first aspect of the present invention, there is provided a thin film transistor array on which a scanning wiring, a signal wiring, a thin film transistor, and a pixel electrode are formed on a light-transmitting substrate whose surface is covered with a light-transmitting insulating thin film. In addition, one of the pair of source / drain electrodes forming the thin film transistor is a thin film transistor array also serving as a pixel electrode, and both the pair of source / drain electrodes are formed of a transparent conductive thin film and a metal silicide formed on at least the surface thereof. It is characterized in that the ohmic contact layer is selectively formed only on the metal silicide thin film in a laminated structure with the material thin film.

As described above, both the pair of source / drain electrodes have a laminated structure of the transparent conductive thin film and the metal silicide thin film formed on at least the surface thereof, and are selectively formed only on the metal silicide thin film. Since the ohmic contact layer is formed, even if the ohmic contact layer is formed in a reactive plasma containing SiH ₄ and H ₂ gas during manufacturing, the transparent conductive thin film is not exposed on the surface. Problems such as blackening of the transparent conductive thin film and generation of abnormally grown silicon particles can be prevented.
Therefore, a highly reliable ohmic contact can be realized.

According to a second aspect of the present invention, there is provided a method of manufacturing a thin film transistor array, comprising forming a light-transmitting insulating thin film on a light-transmitting substrate, and forming a transparent conductive thin film and a metal silicide thin film formed on at least the surface thereof. Forming a pair of source / drain electrodes made of a laminated film, selectively forming an ohmic contact layer only on the metal silicide thin film, and forming a semiconductor layer, a gate insulating film and a gate electrode. is there.

Thus, a pair of source / drain electrodes composed of a laminated film of a transparent conductive thin film and a metal silicide thin film formed on at least the surface thereof is formed, and the ohmic electrode is selectively formed only on the metal silicide thin film. Since the contact layer is formed, even if the ohmic contact layer is formed in a reactive plasma containing SiH ₄ and H ₂ gas, the transparent conductive thin film is black because the transparent conductive thin film is not exposed on the surface. Or abnormal growth of silicon can be prevented. Therefore, a highly reliable ohmic contact can be realized. further,
Since the surface is composed of a metal silicide thin film, the bonding of silicon existing on the surface has an effect of increasing the initial generation rate of crystal nuclei when forming the ohmic contact layer.

According to a third aspect of the present invention, in the method for manufacturing a thin film transistor array according to the second aspect, the substrate temperature when forming the metal silicide thin film is 180 ° C. or more and 350 ° C. or less,
When the substrate temperature for forming the ohmic contact layer is 18
The temperature is 0 ° C. or more and 350 ° C. or less, and the substrate temperature when forming the ohmic contact layer is equal to or lower than the substrate temperature when forming the metal silicide thin film.

The ohmic contact layer is a very dense film because a thin film is deposited by repeating deposition and etching. Depending on the conditions, the ohmic contact layer becomes a very high stress film. Delamination may occur between the lower transparent conductive thin film and the lower transparent conductive thin film.
By setting the substrate temperature when forming the ohmic contact layer in the range of 0 ° C. or lower to be equal to or lower than the substrate temperature when forming the metal silicide thin film, a good ohmic contact layer without peeling can be realized. .

According to a fourth aspect of the present invention, in the method of the second or third aspect, the light-transmitting insulating thin film formed on the surface of the light-transmitting substrate is made of an oxide containing silicon as a main component. It is a thin film. When the light-transmitting insulating thin film formed on the surface of the light-transmitting substrate is a thin film of an oxide containing silicon as a main component, only the metal silicide thin film formed on the surface of the source / drain electrodes It is possible to grow silicon selectively.

According to a fifth aspect of the present invention, in the method for manufacturing a thin film transistor array according to the second or third aspect, the metal element constituting the metal silicide thin film is molybdenum, titanium, chromium,
Tungsten. As described above, a highly reliable ohmic contact layer can be realized by using any one of molybdenum, titanium, chromium, and tungsten as the metal element constituting the metal silicide thin film.

According to a sixth aspect of the present invention, in the method of the second or third aspect, the transparent conductive thin film is any one of a tin oxide thin film, a tin-added indium oxide thin film, and a zinc oxide thin film. As described above, a transparent electrode can be obtained by forming the transparent conductive thin film as one of a tin oxide thin film, a tin-added indium oxide thin film, and a zinc oxide thin film. This is effective when a transparent conductive thin film also serves as a pixel electrode in a semiconductor element.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A thin film transistor array and a method of manufacturing the same according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a sectional view of a thin film transistor array manufactured by the manufacturing method of the present invention. In this thin film transistor array, a scanning wiring SB, a signal wiring GB, a thin film transistor (TFT), and a pixel electrode PI are formed on a light transmitting substrate 10 whose surface is covered with a light transmitting insulating thin film 2 to form a thin film transistor. One of the pair of source / drain electrodes S and D, in this case, the drain electrode D also serves as the pixel electrode PI. Further, both the pair of source / drain electrodes S and D are made of the transparent conductive thin film 3.
And at least a metal silicide thin film 4 formed on the surface thereof, and an ohmic contact layer 5 is selectively formed only on the metal silicide thin film 4. Reference numeral 6 denotes a semiconductor layer, 7 denotes a gate insulating film, and G denotes a gate electrode.

Next, a method of manufacturing the thin film transistor array will be described. A light-shielding film 1 having a predetermined pattern is formed on a light-transmitting substrate 10, and an interlayer insulating film (insulating thin film) 2 made of a SiOx film is formed on the entire surface (FIG. 2). An ITO film (transparent conductive thin film) 3 is formed on the entire surface, and subsequently, a molybdenum silicide (MoSix) film (metal silicide thin film) 4 is formed using a sputtering apparatus at a predetermined substrate temperature T1 (FIG. 3). Then, the scanning wiring SB of a predetermined pattern, the source and drain electrodes S and D of the TFT, and the pixel electrode PI are formed (FIG. 4).

Next, after heating to a predetermined substrate temperature T ₂ using a plasma CVD apparatus, first, H ₂ gas is introduced to perform plasma discharge, and the substrate surface is cleaned with H ₂ gas plasma. Then, while maintaining the plasma discharge, H ₂
After supplying SiH ₄ and PH ₃ gases into the gas and depositing a silicon thin film for a predetermined time, the supply of the SiH ₄ and PH ₃ gases is stopped, and the substrate surface is etched for a predetermined time using only H ₂ gas plasma. By repeating the deposition and etching of the silicon thin film a predetermined number of times, the scanning lines SB, T
An ohmic contact layer 5 of an n ⁺ -type microcrystalline silicon thin film having a desired thickness is formed only on the source and drain electrodes S and D of the FT and the pixel electrode PI (FIG. 5).

The discharge is stopped once, the substrate is moved to a different film forming chamber without breaking vacuum, and the plasma CVD method is used again.
An intrinsic a-Si semiconductor layer 6 and a gate insulating film 7 made of a SiNx film are formed on the entire surface of the substrate. After the conductive film 8 is further formed, a photoresist 9 having a predetermined pattern is formed (FIG. 6), and the conductive film 8 is removed by etching using the photoresist 9 as a mask to form a gate electrode G and a signal wiring GB. Subsequently, the gate insulating film 7, the semiconductor layer 6, and the MoSix film 4 on the pixel electrode PI are removed by etching, and the photoresist 9 is removed to complete the TFT array (FIG. 1).

In the above process, the MoSix film 4
Substrate temperature T1 when forming a film, and n ⁺Type microcrystalline silicon
A thin film (ohmic contact layer) 5 is selectively formed.
The substrate temperature T2 at this time will be described below. The above choice
Formed n⁺Type microcrystalline silicon thin film 5 has a specific resistance
Very low and the H in the discharge plasma_Two Very high concentration
Very good substrate surface cleaning effect
Ohmic contact is realized. On the other hand,
It is very necessary to deposit thin films by repeating
It is a dense film and has very high stress depending on the conditions.
The film becomes n⁺Of microcrystalline silicon thin film 5
After stacking, peeling between MoSix film 4 and underlying ITO film 3
May occur. Therefore, the MoSix film 4 is formed.
Substrate temperature T1 at the time of⁺Type microcrystalline silicon thin film 5
Detailed examination of substrate temperature T2 for selective film formation
Then, we can find the facts shown in Fig. 2.
Came. In FIG. 7, the vertical axis is n⁺Type microcrystalline silicon thin film
Substrate temperature (n⁺Layer deposition temperature) T2, horizontal
The axis is the substrate temperature (MoSiX) when the MoSix film 4 is formed.
(Deposition temperature) T1. X in the figure indicates the occurrence of film floating,
○ indicates no film floating. As a result, n⁺Type microcrystal
The substrate temperature T2 when the silicon thin film 5 is selectively formed.
Is the same as the substrate temperature T1 when the MoSix film 4 is formed.
Or lower, a good ohmic core without peeling
It became clear that the contact could be realized.

In order to control the stress, it is also effective to control the composition ratio of the metal silicide thin film 4. MoS of this embodiment
In the case of the ix film 4, the composition ratio x of Si to Mo is 2
3 is suitable. By using such a TFT array process, the number of photomasks can be significantly reduced as compared with the related art, and cost reduction and improvement in productivity can be achieved.

In this embodiment, a pair of source / drain electrodes S and D composed of a laminated film of a transparent conductive thin film 3 and at least a metal silicide thin film 4 formed on the surface thereof are formed. 4, the ohmic contact layer 5 is selectively formed only on the ohmic contact layer 5 in a reactive plasma containing SiH ₄ and H ₂ gas.
Even if is formed, since the transparent conductive thin film 3 is not exposed on the surface, problems such as blackening of the transparent conductive thin film 3 and generation of abnormally grown silicon particles can be prevented. Therefore, the ohmic contact layer 5 with high reliability and low resistance is formed only on the wiring or the electrode having the transparent conductive thin film 3 without causing the quality deterioration of the transparent conductive thin film 3. Further, the surface is made of a metal silicide thin film 4.
When the ohmic contact layer 5 is formed, a bond of silicon present on the surface also has an effect of increasing the initial generation rate of crystal nuclei. Further, since the metal silicide thin film 4 can be removed under the same etching conditions as the n ⁺ -type microcrystalline silicon thin film 5, there is an effect that the number of process steps does not increase.

Although MoSix is used as a material for the surface on which an n ⁺ -type microcrystalline silicon thin film is selectively formed,
A highly reliable ohmic contact as described above can be realized even with a metal silicide thin film such as iSix, CrSix or WSix. The thickness of the metal silicide thin film 4 is not particularly limited, but is preferably about 10 to 50 nm in consideration of an element configuration, a process margin, and the like.

Although SiH ₄ is used as a deposition gas for selectively forming the n ⁺ -type microcrystalline silicon thin film 5, Si ₂ H ₆ and SiH ₂ Cl are used as deposition gases.
A reactive gas containing silicon such as ₂ can be used. In this embodiment, a thin film transistor array used in a liquid crystal display device or the like has been described as an element on which the ohmic contact layer 5 is formed. However, the main requirement of the present invention is that the transparent conductive thin film 3 and at least the surface thereof are formed. It is apparent that the present invention is directed to an element structure in which an ohmic contact layer is selectively formed only on a wiring having a laminated structure with the metal silicide thin film 4 or an electrode, and a manufacturing method thereof. Therefore, it goes without saying that a semiconductor element having such an element configuration can satisfy the requirements of the present invention.

[0025]

According to the thin film transistor array of the first aspect of the present invention, each of the pair of source / drain electrodes has a laminated structure of a transparent conductive thin film and a metal silicide thin film formed at least on the surface thereof. In addition, since the ohmic contact layer is selectively formed only on the metal silicide thin film, even if the ohmic contact layer is formed in a reactive plasma containing SiH ₄ and H ₂ gas at the time of manufacturing, it is transparent. Since the conductive thin film is not exposed on the surface, problems such as blackening of the transparent conductive thin film and generation of abnormally grown silicon particles can be prevented. Therefore, an advantageous effect that a highly reliable low-resistance ohmic contact layer is formed only on the wiring or the electrode having the transparent conductive thin film without causing the quality deterioration of the transparent conductive thin film is obtained.

According to the method of manufacturing a thin film transistor array according to the second aspect of the present invention, a pair of source / drain electrodes comprising a laminated film of a transparent conductive thin film and a metal silicide thin film formed on at least the surface thereof are formed. However, since the ohmic contact layer is selectively formed only on the metal silicide thin film, even if the ohmic contact layer is formed in a reactive plasma containing SiH ₄ and H ₂ gas, the transparent conductive thin film can be formed on the surface. Therefore, problems such as blackening of the transparent conductive thin film and generation of abnormally grown silicon particles can be prevented. Therefore, a highly reliable ohmic contact can be realized. Further, since the surface is formed of the metal silicide thin film, the bonding of silicon existing on the surface has an effect of increasing the initial generation rate of crystal nuclei when forming the ohmic contact layer.

According to the third aspect, the ohmic contact layer is a very dense film because a thin film is deposited by repeating deposition and etching. Depending on conditions, the ohmic contact layer becomes a very high stress film. Peeling may occur between the metal silicide thin film and the underlying transparent conductive thin film.
By setting the substrate temperature when forming the ohmic contact layer in the range of 80 ° C. to 350 ° C. equal to or lower than the substrate temperature when forming the metal silicide thin film, a good ohmic contact layer without peeling Can be realized.

According to a fourth aspect of the present invention, when the light-transmitting insulating thin film formed on the surface of the light-transmitting substrate is an oxide thin film containing silicon as a main component, it is formed on the surface of the source / drain electrode. It is possible to selectively grow silicon only on the metal silicide thin film. According to the fifth aspect, the metal element constituting the metal silicide thin film is any one of molybdenum, titanium, chromium, and tungsten, so that a highly reliable ohmic contact layer can be realized.

According to the sixth aspect, the transparent conductive thin film is any one of a tin oxide thin film, a tin-added indium oxide thin film, and a zinc oxide thin film, whereby a light-transmitting electrode can be obtained. This is effective when a transparent conductive thin film also serves as a pixel electrode in a semiconductor element such as a device.

[Brief description of the drawings]

FIG. 1 is a structural sectional view of a thin film transistor array according to an embodiment of the present invention.

FIG. 2 is a process cross-sectional view in a state where an interlayer insulating film is formed in the method for manufacturing a thin film transistor array according to the embodiment of the present invention;

FIG. 3 is a process sectional view showing a state in which an ITO film and a molybdenum silicide film are formed in the next process of FIG. 2;

FIG. 4 is a process sectional view showing a state where scanning wirings and respective electrodes are formed in a process subsequent to FIG. 3;

FIG. 5 is a process cross-sectional view showing a state where an ohmic contact layer is formed in a process next to FIG. 4;

FIG. 6 is a process cross-sectional view showing a state where a semiconductor layer, a gate insulating film, and a conductive film are formed in the next process of FIG. 5;

FIG. 7 is a graph showing a relationship between a substrate temperature when selectively forming an ohmic contact layer and a substrate temperature when forming a metal silicide thin film according to an embodiment of the present invention.

FIG. 8 is a process sectional view showing a state in which an interlayer insulating film is formed in a conventional method of manufacturing a thin film transistor array.

FIG. 9 is a process cross-sectional view showing a state in which an ITO film is formed in the next step of FIG. 9 and then scanning wiring and each electrode are formed.

FIG. 10 is a process cross-sectional view showing a state where an ohmic contact layer is formed in a process next to FIG. 10;

11 is a process cross-sectional view showing a state where a semiconductor layer, a gate insulating film, and a conductive film are formed in the next process of FIG. 10;

FIG. 12 is a structural sectional view of a conventional thin film transistor array.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1, 31 Light-shielding film 2, 32 Interlayer insulating film 3, 33 Transparent conductive film 4 Metal silicide thin film 5, 34 Ohmic contact layer 6, 35 Semiconductor layer 7, 36 Gate insulating film 8, 37 Conductive film 9, 38 Photoresist 10 Translucent substrate SB scanning wiring S source electrode D drain electrode G gate electrode GB signal wiring PI pixel electrode

Claims (6)

[Claims] 1. A scanning wiring, a signal wiring, a thin film transistor, and a pixel electrode are formed on a light-transmitting substrate whose surface is covered with a light-transmitting insulating thin film, and a pair of source / drain electrodes forming the thin film transistor are provided. Any one of the above is a thin film transistor array also serving as the pixel electrode, the pair of source / drain electrodes are both a laminated structure of a transparent conductive thin film and a metal silicide thin film formed at least on the surface thereof, and A thin film transistor array, wherein an ohmic contact layer is selectively formed only on the metal silicide thin film. 2. A pair of source / drain electrodes comprising a light-transmitting insulating thin film formed on a light-transmitting substrate, and a laminated film of a transparent conductive thin film and a metal silicide thin film formed on at least the surface thereof. Forming an ohmic contact layer selectively only on the metal silicide thin film, and forming a semiconductor layer, a gate insulating film and a gate electrode. 3. The substrate temperature when forming a metal silicide thin film is 180 ° C. or more and 350 ° C. or less, and the substrate temperature when forming an ohmic contact layer is 180 ° C. or more and 350 ° C.
3. The method of manufacturing a thin film transistor array according to claim 2, wherein the substrate temperature when forming the ohmic contact layer is equal to or lower than the substrate temperature when forming the metal silicide thin film. 4. The method according to claim 2, wherein the light-transmitting insulating thin film formed on the surface of the light-transmitting substrate is a thin film of an oxide containing silicon as a main component. 5. The method according to claim 2, wherein the metal element constituting the metal silicide thin film is any of molybdenum, titanium, chromium, and tungsten. 6. The method according to claim 2, wherein the transparent conductive thin film is any one of a tin oxide thin film, a tin-added indium oxide thin film, and a zinc oxide thin film.