JP2885458B2 - Thin film transistor - Google Patents
Thin film transistorInfo
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- JP2885458B2 JP2885458B2 JP4449490A JP4449490A JP2885458B2 JP 2885458 B2 JP2885458 B2 JP 2885458B2 JP 4449490 A JP4449490 A JP 4449490A JP 4449490 A JP4449490 A JP 4449490A JP 2885458 B2 JP2885458 B2 JP 2885458B2
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- film
- gate insulating
- hydrogen concentration
- insulating film
- thin film
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Description
【発明の詳細な説明】 ［発明の目的］ （産業上の利用分野） 本発明は、スイッチング素子に用いられる薄膜トラン
ジスタの改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to an improvement of a thin film transistor used for a switching element.
（従来の技術） 近年、非晶質シリコン（ａ−Si）膜を用いた薄膜トラ
ンジスタをスイッチング素子として構成されたアクティ
ブマトリックス型液晶表示装置が注目されている。これ
は、安価なガラス基板を用いることで大画面，高精細，
高画質なパネルディスプレイを低コストで実現する可能
性があるからである。(Prior Art) In recent years, an active matrix type liquid crystal display device having a thin film transistor using an amorphous silicon (a-Si) film as a switching element has been receiving attention. This is because large screen, high definition,
This is because a high-quality panel display may be realized at low cost.
第８図は、活性層にａ−Si膜を用いた従来の表示駆動
装置用TFTの断面図である。先ず、ガラス板のような透
光性絶縁基板21上に設けられたMoやCrのような金属がパ
ターニングされゲート電極22が形成される。このゲート
電極22上にはゲート絶縁膜23であるSiO2膜23a,SiNx膜23
bが順次積層されている。このゲート絶縁膜23上のゲー
ト電極22上に位置するところに、活性層としてａ−Si膜
24の半導体膜が所定のパターンに形成されている。この
ａ−Si膜24上にはSiNx膜25aとSiOx膜25bとの積層膜であ
る保護膜25が形成されている。活性層にはオーミックコ
ンタクト層としてn+a−Si膜26を介してソース電極27,ド
レイン電極28が形成されている。。ソース電極27,ドレ
イン電極28と半導体膜24との間には、オーミックコンタ
クト層としてn+a−Si膜26が形成されている。FIG. 8 is a sectional view of a conventional TFT for a display drive device using an a-Si film for an active layer. First, a metal such as Mo or Cr provided on a light-transmitting insulating substrate 21 such as a glass plate is patterned to form a gate electrode 22. On this gate electrode 22, a SiO 2 film 23a, which is a gate insulating film 23, and a SiNx film 23
b are sequentially laminated. An a-Si film is formed as an active layer on the gate electrode 22 on the gate insulating film 23.
Twenty-four semiconductor films are formed in a predetermined pattern. On this a-Si film 24, a protective film 25 which is a laminated film of a SiNx film 25a and a SiOx film 25b is formed. In the active layer, a source electrode 27 and a drain electrode 28 are formed via an n + a-Si film 26 as an ohmic contact layer. . An n + a-Si film 26 is formed between the source electrode 27, the drain electrode 28, and the semiconductor film 24 as an ohmic contact layer.
一般に、ａ−Si膜の内部応力は圧縮応力,SiNx膜の内
部応力は引張り応力そしてSiOx膜の内部応力は圧縮応力
であるので、このような従来構造のTFTでは、活性層の
内部応力とこれに接するゲート絶縁膜中のSiNx膜の内部
応力は逆になっている。さらにゲート絶縁膜中で接する
SiNx膜とSiOx膜の内部応力もお互いに異なっている。し
たがって、このような接合面では当然膜の剥離発生頻度
が他の箇所に比べて高くなる。その結果、ゲート絶縁層
のリーク電流の増大，スイッチング機能の消失などのよ
うにTFT特性が不良になり歩留まりが悪くなるという問
題があった。Generally, the internal stress of the a-Si film is a compressive stress, the internal stress of the SiNx film is a tensile stress, and the internal stress of the SiOx film is a compressive stress. The internal stress of the SiNx film in the gate insulating film in contact with is opposite. Further contact in the gate insulating film
The internal stresses of the SiNx film and the SiOx film are also different from each other. Accordingly, the frequency of occurrence of film peeling is naturally higher at such a joint surface than at other portions. As a result, there has been a problem that the TFT characteristics are deteriorated and the yield is deteriorated, for example, the leakage current of the gate insulating layer is increased, and the switching function is lost.
（発明が解決しようとする課題） 以上のように従来構造の薄膜トランジスタは、ゲート
絶縁膜とそれに接合する活性層の如く、内部応力が異な
る膜間での接合が存在するのでこれらの膜の剥離に起因
するTFT特性の不良が見られた。(Problems to be Solved by the Invention) As described above, in a thin film transistor having a conventional structure, there is a junction between films having different internal stresses, such as a gate insulating film and an active layer bonded thereto. TFT characteristics were found to be poor.
本発明はこのような膜の剥離を回避して信頼性向上を
図った薄膜トランジスタを提供することを目的としてい
る。An object of the present invention is to provide a thin film transistor in which reliability is improved by avoiding such film peeling.
［発明の構成］ （課題を解決するための手段） 上記の目的を達成するために、本発明は、基板と、こ
の基板上に所定パターンをもって形成されたａ−Si膜
と、このａ−Si膜にコンタクトするソースおよびドレイ
ン電極と、前記ａ−Si膜の上部または下部にゲート絶縁
膜を介して配設されたゲート電極とを有する薄膜トラン
ジスタにおいて、前記ゲート絶縁膜は少くとも前記ａ−
Si膜側に近い部分が窒化シリコン膜により形成され、か
つその窒化シリコン膜は前記ａ−Si膜側では水素濃度が
低くなる膜厚方向の水素濃度分布を有することを特徴と
する。[Constitution of the Invention] (Means for Solving the Problems) In order to achieve the above object, the present invention provides a substrate, an a-Si film formed on the substrate with a predetermined pattern, and an a-Si film In a thin film transistor having a source and a drain electrode in contact with a film and a gate electrode provided above or below the a-Si film with a gate insulating film interposed therebetween, the gate insulating film has at least the a-Si film.
A portion close to the Si film side is formed of a silicon nitride film, and the silicon nitride film has a hydrogen concentration distribution in a film thickness direction in which the hydrogen concentration decreases on the a-Si film side.
（作用） 本発明らが研究を重ねた結果、窒化シリコン膜の内部
応力は膜中の水素濃度に依存し、水素濃度が高くなるに
したがい引張り応力が強くなることを確認した。(Action) As a result of repeated studies by the present inventors, it was confirmed that the internal stress of the silicon nitride film depends on the hydrogen concentration in the film, and that the tensile stress increases as the hydrogen concentration increases.
したがって本発明によれば、活性層であるａ−Si膜と
接する窒化シリコン膜中の膜厚方向の水素濃度を変える
ことで、これら膜界面に働く応力を抑えることができ、
剥離が起こり難くなる。Therefore, according to the present invention, by changing the hydrogen concentration in the thickness direction in the silicon nitride film in contact with the a-Si film as the active layer, it is possible to suppress the stress acting on these film interfaces,
Peeling is less likely to occur.
（実施例） 以下、本発明の詳細を図示の実施例によって説明す
る。第１図は、本発明の第１の実施例に係る薄膜トラン
ジスタの断面図である。これを製造工程に従い説明する
と、最初にガラス基板からなる透光性絶縁基板１上に厚
さ約2000ÅのTaあるいはMoTa合金等の金属膜をスパッタ
リング法を用いて堆積する。この金属膜をCF4とO2を反
応ガスとしたプラズマエッチングによりパターニングし
てゲート電極２を形成する。次に光CVD法のより第1,第
2,第３のゲート絶縁膜3a,3b,3cであるSiNxをそれぞれ約
1000Å,500Å,500Åの厚さで順次堆積して厚さ2000Åの
ゲート絶縁膜３を形成する。引き続き光CVD法により活
性層となるａ−Si膜４を3000Å形成し、その上にSiNx膜
5a,SiOx膜5bを厚さ1000Åで順次堆積して厚さ2000Åの
積層膜を形成する。次にこの積層膜にエッチングを施し
て保護膜５を形成する。この後、保護膜５をマスクとし
てａ−Si膜４表面上にオーミックコンタクト層として厚
さ500Åのn+a−Si膜６を形成する。最後に金属膜を形成
し、これをパターニングすることによりソース電極7,ド
レイン電極８を形成して薄膜トランジスタが完成する。(Examples) Hereinafter, details of the present invention will be described with reference to the illustrated examples. FIG. 1 is a sectional view of a thin film transistor according to a first embodiment of the present invention. This will be described in accordance with a manufacturing process. First, a metal film such as a Ta or MoTa alloy having a thickness of about 2000 ° is deposited on a translucent insulating substrate 1 made of a glass substrate by a sputtering method. This metal film is patterned by plasma etching using CF 4 and O 2 as reaction gases to form a gate electrode 2. Next, the first and
2, the third gate insulating films 3a, 3b, 3c
The gate insulating film 3 having a thickness of 2000 mm is formed by sequentially depositing the gate insulating film 3 having a thickness of 1000 mm, 500 mm, and 500 mm. Subsequently, an a-Si film 4 serving as an active layer is formed at 3000 に よ り by a photo CVD method, and a SiNx film is formed thereon.
5a and a SiOx film 5b are sequentially deposited at a thickness of 1000 mm to form a laminated film having a thickness of 2000 mm. Next, the protective film 5 is formed by etching the laminated film. Thereafter, an n + a-Si film 6 having a thickness of 500 ° is formed as an ohmic contact layer on the surface of the a-Si film 4 using the protective film 5 as a mask. Finally, a metal film is formed and then patterned to form a source electrode 7 and a drain electrode 8 to complete a thin film transistor.
なお、上記第１の絶縁膜3aの原料ガスとして、2SCCM
のシランと98SCCMのアンモニアとの混合ガスを、第２の
絶縁膜3bの原料ガスとして流量2SCCMのシランと流量98S
CCMのアンモニアとの原料ガスに流量50SCCMの水素を混
合したガスを、第３の絶縁膜3cの原料ガスとして流量2S
CCMのシランと流量98SCCMのアンモニアとの原料ガスに
流量100SCCMの水素を混合したガスを採用した。これに
よりゲート絶縁膜中の水素は膜厚方向に濃度分布を持つ
ことになる。第２図はこの絶縁膜中の原子水素濃度を評
価した結果であり、図中、横軸はSiNx膜の厚さ、縦軸は
SiNx膜中の原子水素濃度である。このように３つの絶縁
膜からなるゲート絶縁膜３中の水素濃度分布は、それぞ
れの絶縁膜中では一定濃度で、第３のゲート絶縁膜3cか
ら第１のゲート絶縁膜3aの順に膜厚方向に濃度が低くな
る分布を呈している。Note that 2SCCM is used as a source gas for the first insulating film 3a.
A mixed gas of silane of 98 SCCM and ammonia of 98 SCCM is used as a raw material gas of the second insulating film 3b, silane of flow rate of 2 SCCM and flow rate of 98S
A gas obtained by mixing a raw material gas with ammonia of CCM and a flow rate of 50 SCCM with hydrogen is used as a raw material gas for the third insulating film 3c at a flow rate of 2S.
A gas obtained by mixing hydrogen at a flow rate of 100 SCCM with a raw material gas of silane of CCM and ammonia at a flow rate of 98 SCCM was employed. As a result, hydrogen in the gate insulating film has a concentration distribution in the film thickness direction. FIG. 2 shows the result of evaluating the atomic hydrogen concentration in this insulating film. In the figure, the horizontal axis represents the thickness of the SiNx film, and the vertical axis represents the thickness.
This is the atomic hydrogen concentration in the SiNx film. As described above, the hydrogen concentration distribution in the gate insulating film 3 composed of the three insulating films is constant in each of the insulating films, and the thickness direction in the order from the third gate insulating film 3c to the first gate insulating film 3a. Shows a distribution in which the concentration decreases.
第３図は本発明者らがSiNx膜中に於ける水素の影響に
について研究した結果である。図中、横軸はSiNx膜中の
原子水素濃度，左縦軸はSiNx膜の内部応力，右縦軸はSi
Nx膜中の欠陥密度，実線は内部応力と水素濃度の関係を
示し、破線は欠陥密度と水素濃度の関係を示す。この図
から分かるようにSiNx膜の内部応力は水素濃度が高いほ
ど引張り応力が大きくなり、逆に欠陥密度は水素濃度が
高いほど小さくなっている。FIG. 3 shows the results of a study conducted by the present inventors on the influence of hydrogen in a SiNx film. In the figure, the horizontal axis is the atomic hydrogen concentration in the SiNx film, the left vertical axis is the internal stress of the SiNx film, and the right vertical axis is the Si.
The defect density in the Nx film, the solid line shows the relationship between the internal stress and the hydrogen concentration, and the broken line shows the relationship between the defect density and the hydrogen concentration. As can be seen from this figure, the internal stress of the SiNx film increases as the hydrogen concentration increases, and the defect density decreases as the hydrogen concentration increases.
したがって、上記実施例のような構成の薄膜トランジ
スタは、活性層とゲート絶縁膜３とが内部応力の差が小
さいａ−Si膜４と第３のゲート絶縁膜3aとで接合してい
るので従来の薄膜トランジスタのようにこの界面で大き
な応力歪みを受けない。その結果、膜剥離の発生頻度が
非常に小さくなる。さらに高濃度の水素を含む第1,第２
のゲート絶縁膜3a,3bの存在により、第１のゲート絶縁
膜3a中の欠陥密度が高いことで絶縁膜としての機能が低
下しても、ゲート絶縁膜３全体として緻密な絶縁膜とし
て働く。Therefore, in the thin film transistor having the configuration as in the above embodiment, the active layer and the gate insulating film 3 are joined by the a-Si film 4 having a small difference in internal stress and the third gate insulating film 3a. Unlike the thin film transistor, the interface does not receive a large stress distortion. As a result, the frequency of occurrence of film peeling becomes extremely low. First and second containing even higher concentration of hydrogen
Due to the presence of the gate insulating films 3a and 3b, even if the defect density in the first gate insulating film 3a is high and the function as the insulating film is reduced, the entire gate insulating film 3 functions as a dense insulating film.
第４図は、本発明に係る第２の実施例を示す薄膜トラ
ンジスタの断面図である。なお第１図と同一機能部分に
は同一符号を付し、詳しい説明は省略する。FIG. 4 is a sectional view of a thin film transistor showing a second embodiment according to the present invention. The same reference numerals are given to the same functional parts as those in FIG. 1, and the detailed description is omitted.
この実施例が先に説明した第１の実施例と異なる点
は、透光性絶縁基板１上にゲート電極２を設けた後、光
CVD法を用いて第1,第２のゲート絶縁膜13a,13bであるSi
Ox膜をそれぞれ500Åの厚さで順次堆積し、さらにこの
ゲート絶縁膜13b上に第3,第４のゲート絶縁膜13c,13dと
してSiNx膜を各々500Åの厚さで順次堆積して絶縁膜13
をSiOx膜とSiNx膜との積層膜としたことである。This embodiment is different from the first embodiment described above in that after providing a gate electrode 2 on a light-transmitting insulating substrate 1,
Using the CVD method, the first and second gate insulating films 13a and 13b
Ox films are sequentially deposited with a thickness of 500 °, respectively. Further, on this gate insulating film 13b, third and fourth gate insulating films 13c, 13d are sequentially deposited with a thickness of 500 ° each as a SiNx film, thereby forming an insulating film 13b.
Is a laminated film of a SiOx film and a SiNx film.
このゲート絶縁膜３中の原子水素濃度を測定したとこ
ろ第５図に示すような結果が得られた。すなわち、４つ
の絶縁膜からなるゲート絶縁膜13中の膜厚方向の水素濃
度分布は、それぞれの絶縁膜中では一定濃度で、活性層
に近い絶縁膜程濃度が低くなる分布を呈している。When the atomic hydrogen concentration in the gate insulating film 3 was measured, the result as shown in FIG. 5 was obtained. That is, the hydrogen concentration distribution in the thickness direction in the gate insulating film 13 composed of the four insulating films is such that the concentration is constant in each insulating film, and the concentration becomes lower as the insulating film is closer to the active layer.
参考までに、SiOx膜中の水素濃度と内部応力の関係は
第６図に示すようになる。For reference, the relationship between the hydrogen concentration in the SiOx film and the internal stress is as shown in FIG.
この実施例のような構成の薄膜トランジスタでも、第
１の実施例と同様にａ−Si膜４は、４つのゲート絶縁膜
中で最も内部応力の差が小さい第１のゲート絶縁膜13d
と接する。その結果、活性層とゲート絶縁膜３との接合
面での膜剥離は起こり難くなり、さらに第2,第3,第４の
ゲート絶縁膜13b,13c,13dにより絶縁膜として強化され
ている。Also in the thin film transistor having the structure as in this embodiment, similarly to the first embodiment, the a-Si film 4 is the first gate insulating film 13d having the smallest difference in internal stress among the four gate insulating films.
Contact with As a result, film peeling at the bonding surface between the active layer and the gate insulating film 3 is less likely to occur, and is further strengthened as an insulating film by the second, third, and fourth gate insulating films 13b, 13c, and 13d.
なお、本発明は上述した実施例に限定されるものでは
ない。例えば、上記実施例のように水素濃度分布を段階
的に変化させるのではなく連続的に変化させても良い。
すなわち、第７図に示すように活性層から膜厚方向に対
して遠ざかるにしたがい濃度が高くなるようにゲート絶
縁膜中の水素濃度分布を設定をしても良い。The present invention is not limited to the embodiments described above. For example, instead of changing the hydrogen concentration distribution stepwise as in the above embodiment, the hydrogen concentration distribution may be changed continuously.
That is, as shown in FIG. 7, the hydrogen concentration distribution in the gate insulating film may be set so that the concentration increases as the distance from the active layer in the thickness direction increases.
また、ゲート絶縁膜中の水素濃度を制御するために用
いられる方法は上記実施例で用いた原料ガスの希釈法に
限らず、例えば、反応時の紫外線，赤外線などの光照射
量の増減，膜形成後のH2プラズマ処理等で行なっても良
い。Further, the method used to control the hydrogen concentration in the gate insulating film is not limited to the method of diluting the source gas used in the above embodiment, but may be, for example, an increase or decrease in the amount of light irradiation such as ultraviolet rays or infrared rays during the reaction, it may be carried out with H 2 plasma treatment after formation.
さらにまた、ゲート絶縁膜の形成方法は光CVD法に限
らず、例えばプラズマCVD法，熱CVD法，もしくはスパッ
タリング法を用いてもかまわない。Furthermore, the method of forming the gate insulating film is not limited to the photo-CVD method, and for example, a plasma CVD method, a thermal CVD method, or a sputtering method may be used.
なお、本発明はゲート絶縁膜のみならず、例えば保護
膜に適用しても良い。要するに本発明は、SiNx膜または
SiOx膜とそれらの膜の内部応力と異なる膜との接合箇所
であれば種々変形して実施することができる。The present invention may be applied not only to a gate insulating film but also to, for example, a protective film. In short, the present invention relates to a SiNx film or
Various modifications can be made to the joint portion between the SiOx film and the film having a different internal stress from those films.
［発明の効果］ 以上述べたように本発明によれば、内部応力差に起因
する膜剥離が防止できるので信頼性が向上して優れた特
性のTFTを得ることができる。[Effects of the Invention] As described above, according to the present invention, it is possible to prevent peeling of a film due to a difference in internal stress, thereby improving reliability and obtaining a TFT having excellent characteristics.
第１図は本発明の第１の実施例に係る薄膜トランジスタ
の断面図、第２図は第１実施例に係るゲート絶縁膜中の
水素濃度を示す図、第３図はSiNx膜の内部応力と水素濃
度との関係を示す図、第４図は第２の実施例に係る薄膜
トランジスタの断面図、第５図は第２実施例に係るゲー
ト絶縁膜中の水素濃度を示す図、第６図はSiNx膜の内部
応力と水素濃度との関係を示す図、第７図はゲート絶縁
膜中の水素濃度を示す図、第８図は従来の薄膜トランジ
スタの断面図である。 １……透光性絶縁基板、２……ゲート電極、3,3a,3b,3
c,13,13a,13b,13c,13d……ゲート絶縁膜、４……ａ−Si
膜、5,5a,5b……保護膜,6……n+a−Si膜,7……ソース電
極,8……ドレイン電極。FIG. 1 is a sectional view of a thin film transistor according to a first embodiment of the present invention, FIG. 2 is a diagram showing a hydrogen concentration in a gate insulating film according to the first embodiment, and FIG. FIG. 4 is a diagram showing the relationship with the hydrogen concentration, FIG. 4 is a cross-sectional view of the thin film transistor according to the second embodiment, FIG. 5 is a diagram showing the hydrogen concentration in the gate insulating film according to the second embodiment, and FIG. FIG. 7 is a diagram showing the relationship between the internal stress of the SiNx film and the hydrogen concentration, FIG. 7 is a diagram showing the hydrogen concentration in the gate insulating film, and FIG. 8 is a sectional view of a conventional thin film transistor. 1 ... Transparent insulating substrate, 2 ... Gate electrode, 3,3a, 3b, 3
c, 13,13a, 13b, 13c, 13d ... gate insulating film, 4 ... a-Si
Film, 5, 5a, 5b: protective film, 6: n + a-Si film, 7: source electrode, 8: drain electrode.
Claims (2)
て形成された非晶質シリコン膜と、この非晶質シリコン
膜にコンタクトするソースおよびドレイン電極と、前記
非晶質シリコン膜の上部または下部にゲート絶縁膜を介
して配設されたゲート電極とを有する薄膜トランジスタ
において、前記ゲート絶縁膜は少くとも前記非晶質シリ
コン膜に近い部分が窒化シリコン膜により形成され、か
つその窒化シリコン膜は前記非晶質シリコン膜側では水
素濃度が低くなる膜厚方向の水素濃度分布を有すること
を特徴とする薄膜トランジスタ。1. A substrate, an amorphous silicon film formed on the substrate with a predetermined pattern, source and drain electrodes contacting the amorphous silicon film, and an upper or lower portion of the amorphous silicon film A thin film transistor having a gate electrode disposed with a gate insulating film interposed therebetween, wherein the gate insulating film is formed at least in a portion close to the amorphous silicon film by a silicon nitride film, and the silicon nitride film is A thin film transistor having a hydrogen concentration distribution in a film thickness direction in which a hydrogen concentration is reduced on an amorphous silicon film side.
分布を有する窒化シリコン膜と酸化シリコン膜との積層
膜を有することを特徴とする請求項１記載の薄膜トラン
ジスタ。2. The thin film transistor according to claim 1, wherein said gate insulating film has a stacked film of a silicon nitride film and a silicon oxide film having a hydrogen concentration distribution in a film thickness direction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4449490A JP2885458B2 (en) | 1990-02-27 | 1990-02-27 | Thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4449490A JP2885458B2 (en) | 1990-02-27 | 1990-02-27 | Thin film transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03248569A JPH03248569A (en) | 1991-11-06 |
| JP2885458B2 true JP2885458B2 (en) | 1999-04-26 |
Family
ID=12693110
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4449490A Expired - Fee Related JP2885458B2 (en) | 1990-02-27 | 1990-02-27 | Thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2885458B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5209196B2 (en) * | 2005-11-07 | 2013-06-12 | 三星電子株式会社 | Manufacturing method of semiconductor device |
| JP5668696B2 (en) * | 2012-01-13 | 2015-02-12 | ソニー株式会社 | Method for manufacturing thin film transistor substrate |
| KR102551443B1 (en) * | 2012-05-10 | 2023-07-06 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device |
| CN104285302B (en) * | 2012-05-10 | 2017-08-22 | 株式会社半导体能源研究所 | Semiconductor device |
-
1990
- 1990-02-27 JP JP4449490A patent/JP2885458B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03248569A (en) | 1991-11-06 |
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