JP2000164887A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prepare a low-resistance and highly transparent conductive film by selectively forming a transparent conductive film after an interlayer insulating film is formed on a thin-film transistor with a gate electrode formed on a semiconductor region, and making upper faces of electrodes and wiring an aluminum-based material while contacts of chromium or the like are formed on the lower faces which contact with an indium-tin oxide film. SOLUTION: A silicon nitride film 2 is deposited with a plasma CVD technique on whole of a surface of a glass substrate 1. A silicon oxide film is subsequently formed as an underlying oxide film 3. An amorphous silicon film 4 is then deposited with a plasma CVD technique, and further a protective layer 5, which is either a silicon oxide or a silicon nitride film, is formed with a CVD technique. After then, an aluminum film is formed with an electron-beam evaporation technique, and is patterned to form a gate electrode 8. Then, the substrate is dipped in an electrolytic solution and a current is flowed through the gate electrode to form an anodic oxide layer 9 on its surrounding. After an ITO (indium-tin oxide) film is formed, a chromium film and an aluminum film is consecutively formed, and this multilayer film is used for electrodes 14 and wiring 15, which connect to the ITO.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transparent conductive film, such as ITO, an image sensor, a solar cell, a liquid crystal display and the like using the same and a method of manufacturing the same. An object of the present invention is to reduce the resistance of ITO. Further, the present invention relates to a semiconductor device using ITO as a transparent conductive film, for example, a TFT (thin film transistor) and an I / O device.
This realizes simplification of a process when manufacturing an apparatus combining TO.

[0002]

2. Description of the Related Art ITO (Indium Tin Oxide) is used in a wide range of fields such as solar cells, liquid crystal displays and image sensors because of its transparency and electric conductivity. Particularly, in these fields, high transmittance and low resistance are often required, and as a method for producing ITO, a sputtering method, a vapor deposition method (including an electron beam vapor deposition method), and a CVD method (particularly, a plasma CV method).
Many methods such as D method) and spray method are used. Among these, the sputtering method is particularly excellent in adhesion, low resistance and transmittance of a thin film, and is most commonly used. The sputtering method includes a DC sputtering method using a direct current as an applied power and an RF sputtering method using a high frequency, and the DC sputtering method is superior in mass productivity. An ITO film is desired to have a low resistance in many applications. However, conventionally, in order to obtain a low-resistance film, a film is formed while heating a substrate, or a film is formed at room temperature and then annealed in an oxygen atmosphere or air. Things were going well.

[0003]

However, when the film is formed while the substrate is heated, there are the following problems. First, there is a problem of heating time and cooling time. At present, the tact time is being shortened in order to improve mass productivity, but in this method, it takes too much time for heating when forming a film and cooling after forming the film, which is not practical. Secondly, at present, mass production is progressing, and the size of a sputtering apparatus is also increasing. However, as the size of the sputtering apparatus increases, it becomes more difficult to make the temperature distribution of the heated substrate uniform. If the substrate is not heated uniformly, unevenness in resistance value and unevenness in film thickness occur, making it difficult to use the device.

[0004] Therefore, a method of heating a substrate during film formation is not usually carried out, and a low-resistance ITO film is obtained by performing annealing at room temperature and then in air or oxygen atmosphere. Have been.

[0005] By the way, TF, which has been particularly popular in recent years,
There are T active matrix type liquid crystal displays and contact type image sensors that use TFTs (thin film transistors).
After fabricating the FT element, ITO is fabricated as a pixel electrode. At this time, the drain (source) of the TFT and the ITO are connected. Generally, the TFT semiconductor used has many defects and the electrical characteristics are not good. Therefore, after manufacturing the TFT, annealing is performed in a hydrogen atmosphere, thereby forming a dangling bond in a channel portion of the semiconductor. Although the reduction is often performed, the subsequent formation of the ITO pixel electrode requires the steps of TFT fabrication → hydrogen annealing → room temperature ITO fabrication → annealing in air (oxygen).

However, in a TFT liquid crystal display or the like, it is assumed that hydrogen annealing is performed after the TFT element is manufactured as described above, ITO is manufactured at room temperature, and then annealing is performed in the air (oxygen atmosphere). Annealing must be performed twice, and in addition, annealing in the air (oxygen atmosphere) may reduce the performance of the TFT element and cause problems such as a decrease in mobility and a decrease in response steepness.

[0007]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides a sputtering method on an insulating substrate at a temperature of 0 to 100 ° C. without intentionally heating the substrate. After forming an ITO thin film by using the same, the temperature is set to 200 to 400 ° C., preferably 230
This is a method for producing a transparent conductive film, characterized by annealing at ~ 380 ° C, further comprising, after producing an ITO thin film at room temperature, patterning the ITO thin film before annealing in a hydrogen atmosphere. This is a method for producing a transparent conductive film. In the above annealing step, the annealing time is 0.5 to 30 hours, preferably 1 to 5 hours. Of course, the annealing time is selected in consideration of the characteristics of the obtained ITO film, mass productivity, cost and the like.

In the case where a TFT (thin film transistor) is formed on a substrate using a liquid crystal electro-optical device, a contact image sensor, or the like, the TFT is formed on an insulating substrate.
A method for producing a transparent conductive film, characterized by producing a TO thin film and thereafter immersing the TFT and the ITO thin film in a hydrogen atmosphere. In particular, when the TFT is provided on a substrate, the ITO thin film is produced. And a step of patterning the ITO thin film between the step of immersing the TFT and the ITO thin film in a hydrogen atmosphere. Even in this case, the TFT
Temperature when immersing ITO thin film in hydrogen atmosphere
In the case of 400 ° C., preferably 230 to 380 ° C., it is claimed that particularly excellent effects can be obtained.

In particular, in the present invention, the TFT is a top gate type TFT having a gate electrode formed on a semiconductor region.
In the case where is used, a remarkable feature can be brought out. In a top gate type TFT, an interlayer insulator is formed after forming the TFT, and then a transparent conductive film is selectively formed. Conventionally, after forming an interlayer insulator, a metal electrode and a wiring for connecting a TFT and a transparent conductive film are formed, and then a transparent conductive film is formed. On the other hand, a configuration in which the present invention exhibits more special features is that after forming an interlayer insulator, a transparent conductive film is selectively formed, and then,
This is a step of forming metal electrodes and wirings, and a semiconductor device manufactured through such steps. In particular, in this case, the upper surface of the electrode / wiring should be made of a material mainly composed of aluminum, and the lower surface in contact with the ITO film should be made of a material such as chromium or titanium nitride which can make good contact with ITO. desired.

In such a configuration, as described above,
When hydrogen annealing is performed, the catalytic action of the aluminum in contact with the outside air on the hydrogen gas results in 250 to 350 to 350 to 350.
Hydrogen can be activated even at a low temperature of ° C., and thus significantly promotes the effect of the hydrogen annealing of the present invention, which will be described in detail in the following “action”. As a result, a transparent ITO film having a low resistance is obtained. In order to obtain the same effect at 400 ° C. or less without using aluminum, hydrogen plasma may be used. For this purpose, a plasma processing apparatus must be used. Subject to significant restrictions. In addition, not only the ITO film but also a device such as a TFT is not desirable because plasma damage is large.

In the case where an ITO film is formed after forming an interlayer insulator, forming a metal electrode / wiring, and forming a metal electrode / wiring as in the prior art, the material of the metal electrode / wiring should be at least a portion in contact with the ITO film. Aluminum cannot be used for (the upper surface of the electrode / wiring), and the effect is reduced because aluminum is not in contact with the outside air. However, a sufficient effect can be obtained as compared with the method using no aluminum at all. Similarly, even if aluminum is not used for the metal electrode / wiring at all, a great effect can be obtained by using aluminum for the gate electrode.

[Operation] The operation of the present invention will be described. The graph of FIG. 1 shows the result of the annealing treatment after forming the ITO film by DC or RF sputtering at a substrate temperature of 0 to 100 ° C. The horizontal axis in the figure is the annealing temperature, and the vertical axis is the specific resistance of the film. The annealing time was 60 minutes. As can be seen from the figure, the annealing temperature is about 200 ° C.
It can be seen that the value of the specific resistance is smaller in annealing in a hydrogen (H ₂ ) atmosphere than in annealing in a nitrogen (N ₂ ) atmosphere. Furthermore, in the N ₂ atmosphere, the resistivity after annealing is larger than the resistivity during film formation, whereas in the H ₂ atmosphere, the value after annealing is lower.

Further, the relationship between the annealing temperature and the light transmittance will be described with reference to FIG. Also in this case, the annealing time is 60 minutes.

[0014] N ₂ atmosphere at 0.99 ° C. annealing as shown in FIG. 2 (1), while the improvement in both transmittance H ₂ atmosphere is not obtained, FIG. 2 (2), shown in (3) As described above, at 300 ° C. and 400 ° C., the light transmittance is improved by annealing particularly on the short wavelength side, and a large value is obtained.
In particular, it can be seen that the effect is remarkable in H ₂ annealing.

FIG. 3 shows the annealing temperature and the etching rate. As can be seen from the figure, when the annealing temperature exceeds about 200 ° C., the etching rate is significantly reduced even in the annealing treatment in either the H ₂ or N ₂ atmosphere. Therefore, it is understood that it is desirable to perform the ITO patterning process before the annealing process (200 ° C. or higher).

FIG. 4 shows the transmittance when the annealing time in the H ₂ atmosphere is changed. As can be seen from the figure, a sufficient effect is obtained by annealing for about one hour, and no further effect can be obtained by further annealing. That is, it is understood that the annealing time of about one hour is sufficient.

FIG. 5 shows the relationship between the transmittance and the annealing time in an H ₂ atmosphere. In FIG. 5A, there is no improvement by annealing at 150 ° C. annealing on both the long wavelength side and the short wavelength side, and at 300 ° C. annealing of FIG. 5B, improvement by annealing is observed on both the long wavelength side and the short wavelength side. The effect is obtained with an annealing time of about 30 minutes. In this case, annealing for about 1 hour seems to be sufficient.

The present invention has further applications in addition to those described above, so that point will be described. In the present invention, when manufacturing ITO after manufacturing a TFT element, TFT element manufacturing → ITO manufacturing → hydrogen annealing can be performed, and the conventional annealing step in oxygen (atmosphere) can be omitted. Hereinafter, the present invention will be described in more detail with reference to Examples.

[0019]

[Embodiment 1] In this embodiment, an ITO for manufacturing a simple matrix liquid crystal display (STN) is described.
An example of fabrication will be described.

CV as a sodium blocking layer on polished 300 × 200 soda lime glass
An SiO ₂ film was formed to a thickness of 20 nm by Method D. And
An ITO film was formed by DC magnetron sputtering.
The conditions at this time were as follows: back pressure 7 × 10 ⁻⁶ Torr, oxygen partial pressure 5
× 10 ^-5 , sputtering pressure 5 × 10 ^-3 , sputtering current 1.5
A. The prepared film had a thickness of 150 nm, a sheet resistance of 45 ohm, and a specific resistance of 6.8 × 10 ^-4 ohm-cm. This was patterned using a commercially available etchant to obtain 640 electrode patterns (SEG side). In addition, 480 electrode patterns were obtained (COM side). Thereafter, annealing was performed in a hydrogen atmosphere. The conditions at this time are an annealing temperature of 300 ° C. and an annealing time of 60 minutes. As a result, the specific resistance is 3.0 × 10 ⁻⁴ ,
The sheet resistance became 20 ohms. After washing the substrate thus obtained, polyimide was applied as an alignment film by a printing method to obtain a polyimide thin film of 50 nm.

Then, the surface of the polyimide thin film is rubbed using a cotton cloth, a 6-micron resin spacer is sprayed on the COM-side substrate, and an epoxy thermosetting adhesive is printed on the SEG-side substrate by screen printing. Both were pasted together. Then, liquid crystal was injected. Further, a polarizing plate was attached and a circuit was connected to obtain a liquid crystal display. By forming the ITO film at room temperature as in this embodiment, the tact time can be shortened and the mass productivity can be improved. Further, since the film was formed at room temperature, the etching time was shortened, and the sheet resistance could be reduced by the subsequent hydrogen annealing. This is very important for suppressing the rounding of the applied signal.

[Embodiment 2] In this embodiment, the IT
Among the methods for forming the O film, the oxygen partial pressure, sputter pressure, and sputter current during film formation are further mentioned. FIG. 6 shows the relationship between the annealing temperature based on the oxygen partial pressure (expressed as a ratio to the sputtering pressure) and the specific resistance. Note that the annealing time is 60 minutes, the hydrogen atmosphere, and the sputtering pressure is 3 × 10 ⁻³ Torr.
r, sputter current is 1.5A.

As can be seen from the figure, the resistance of the film before annealing varies greatly due to the change in the oxygen partial pressure, but the annealing of the film at a temperature exceeding 200.degree. It turns out that becomes smaller. From this, it can be said that the use of the present invention greatly widens the margin in the ITO film forming process.

FIG. 7 shows the relationship between the annealing temperature depending on the sputtering pressure and the specific resistance. The annealing time is 60
Min, hydrogen atmosphere, oxygen partial pressure 3%, sputtering current 1.
5A. As can be seen from the figure, the resistance of the film before annealing varies greatly due to the change of the sputtering pressure, but the annealing pressure of more than 200 ° C. and up to 400 ° C. makes the sputtering pressure 3-6 × 10 ^−3. Tor
It can be seen that the resistance value of the film formed by r is low and the variation is small.

FIG. 8 shows annealing by sputtering current.
3 shows the relationship between temperature and specific resistance. The annealing time is 6
0 min, hydrogen atmosphere, oxygen partial pressure 3%, sputtering pressure 3 ×
10 ^-3Torr.

As can be seen from the figure, by performing the annealing at a temperature exceeding 200 ° C., the resistance value is reduced, and the dependence on the sputtering current is reduced. Therefore, the hydrogen annealing of the present invention can be expected to increase the process margin in sputter current.

[Embodiment 3] The detailed conditions of this embodiment are almost the same as those of Japanese Patent Application No. Hei 4-30220, and will not be described in detail. First, using a synthetic quartz glass as a substrate, an underlying silicon oxide film having a thickness of 100 to 800 nm was formed by a sputtering method by a plasma CVD method or a low pressure CVD method. An amorphous silicon film was formed thereon by plasma CVD to a thickness of 20 to 100 nm, and annealed at 600 ° C. for 12 to 72 hours in a nitrogen atmosphere to crystallize. This was further patterned to form island-shaped semiconductor regions (for N-channel TFT and P-channel TFT). Further, a gate oxide film having a thickness of 50 to 200 nm was deposited by a sputtering method.

Next, an aluminum film was formed by a sputtering method or an electron beam evaporation method, and this was patterned to form a gate electrode and wiring. Thus, the outer shape of the TFT was adjusted. Furthermore, a current is passed through the gate electrode and wiring in the electrolytic solution,
An aluminum oxide film was formed. As the conditions for the anodic oxidation, the method described in Japanese Patent Application No. 4-30220, which was an invention of the present inventors, was employed.

Next, holes for forming electrodes were formed in the gate oxide film, and wiring was formed with chromium. And through the current. At this time, the potential difference was 30 to 100 V, preferably 35 to 50 V. In such a situation, the semiconductor region is annealed by the self-heating of the current and the electromigration effect. Further, a negative voltage was applied to the gate electrode. -30 to -100 for the gate electrode
V, preferably -35 to -50 V. This state was continued for one hour. Further, while a negative voltage is applied to the gate electrode, a wavelength of 300
-350 nm ultraviolet light (power density is, for example, 100
３００300 mW / cm ² ).

For example, even if mobile ions such as sodium are present in the semiconductor region, they are swept out by the application of such a voltage. Further, due to the presence of such an electric field, free hydrogen ions are caused to flow in the semiconductor region, trapped by dangling bonds in the semiconductor (silicon), and terminate the dangling bonds. Such an effect is described in Japanese Patent Publication No. Hei 3-19694, which is an invention of the present inventors. However, although it shows the possibility of improving bulk defects in the semiconductor, it is particularly important to improve the interface between the gate insulating film and the semiconductor region, which is important in an insulated gate semiconductor device (including a capacitor). Was not described. The above-mentioned irradiation with ultraviolet rays is effective for defects which are difficult to be removed only by application of an electric field.

Thereafter, an N-type impurity region (source, drain) and a P-type impurity region were formed by ion implantation. This process used a known CMOS technology. Thereafter, laser annealing is performed. After the laser annealing, an interlayer insulator is formed by sputtering silicon oxide as usual, an electrode hole is formed by a known photolithography technique, and a semiconductor region or a gate electrode is formed. -The surface of the wiring was exposed, and finally, a second metal film (titanium nitride or chromium) was selectively formed and used as an electrode and a wiring. Thereafter, an ITO film is formed and patterned, and then annealed in a hydrogen atmosphere at 250 to 400 ° C. for 30 minutes to 3 hours, in this embodiment, 1 hour, hydrogen is added to the semiconductor region, and lattice defects (dangling) are caused. Ring bond), the resistance of ITO was reduced, and the light transmittance was improved.

Embodiment 4 FIG. 9 shows an example in which an active matrix is formed according to the present invention. As the substrate 1, a Corning 7059 glass substrate (thickness: 1.1 mm, 300 mm
× 400 mm). Plasma CV on this substrate
The thickness is 5 to 50 nm, preferably 5 to 20 n on the entire surface by the method D.
m of silicon nitride film 2 was formed. As described above, a technique in which a substrate is coated with a film of silicon nitride or aluminum oxide and used as a blocking layer is disclosed in Japanese Patent Application No. 3-238.
710 and 3-238714.

Next, the base oxide film 3 having a thickness of 100 to 3
A 00 nm silicon oxide film was formed. The oxide film may be formed by sputtering in an oxygen atmosphere or a film obtained by decomposing and depositing TEOS by a plasma CVD method.
C. may be annealed.

After that, the amorphous silicon film 4 is formed by plasma CVD or LPCVD to a thickness of 30 to 150 nm.
nm, preferably 50 to 100 nm, and as a protective layer 5 by plasma CVD, a thickness of 20 to 100 nm.
A silicon oxide or silicon nitride film having a thickness of 100 nm, preferably 50 to 70 nm was formed. Then, a pulse laser beam having a wavelength of 400 nm or less, for example, a KrF laser beam (248
nm) to improve the crystallinity of the silicon film 4. At this time, the energy density of the laser light is 2
It is preferably from 00 to 350 mJ / cm ² . Also, the number of shots is preferably 1 to 20 times. The steps so far are shown in FIG.
It is shown in (A). Instead of improving the crystallinity by such a laser beam, the substrate may be annealed at 600 ° C. for 24 to 72 hours for crystallization.

Next, the protective layer is removed, the silicon film is patterned into island-like regions 6, and a film obtained by decomposing and depositing TEOS by plasma CVD is annealed at 450 to 650 ° C. or an oxygen atmosphere. Gate oxide film 7 was formed by a sputtering method in the inside. In particular, when using the former method, the temperature in this step may cause distortion or shrinkage of the substrate, which may make subsequent mask alignment difficult.Therefore, care must be taken when handling large-area substrates. Must. In addition, the substrate temperature can be set to 150 ° C. or lower by sputtering, but in order to reduce dangling bonds and the like in the film and reduce the influence of fixed charges, 300 to 450 ° C.
C., preferably at 350 to 400.degree.

Thereafter, an aluminum film having a thickness of 200 nm to 5 μm is formed by an electron beam evaporation method, and is patterned to form a gate electrode 8 as shown in FIG.
Was formed. Further, the substrate was immersed in an electrolytic solution, and a current was passed through the gate electrode to form an anodic oxide layer 9 therearound. The detailed conditions of the anodic oxidation are described in Japanese Patent Application Nos. 4-30220, 4-38637 and 4-54322 of the present inventors. In this embodiment, the thickness of the anodic oxide film is 200 to 230 nm.

After that, by ion doping, T
Impurities were implanted into the island-like silicon film of the FT in a self-aligned manner using the gate electrode portion (that is, the gate electrode and the surrounding anodic oxide film) as a mask. At this time, phosphorus was injected using phosphine (PH ₃ ) as a doping gas. The dose of phosphorus was 2 to 8 × 10 ¹⁵ cm ⁻² . To make the impurity region P-type, diborane (B
₂ H ₆ ) may be used.

Thereafter, as shown in FIG. 9C, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 ns)
ec) was applied to improve the crystallinity of the portion where the crystallinity was deteriorated by introducing the impurity region. The energy density of the laser was 200 to 400 mJ / cm ² , preferably 250 to 300 mJ / cm ² . As a result, N
Mold regions 10, 11 were formed. The sheet resistance in this region was 200 to 800 Ω / □.

Thereafter, as shown in FIG. 9D, an interlayer insulator 12 was formed of silicon oxide, and a pixel electrode 13 was formed of ITO. The ITO film was formed by using a DC sputtering method without heating the substrate.
Substrate temperature is 50-100 ° C for heating by plasma
However, the temperature may be lowered to 50 ° C. or lower by forcibly cooling the substrate. After ITO film formation, this was patterned into the shape of a pixel electrode. Thereafter, a contact hole is formed, and a thickness of 5 to 50 n is formed by a sputtering method.
m chromium film and an aluminum film having a thickness of 200 to 1000 nm were continuously formed. Then, the multilayer film is patterned to form the electrodes / wirings 14 as shown in FIG.
15 were formed, and one of the electrodes 15 was also connected to ITO. As can be seen from FIG.
Since the portion in contact with the ITO film 13 was made of the chromium film 16, the contact was good. Similarly good contact can be obtained by using titanium nitride instead of chromium. Further, while chromium and titanium nitride have high resistance, aluminum in the upper layer has low resistance, so that the overall wiring resistance can be kept low.

In this state, the substrate is placed in 99.9% hydrogen at atmospheric pressure, and annealed at 250 to 400 ° C., typically 350 ° C. for 30 to 60 minutes to hydrogenate silicon and form the ITO film 13. Hydrogen annealing was completed.

[0041]

As described above, the present invention relates to the conventional ITO.
By using a new method of hydrogen annealing after film formation at room temperature, which was not a method of manufacture, a transparent conductive film with low resistance and high transmittance can be obtained with high productivity, and patterning characteristics are good. Is obtained. Further, in the case of manufacturing simultaneously with the TFT element, the number of steps can be reduced, and mass productivity is further increased.

[Brief description of the drawings]

FIG. 1 shows a graph of annealing temperature and specific resistance.

FIG. 2 shows the wavelength dependence of transmittance.

FIG. 3 shows an annealing temperature dependency of an etching rate.

FIG. 4 shows the wavelength dependence of the transmittance when the annealing time is changed.

FIG. 5 shows the dependence of transmittance on annealing time.

FIG. 6 shows the annealing temperature dependence of the specific resistance when the oxygen partial pressure is changed.

FIG. 7 shows the annealing temperature dependence of the specific resistance when the sputtering pressure is changed.

FIG. 8 shows the annealing temperature dependence of the specific resistance when the sputtering current is changed.

FIG. 9 shows an example of a manufacturing process of a liquid crystal display element portion according to the present invention.

[Explanation of symbols]

Reference Signs List 1 substrate 2 silicon nitride (or aluminum oxide) film 3 base silicon oxide film 4 silicon layer 5 protective film (silicon oxide or silicon nitride) 6 island-shaped semiconductor region 7 gate oxide film (silicon oxide) 8 gate electrode (aluminum) 9 anode Oxide (aluminum oxide) 10, 11 Impurity region (source, drain) 12 Interlayer insulator (silicon oxide) 13 Pixel electrode (ITO) 14 Data side electrode / wiring 15 Pixel side electrode 16 Lower metal layer (chromium or titanium nitride)

Claims (3)

[Claims] 1. A thin film transistor having a crystallized semiconductor region in contact with an insulating surface, a thin film transistor having a gate electrode, a transparent conductive film selectively formed, and connecting the semiconductor region of the thin film transistor to the transparent conductive film. A conductive film, wherein the conductive film is made of a first film made of chromium or titanium nitride in contact with the transparent conductive film, and a first film made of a material mainly containing aluminum in contact with the first film. 2. A semiconductor device comprising: 2. A thin film transistor having a semiconductor region crystallized on an insulating surface, a gate electrode over the semiconductor region, an interlayer insulator formed over the gate electrode, and In a semiconductor device having a selectively formed transparent conductive film and a conductive film connecting the semiconductor region of the thin film transistor and the transparent conductive film, the conductive film may be chromium or titanium nitride in contact with the transparent conductive film. And a second coating made of a material containing aluminum as a main component and in contact with the first coating. 3. The semiconductor device according to claim 1, wherein the transparent conductive film is an ITO film.