JPH10214773A - Fabrication of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase the fabrication yield by dry etching the resist surface lightly after development and removing residual resist on a substrate or skirting thereof actively thereby suppressing defective development of resist pattern. SOLUTION: After a field oxide 2 and a gate oxide 3 are deposited on a silicon substrate 1, a polysilicon is deposited and phosphorus is diffused before forming a WSi/Si layer 4 by depositing a tungsten silicide. It is then developed with a tetramethylammonium halide liquid. Subsequently, it is etched in a narrow gap RIE system using CF4 as etching gas for about 10sec under conditions of 100sccm flow rate 100sccm, 400Torr pressure and 400W power. Consequently, the residual resist 5A is eliminated completely. Thereafter, the upper layer WSi is etched for 80sec under specified conditions and the lower layer polysilicon is etched for 30sec under specified conditions.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a lithography technique.

[0002]

2. Description of the Related Art Conventionally, various lithography processes have been used in the manufacturing process of a semiconductor device. Hereinafter, a method for manufacturing a gate electrode will be described with reference to FIG.

First, as shown in FIG. 2A, after a field oxide film 2 and a gate oxide film 3 are formed on a silicon substrate 1, a polysilicon film and a tungsten silicide film (WSi / Si film) 4 are formed. A material film for the gate electrode and a photoresist film 5 for the i-line (365 nm) are sequentially formed.

Next, as shown in FIG. 2B, exposure is performed by an i-line stepper using a mask for a gate electrode pattern, development is performed, and a pattern of a photoresist film is formed. At this time, if the pattern dimension becomes smaller than 0.35 μm, the focus shift due to the step of the field,
The resist footing in the narrow space due to the increase in the aspect ratio of the photoresist film and the removal of the upper part of the unexposed resist due to the reflection from the underlying WSi film are constantly generated.
The resist development residue 5A is generated on the WSi / Si film 4.

Next, as shown in FIG. 2C, using this resist film as a mask, a WSi / Si film 4 is formed by an anisotropic dry etching method using a halogen-based etching gas.
Is etched to form a gate electrode. At this time, since the WSi / Si film 4 is masked by the resist development residue 5A, an etching residue 4A of the WSi / Si film 4 is generated. Such an etching residue causes a gate short circuit or the like, and lowers the product yield.

[0006]

The limit resolution of the actual use of lithography using i-line is about 0.30 μm, and when patterning in the vicinity of this, the focus margin at the time of exposure is increased as described above. The patterning of a photoresist film has become extremely difficult due to the effects of a decrease in resist aspect ratio due to miniaturization, an increase in the influence of light reflection from the underlayer, and distortion of a lens due to a resolution limit. For this reason, development defects such as abrasion of the resist tip portion and skirting of the resist bottom portion occur frequently, which causes a reduction in the yield of semiconductor devices.

SUMMARY OF THE INVENTION An object of the present invention is to improve the yield of a resist pattern which is exposed and developed with a design rule smaller than the 0.35 μm rule, which is close to the resolution limit of lithography using i-line. An object of the present invention is to provide a method for manufacturing a semiconductor device.

[0008]

According to a method of manufacturing a semiconductor device according to the present invention, a film to be etched and a photoresist film are sequentially formed on a semiconductor substrate, and then exposed and developed to form a pattern of the photoresist film. And removing the development residue of the photoresist film generated in the development step of the photoresist film by a dry etching method, and then etching the film to be etched using the pattern of the photoresist film as a mask. It is assumed that.

[0009]

In the case of performing patterning with a dimension near 0.30 μm, which is the resolution limit of the lithography technique using i-line,
Developing defects such as abrasion of the resist tip portion and skirting of the resist bottom portion, which have been constantly occurring, cause a decrease in yield.In the present invention, the resist surface is lightly etched after development, and the substrate is etched. Since the upper resist residue and tailing are actively removed, a good resist pattern can be formed. Therefore, it is possible to completely suppress a wiring short-circuit failure and a pattern collapse failure due to the remaining etching.

[0010]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention.

First, as shown in FIG. 1A, after a field oxide film 2 and a gate oxide film 3 are formed on a silicon substrate 1, a 0.15 μm thick polysilicon is formed as a gate electrode material by LPCVD. After a film is deposited and phosphorus is diffused, a tungsten silicide film having a thickness of 0.15 μm is deposited by a sputtering method to form a WSi / Si film 4.
Next, a photoresist film 5 for i-line having a thickness of 1 μm is formed by a spin coating method, prebaked, and then exposed by an i-line stepper.

Next, as shown in FIG. 1B, 2.38
% Of TMAH (tetra methyl ammonium hydride) solution. At this time, the pattern dimension is 0.3
If the thickness is smaller than 5 μm, focus shift due to a step in the field, resist skirting in a narrow space due to an increase in the aspect ratio of the photoresist film, and WS of the underlayer may occur.
The undeveloped resist remaining on the WSi / Si film 4 due to the influence of the scraping of the resist on the unexposed portion due to the reflection from the i film 5
A occurs.

Subsequently, a narrow gap RIE apparatus is
Also, using CF ₄ as an etching gas, and a flow rate of 100 sc
m, pressure 400 mTorr, power 400 W
Etch for about 0 seconds. The etching rate of the resist film under this condition is about 0.3 μm / min, and about 0.05 μm is etched by etching for 10 seconds. The thickness of the remaining resist development film on the substrate, which is a problem here, is about 0.03 μm at the maximum according to the investigation by the inventor. Therefore, the film is completely removed by etching for 10 seconds, and as shown in FIG. The development residue 5A completely disappears.

Next, as shown in FIG. 1D, the upper WSi film is formed by forming SF ₆ : ₆₀ sccm and He: 160 sc
Etching is performed for 80 seconds under the conditions of a mixed gas atmosphere of H.sub.cm, HBr: 100 sccm, a pressure of 250 mTorr, and a power of 200 W. Subsequently, the lower polysilicon film is
_By performing etching for 30 seconds under the conditions of a mixed gas atmosphere of ₂ : 200 sccm, HBr: 75 sccm, a pressure of 400 mTorr and a power of 200 W, a fine gate electrode made of the WSi / Si film 4 having no etching residue is formed.

[0016]

As described above, according to the present invention, when a resist pattern having a size near 0.30 μm, which is the critical resolution for practical use of i-line lithography, the resist surface is lightly dry-etched after development, and A good resist pattern is formed by actively removing the resist residue and the tailing generated on the top. For this reason, it is possible to suppress a wiring short-circuit defect due to etching residue and a decrease in yield due to pattern collapse, which conventionally occur constantly, and to improve a semiconductor device manufacturing yield.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor chip for describing an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor chip for describing a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Field oxide film 3 Gate oxide film 4 WSi / Si film 4A Etching residue 5 Photoresist film 5A Resist development residue

Claims (2)

[Claims] A step of forming a pattern of a photoresist film by sequentially forming a film to be etched and a photoresist film on a semiconductor substrate, and exposing and developing the photoresist film; and a photoresist generated in the step of developing the photoresist film. Removing the development residue of the film by a dry etching method, and then etching the film to be etched using the pattern of the photoresist film as a mask. 2. The method for manufacturing a semiconductor device according to claim 1, wherein i-line is used as exposure light. .