JPH10210090A - Quaternary fsk demodulation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a quaternary FSK demodulation circuit which rationalizes a demodulation result. SOLUTION: This circuit detects the rotation direction and the rotation speed of movement between signal points arranged on a plane formed with two axes of in-phase and orthogonal components at the time of orthogonal detection of a carrier signal subjected to quaternary FSK modulation. In this case, a vector detection part 51 of a rotation direction detection part 3 refers to the polarity of the orthogonal component at the time of polarity inversion of the in-phase component and refers to the polarity of the in-phase component at the time of polarity inversion of the orthogonal component to detect the rotation direction of movement between signal points little by little, and a first integral discharge circuit 61 integrates it over a specific time to detect the rotation direction.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a quaternary FSK demodulation circuit used in a digital radio receiver or the like, and particularly to a quaternary FSK demodulation circuit capable of appropriately demodulating regardless of the modulation index with a simple circuit configuration. About.

[0002]

2. Description of the Related Art Frequency shift keying (FSK modulation) is one type of frequency modulation, and is a modulation method in which the frequency of a carrier signal is shifted by a predetermined amount in accordance with an input signal to produce an output wave. The circuit is configured so that the output wave does not have discontinuity in phase.

[0003] As one method of FSK demodulation modulated in this way, when a FSK modulated carrier signal is received,
The carrier signal is subjected to quadrature detection using a local oscillator that oscillates a signal having the frequency of the carrier signal before modulation, and an I component (in-phase component) and a Q component (quadrature component) are obtained as a quadrature baseband signal. There is a method of performing FSK demodulation (so-called “zero IF detection method”).

Here, first, a conventional binary FSK demodulation circuit based on the IF detection method will be described, and then a conventional four-level FSK demodulation circuit will be described. A conventional binary FSK demodulation circuit will be described with reference to FIGS. FIG. 7 is a configuration block diagram of a conventional binary FSK demodulation circuit, and FIG. 8 is a configuration block diagram of an example of a zero IF detection circuit in the conventional binary FSK demodulation circuit. The conventional binary FSK demodulation circuit mainly includes a zero IF detection circuit 1, a comparator 2, and a phase comparison circuit 5, as shown in FIG.

Next, each part will be specifically described. The zero-IF detection circuit 1 performs quadrature detection on the received FSK-modulated carrier signal, divides the quadrature baseband signal into its I component and Q component, and outputs them to the comparators 2a and 2b, respectively. The specific configuration of the zero IF detection circuit 1 will be described later.

The comparator 2a receives the input of the I component of the orthogonal baseband signal and shapes it into a waveform representing a digital signal that changes into a rectangle (hereinafter, this operation is referred to as "binary shaping"). .) The comparator 2b receives the input of the Q component of the quadrature baseband signal and performs binary shaping. Hereinafter, the signal output from the comparator 2a is referred to as a "shaped I signal", and the signal output from the comparator 2b is referred to as a "shaped Q signal".

The phase comparison circuit 5 includes comparators 2a, 2
b receives the input of the shaped I signal and the shaped Q signal, and outputs a signal indicating which phase of the signal is advanced as a detection output. Specifically, this detection output is a binary signal of “0” or “1”.

That is, the phase comparison circuit 5 determines whether the instantaneous frequency of the received carrier signal is high or low.
By utilizing the fact that the rotation direction of the vector expressed by the signal and the shaping Q signal is reversed, the rotation direction is compared and determined, and the level of the instantaneous frequency is output as a binary signal.

Here, the zero-IF detection circuit 1 will be described in more detail. For example, as shown in FIG. 8, the zero IF detection circuit 1 includes a local oscillator 11 and a 90 ° distribution circuit 12.
And the first mixer circuit 13 and the second mixer circuit 1
4, a first LPF 15, and a second LPF 16.

Hereinafter, each part will be described in detail. The local oscillator 11 outputs a signal of the frequency of the carrier signal before modulation to the 90 ° distribution circuit 12 as a local oscillation signal. The 90 ° distribution circuit 12 receives the input of the local oscillation signal, outputs it as an in-phase signal to the first mixer circuit 13 as it is, and adjusts the phase of the local oscillation signal by 90 °.
The signal is shifted and output to the second mixer circuit 14 as a quadrature signal.

The first mixer circuit 13 is a multiplication circuit that outputs a signal obtained by multiplying the in-phase signal and the received carrier signal to the first LPF 15. The second mixer circuit 14 is a multiplication circuit that multiplies a signal obtained by multiplying the orthogonal signal and the received carrier signal by a second LPF 16.
Is output to

The first LPF 15 is a low-pass filter for removing a high-frequency component, and removes a high-frequency component of a signal input from the first mixer circuit 13 and outputs it as an I component of a quadrature baseband signal. It is. Second LPF1
Reference numeral 6 is similar to the first LPF 15 and removes high-frequency components of a signal input from the second mixer circuit 14 and outputs the result as a Q component of a quadrature baseband signal.

That is, if the frequency of the received carrier signal is higher than the frequency of the local oscillation signal (the FS
If K-modulated, the vector represented by the shaped I signal and the shaped Q signal rotates in the positive direction, and if the frequency of the received carrier signal is lower than the frequency of the local oscillation signal (as such, If FSK-modulated), the vector represented by the shaped I signal and the shaped Q signal rotates in the negative direction.

Then, the phase comparison circuit 5 determines the direction of this rotation and detects how the carrier signal is FSK-modulated.

Here, the operation of the conventional binary FSK demodulation circuit will be described. The zero IF detection circuit 1 receives the FSK-modulated carrier signal, performs quadrature detection on the carrier signal, and outputs the I and Q components of the quadrature baseband signal separately.
Then, the comparators 2a and 2b perform a binary shaping of these components, and output a shaped I signal and a shaped Q signal, respectively.

Then, the phase comparison circuit 5 compares the phases of the shaped I signal and the shaped Q signal (detects the rotation direction of the vector expressed by the shaped I signal and the shaped Q signal), and detects it. This is output as a binary signal detection output.

Next, a conventional four-level FSK demodulation circuit will be described. In the quaternary FSK demodulation circuit, the above-described binary F
The one that adopts the zero IF detection method similar to the SK demodulation circuit is "Direct conversion receiving method of 4-level FSK signal", Saito, Akaiwa, IEICE Technical Report RC
S94-124, pp.43-48.

Therefore, an outline of the method described in this document will be described below. The quaternary FSK demodulation circuit is the same as the above-described binary FSK demodulation circuit up to the point where the received carrier signal is quadrature-detected and subjected to binary shaping to obtain a shaped I signal and a shaped Q signal. The rotation direction of the vector represented by the signal is detected, and the rotation speed is also separately detected.
K is demodulated.

In the quadrature FSK demodulation, in the quadrature baseband signal, each signal point represents one of the 2-bit symbols "00", "01", "11", and "10". As shown in FIG. 9, each MSB corresponds to the rotation direction, and LSB corresponds to the rotation speed. FIG. 9 is an explanatory diagram showing the movement of the orthogonal baseband signal in the IQ plane in the quaternary FSK demodulation circuit.

That is, when the MSB is "0", the rotation direction is negative (FIG. 9 (a)), and when the MSB is "1", it is positive (FIG. 9 (b)). The rotation speed is defined by the following [Equation 1].

[0021]

(Equation 1)

Here, R represents the modulation speed and ΔFmax represents the maximum frequency shift, and two modulation indexes m are set corresponding to the LSB. Note that the rotation speed is mπ. For example, when m = 1, 3, especially when LSB is “0” and m = 3, the rotation speed at that time is mπ
= 3π, so as shown by the broken line in FIGS.
If m = 1 when the LSB is rotated five times and the LSB is “1”, the rotation speed at that time is mπ = π, so that the rotation speed is 0 as shown by the solid lines in FIGS. .5 turns.

Here, the quaternary FSK demodulation circuit will be described in detail with reference to a digital signal which changes to "111001".
A description will be given of an example of a quadrature baseband signal when quadrature detection is performed on a K-modulated carrier signal with reference to FIGS. 10 and 11. FIG. 10 is an explanatory diagram illustrating an example of a signal in the quaternary FSK demodulation circuit, and FIG. 11 is an explanatory diagram illustrating an example of a signal point arrangement in the quaternary FSK demodulation circuit.

As described above, since the symbol length is 2 bits, "111001" is replaced with "11" and "1".
0 "and" 01 ", and the data is received at regular intervals in this order. Therefore, with the time on the horizontal axis, the Q component of the orthogonal baseband signal obtained by orthogonally detecting the received carrier signal becomes a signal as shown in FIG.
The component becomes a signal as shown in FIG.

Therefore, when each of them is binarized, FIG.
It becomes a rectangular wave as shown in FIG. 10 (c) and FIG. 10 (d). These are the shaped Q signal and the shaped I signal. here,
When these signals are traced as the movements of the signal points shown in FIG. 11, at the time t1 in FIG. 10, both the shaped Q signal and the shaped I signal are positive, and the state is the signal in FIG. Represented by point A.

Then, at time t2, the shaped I signal becomes negative, and the state shifts to the signal point B in FIG. At this time, the trajectory representing the state change intersects the axis of sgn (Q). That is, when the LSB is “1”, the rotation speed per symbol is 0.5 rotation, so that the trajectory representing the state change is sgn (Q) or sgn (Q).
The number of times of intersection with the axis of gn (I) is 1 to 3 times.

On the other hand, during the period from time t3 to t9,
When SB is "0", the rotation speed per symbol is 1.5 rotations, so that the number of times that the trajectory representing the state change crosses each axis is 5 to 7 times.

Therefore, the conventional quaternary FSK demodulation circuit detects the MSB in the same manner as the binary FSK, and then, the trajectory of the state change is sgn (Q) or sgn per symbol.
The number of times of intersection with the axis (I) is counted, and the comparison is made with a preset threshold value. For example,
In the above example, the number of intersections when the LSB is “1” is 1 to
Since the number of intersections is three and the number of intersections at "0" is 5 to 7, the threshold value may be set to "4". In other words, the margin for detecting the modulation index (determining the LSB) at this time is ± 1 time.

[0029]

However, in such a conventional four-level FSK demodulation circuit, first, the symbol timing extraction circuit detects the symbol timing using the binary-shaped signal, so that the symbol change point detection is not performed. The timing may be delayed from the original symbol change point, and the jitter at the time of detection of the symbol change point may increase, and a symbol timing slightly shifted from the true symbol change point may be output. There was a problem that it was not possible to obtain.

In the conventional 4-level FSK demodulation circuit, 2
In order to detect the rotation direction and the rotation speed based on the value-shaped signal, the quality of the detection output is affected by, for example, noise, phase distortion in the zero-IF detection circuit, DC offset, deviation in the detection of the symbol timing, and the like. There is a problem that the signal cannot be demodulated properly due to deterioration.

The present invention has been made in view of the above circumstances, and has as its object to provide a four-level FSK demodulation circuit that can make the demodulation result appropriate.

[0032]

According to the first aspect of the present invention, a signal obtained by quadrature detection of a quaternary FSK-modulated signal and separating the signal into an in-phase component and a quadrature component. When the sign of the in-phase component reverses, the sign of the quadrature component is referenced to detect the rotation direction of the movement between the signal points, and integrates the detected rotation direction over a specific time. Then, the rotation direction of the movement between the signal points at the specific time is detected, the rotation direction can be properly determined, and if the demodulation is performed based on this, the demodulation result can be properly determined. Can be.

According to a second aspect of the present invention for solving the above-mentioned problems of the prior art, a quadrature FSK-modulated signal is subjected to quadrature detection to receive a signal separated into an in-phase component and a quadrature component. When the sign of the quadrature component is turned, the sign of the in-phase component is referred to, the rotational direction of the movement between the signal points is detected, and the detected rotational direction is integrated over a specific time to obtain the specific time. Is characterized by detecting the rotation direction of the movement between the signal points in the above, the rotation direction can be properly determined, and if the demodulation is performed based on this, the demodulation result can be made appropriate.

According to a third aspect of the present invention for solving the above-mentioned problem of the conventional example, when quadrature detection is performed on a quaternary FSK modulated carrier signal, the carrier signal is formed by two axes of an in-phase component and a quadrature component. A quaternary FSK demodulation circuit for detecting a rotation direction and a rotation speed of movement between signal points arranged on a plane,
As means for detecting the rotational direction of the movement, receiving the input of the signal of each of the binary-shaped components, detecting the rising or falling of the signal of the binary-shaped in-phase component, and detecting the result of the detection. First detecting means for detecting the rising or falling of the binary-shaped signal of the quadrature component, and outputting the result of the detection; and the binary-shaped in-phase signal. Receiving the result of detection of the rise or fall of the signal of the component and the orthogonal component, and the input of the signal of each of the binary-shaped components, detects the rotation direction of movement between signal points, and detects the rotation direction of the rotation direction. A vector detection unit that outputs a signal indicating positive / negative, and a first integration discharge circuit that integrates a signal input from the vector detection unit over a specific time, as means for detecting a rotational speed of the movement. , Said 2 A delay circuit that delays and outputs a signal of each of the shaped components for a predetermined time; and outputs an exclusive OR of the signal of each of the binary-shaped components and the signal of each of the components input from the delay circuit. An exclusive-OR circuit that performs an arithmetic operation for each component, and a second integration discharge circuit that integrates the sum of the exclusive-OR for each component input from the exclusive-OR circuit over the specific time. It is characterized by that
The result of demodulation can be made appropriate.

According to a fourth aspect of the present invention, there is provided a four-level FSK demodulation circuit according to the third aspect of the present invention, wherein the vector detecting unit comprises a binary shaped in-phase component and a quadrature component. When receiving the result of the detection of the rising or falling of the signal and the input of the signal of each of the binary-shaped components, and receiving the input of the result of the detection indicating that the signal of the in-phase component has risen, If the quadrature component signal is positive, a signal indicating that the rotation direction is negative is output. If the quadrature component signal is negative, a signal indicating that the rotation direction is positive is output. If the signal of the orthogonal component is positive when receiving the input of the detection result indicating that the signal of the component has fallen, a signal indicating that the rotational direction is positive is output, and the signal of the orthogonal component is output. If negative, the direction of rotation is negative And a signal indicating that the rotation direction is positive if the signal of the in-phase component is positive when receiving the input of the detection result indicating that the signal of the quadrature component has risen. Output, if the signal of the in-phase component is negative, outputs a signal indicating that the rotation direction is negative, and when receiving the input of the detection result indicating that the signal of the quadrature component has fallen, A vector detector outputs a signal indicating that the rotation direction is negative if the signal of the in-phase component is positive, and outputs a signal indicating that the rotation direction is positive if the signal of the in-phase component is negative. This is characterized in that the rotation direction can be properly determined, and if the demodulation is performed based on this, the result of the demodulation can be properly performed.

According to a fifth aspect of the present invention for solving the problems of the above conventional example, a four-valued F is described in the third or fourth aspect.
In the SK demodulation circuit, the first detection means and the second detection means each include a delay circuit that delays a signal of an input component for a predetermined time and outputs the signal, and a signal of the input component is output from the delay circuit. A rising detection unit that outputs a detection result indicating that the signal of the component has risen if the signal is larger than the input signal; and a signal of the input component that is smaller than the signal input from the delay circuit. If the signal of the component is a detection unit having a falling detection unit that outputs a result of detection indicating that the signal has fallen, it is possible to appropriately determine the rotation direction,
If demodulation is performed based on this, the result of demodulation can be made appropriate.

[0037]

Embodiments of the present invention will be described with reference to the drawings. 4 according to the embodiment of the present invention.
The value FSK demodulation circuit (this circuit) converts the I signal and the Q signal, which have been binary-shaped by the comparator, into a signal that gradually changes by a difference and an integration, thereby roughly determining the rotation direction and the rotation speed. , A four-valued FSK based on the result
The demodulation is performed, and the influence of an error such that the signal frequently changes at the time of demodulation can be reduced.

As shown in FIG. 1, this circuit comprises a zero IF detection circuit 1, a comparator 2, a rotation direction detection unit 3, a rotation speed detection unit 4, and a judgment circuit 9. FIG.
3 is a configuration block diagram of the present circuit. The rotation direction detection unit 3 includes a delay circuit 31, a rising detection unit 41,
The rotation speed detection unit 4 includes a fall detection unit 42, a vector detection unit 51, and an integration discharge circuit 61.
Is composed of a delay circuit 31, an XOR circuit 71, a symbol timing extraction circuit 81, and a second integration discharge circuit 62.

Hereinafter, each part will be described in detail. The zero-IF detection circuit 1 receives an input of a carrier signal that has been FSK-modulated as in the related art, performs quadrature detection on the input, and outputs an in-phase component (I component) and a quadrature component (Q component) of a quadrature baseband signal. Is output.

The comparator 2a receives the input of the I component of the quadrature baseband signal, performs binary shaping and outputs a shaped I signal, and the comparator 2b similarly performs a binary shaping on the Q component to form a shaped Q signal. It outputs a signal.

The rotation direction detection unit 3 receives the input of the in-phase component and the quadrature component of the quadrature baseband signal, detects the rotation direction of the signal point, and outputs it to the determination circuit 9. Numeral 4 is for receiving the input of the in-phase component and the quadrature component of the quadrature baseband signal, detecting the rotational speed of the signal point, and outputting it to the decision circuit 9.

The delay circuits 31 of the rotation direction detection unit 3 and the rotation speed detection unit 4 delay the shaped I signal and the shaped Q signal by a predetermined time, respectively.
A signal and a delay shaping Q signal are output. The delay circuits 31a and 31b of the rotation direction detector 3 and the delay circuits 31c and 31d of the rotation speed detector 4 generally have different delay times.

The rising detector 41 of the rotation direction detector 3
a receives the input of the shaped I signal and the delayed shaped I signal,
A signal indicating the timing at which the signal of the I component rises (hereinafter, referred to as an “I-phase rising signal”) is output. The falling detecting unit 42a receives the input of the shaped I signal and the delayed shaped I signal, and outputs a signal (hereinafter, referred to as an "I-phase falling signal") indicating the timing at which the signal of the I component falls. It is.

The rising detection section 41b receives the input of the shaped Q signal and the delayed shaped Q signal and outputs a signal indicating the timing at which the signal of the Q component rises (hereinafter, referred to as "Q phase rising signal"). It is. The falling detector 42b receives the input of the shaped Q signal and the delayed shaped Q signal, and outputs a signal indicating the timing at which the signal of the Q component falls (hereinafter, referred to as a “Q phase falling signal”). It is.

In the claims, a delay circuit 31a,
The rise detection section 41a and the fall detection section 42a are collectively referred to as first detection means.
b, rising detection section 41b and falling detection section 4
2b will be collectively referred to as second detection means.

The vector detector 51 receives the shaped I signal, shaped Q signal, I-phase rising signal, I-phase falling signal, Q-phase rising signal and Q-phase falling signal, and determines the rotation direction of the vector. It is output as a signal.

More specifically, the vector detection unit 51
As shown in FIG. 2, when the I-phase rising signal is input, for example, the shaped I signal changes from “0” to “1”, and therefore, as shown in FIG. There are two cases: a case where the rotation has changed to one quadrant and a case where the rotation has changed from the third quadrant to the fourth quadrant as shown in FIG. 2 (b). Can be identified. FIG. 2 is an explanatory diagram illustrating the operation of the vector detection unit 51.

That is, if the shaped Q signal is "0", it can be determined that the rotation is from the third quadrant to the fourth quadrant as shown in FIG. 2B, and the shaped Q signal is "1". If so, it can be determined that the rotation is from the second quadrant to the first quadrant as shown in FIG.

The first integration discharge circuit 61 receives an input of a signal representing one symbol time (a received symbol timing ST signal) from a symbol timing extraction circuit 81 to be described later, and receives the time (one symbol) represented by the signal. This is for integrating the vector signal input from the vector detection unit 51 for the time (time) and outputting it to the determination circuit 9.

The XOR (exclusive OR) circuit 71a receives the input of the shaping I signal and the delay shaping I signal, and if the value is positive or zero, sets the signal as "true" and represents "1". If the value is negative, a signal representing “0” as “false”
The exclusive OR is calculated and output to the second integration discharge circuit 62. The XOR circuit 71b receives the input of the shaped Q signal and the delayed shaped Q signal, and
The exclusive OR is calculated in the same manner as in
2 is output.

The symbol timing extraction circuit 81 receives the input of the shaped I signal and the shaped Q signal and estimates and outputs a received symbol timing ST signal representing one symbol time, as shown in FIG. The output is made common to the first integration discharge circuit 61 and the second integration discharge circuit 62.

The second integration discharge circuit 62 receives the symbol timing ST signal from the symbol timing extraction circuit 81 as described above, and receives the signal 1 represented by this signal.
Over the symbol time, the sum of the exclusive ORs input from the XOR circuit 71a and the XOR circuit 71b is integrated and output to the determination circuit 9.

Here, the operation of the rotation direction detector 3 will be described with reference to FIG. FIG. 3 is a timing chart for explaining the operation of this circuit. Upon receiving the input of the FSK-modulated carrier signal, the zero IF detection circuit 1 performs quadrature detection, and outputs an in-phase component (I component) and a quadrature component (Q component) of the quadrature baseband signal.

Then, the comparator 2a receives the input of the I component of the quadrature baseband signal, performs a binary shaping to output a shaped I signal, and the comparator 2b performs a binary shaping on the Q component to form a shaped Q signal. Is output. The shaped I signal output here becomes a signal as shown in FIG. 3A, and the shaped Q signal becomes a signal as shown in FIG. 3B.

Next, the delay circuit 31 of the rotation direction detector 3
Respectively, delays the input shaped I signal and shaped Q signal by a preset fixed time, and outputs them as a delayed shaped I signal and a delayed shaped Q signal.

Then, the rising edge detecting section 41a
In response to the input of the signal and the delay shaping I signal, an I-phase rising signal (FIG. 3C) is output, and the falling detecting section 42
a receives the input of the shaped I signal and the delayed shaped I signal,
A phase falling signal (FIG. 3D) is output.

Further, the rising detection section 41b receives the input of the shaped Q signal and the delayed shaped Q signal, outputs a Q-phase rising signal (FIG. 3 (e)), and outputs the falling detection section 42b.
Receives the input of the shaped Q signal and the delayed shaped Q signal, and outputs a Q-phase falling signal (FIG. 3 (f)).

The case where the rotation direction is positive and the case where the rotation direction is negative will be described separately. First, when the rotation direction is positive, each signal is represented, for example, on the left side of FIG. The timing chart is as shown in FIG. The left side of FIG. 3 shows a case where the rotation direction is positive and the rotation speed is high.

That is, the I-phase rising signal is
When input to the vector detection unit 51 as in (c) (A), since the state of the shaped Q signal is “0”, the rotation direction is detected as the direction (positive direction) in FIG. You. Hereinafter, similarly, when the I-phase falling signal is input as shown in FIG. 3D (B), the state of the shaped Q signal is “1” and the Q-phase rising signal is as shown in FIG. (C), the state of the shaped I signal is “0”, and when the Q-phase falling signal is input as shown in FIG. 3F (D), the state of the shaped I signal is “0”. 1 ", the rotation direction is always detected as the direction (positive direction) in FIG.

Accordingly, in this case, the signal integrated by the first integrating and discharging circuit 61 is as shown in FIG. 3 (g), and the result of the integration is as shown in FIG. 3 (i).

On the other hand, when the rotation direction is negative, each signal has a timing chart as shown on the right side of FIG. 3, for example. The right side of FIG. 3 shows a case where the rotation direction is negative and the rotation speed is low.

Similarly to the above case, when the I-phase falling signal is input to the vector detector 51 as shown in FIG. 3D (F), the state of the shaped Q signal is "0". The rotation direction is detected as the direction (negative direction) in FIG.

Similarly, the I-phase falling signal is
When the signal is input to the vector detection unit 51 as in (f) (E), the state of the shaping I signal is “1”, so that the rotation direction is detected as the direction (negative direction) in FIG. You.

Therefore, in this case, the signal integrated by the first integration discharge circuit 61 is as shown in FIG. 3 (h), and the result of the integration is as shown in FIG. 3 (i).

According to the rotation direction detector 3, since the signal indicating the rotation direction is integrated little by little with the resolution corresponding to the delay time in the delay circuit, the rotation determined even if the symbol timing is shifted is determined. The influence on the direction is small, and the influence on the determination deterioration is small. Further, even if the vector information output by the vector detection circuit 5 frequently changes while maintaining the presence of noise, phase distortion in the zero IF detection circuit 1 and DC offset, etc., the integration is performed little by little by the integration circuit 61. Since this is performed, the influence on the determination of the rotation direction is reduced, and there is an effect that the determination of the rotation direction can be appropriately performed.

Next, the operation of the rotation speed detector will be described with reference to FIG.
This will be described with reference to FIG. FIG. 4 is a timing chart for explaining the operation of this circuit. FIGS. 3 and 4 show the case of the same signal.

The shaping I signal output from the comparator 2a changes as shown in FIG. 4A, as shown in FIG. 3A, as already described with reference to FIG. Then, the delay circuit 31a delays the shaped I signal by a predetermined time and outputs a signal shown in FIG. 4B as a delayed shaped I signal.

Here, when the shaped I signal and the delayed shaped I signal are different from each other, the XOR circuit 71a outputs a signal representing "1" as an exclusive OR, and the output is as shown in FIG. The time changes as shown in FIG. Also,
Although the shaped Q signal and the delayed shaped Q signal are not shown, the output of the XOR circuit 72b, which is the exclusive OR thereof, changes with time as shown in FIG.

Then, the second integrating and discharging circuit 62 integrates the sum of these, thereby performing the integration with the time change shown in FIG. In FIG. 4E, a line indicated by TH represents a threshold, which can be moved up and down by setting. In an actual circuit, this threshold value is set in the determination circuit 9, and the determination circuit 9 determines the rotation speed based on the threshold value.

In this example, the second line shown in FIG.
The output of the integrating discharge circuit 62 is set so as to reach the threshold value on the left side of FIG. 4, and does not reach the threshold value on the right side of FIG. This corresponds to an operation in which the integration performed by the second integration discharge circuit 62 integrates how many signal point changes have occurred per symbol.
On the left side, there are many changes in the signal points, so the integration result is large. On the right side in FIG. 4, the change in the signal points is small, so the integration result is small.

According to the rotation speed detector 4, the output of the XOR circuit representing the rotation is dispersed in a fixed delay time and is integrated little by little in the same manner as the rotation direction detector. Can be improved by the delay time, the influence on the integration result due to the symbol timing deviation can be reduced, and the rotation speed can be properly determined.

In addition, due to noise, phase distortion in the zero IF detection circuit 1 and DC offset, the output of each shaped signal and each delayed shaped signal are irregular, especially frequently before and after the change of the signal point. Even if the output of the OR circuit changes, the integration is performed, so that the effect can be reduced and the rotation speed can be properly determined.

Next, the operation of this circuit will be described. The zero IF detection circuit 1 of the present circuit receives the input of a carrier signal subjected to quaternary FSK modulation, performs quadrature detection on the carrier signal, and outputs an in-phase component I and a quadrature component Q thereof. Then, the comparators 2a and 2b perform binary shaping on each component, and perform shaping I
Output a signal and a shaped Q signal.

The shaped I signal and shaped Q signal are input to the rotation direction detector 3 and the rotation speed detector 4, respectively. Then, the rotation direction detection unit 3 detects a change in the phase of the vector on the IQ plane having the shaped I signal and the shaped Q signal as components, and outputs the detected change to the determination circuit 9.

The rotation speed detector 4 detects the amount of rotation of the signal point generated during a certain period of time and outputs it to the determination circuit 9. Then, the determination circuit 9 receives the input of the rotation direction from the rotation direction detection unit 3 and receives the input of the rotation speed from the rotation speed detection unit 4, and determines the MSB of the symbol from the rotation direction.
The LSB of each symbol is determined based on a comparison between the rotation speed and a preset threshold, and the symbol is demodulated and output based on the LSB.

As described above, according to the present circuit, since the rotation direction and the rotation speed are properly determined, there is an effect that an appropriate demodulation can be performed based on these.

[0077]

An embodiment of the present invention will be described with reference to FIGS. FIG. 5 is an explanatory diagram showing an outline of a value output by the rotation direction detecting unit, and FIG. 6 is an explanatory diagram showing an outline of a value output by the rotational speed detecting unit.

Specifically, in FIG. 5, as the operation of the rotation direction detecting section, each solid line represents one symbol, and each of the solid lines is reset to 0 every symbol time. And
Each solid line is a step-like function that starts at 0, monotonically increases in the positive direction, and monotonically decreases in the negative direction.

There are two types of functions, those that change in the positive direction and those that change in the negative direction. A function that monotonically increases in the positive direction causes rotation in the positive direction and rotation in the negative direction. What monotonically decreases means rotation in the negative direction. At the end of one symbol time, the output of the rotation direction detector 3 is far from “0”, so that an appropriate determination can be made.

The signal output from the rotation speed detecting section 4 is as shown in FIG. Here, each solid line represents one symbol, and each is reset to 0 every symbol time. Each of the solid lines monotonically increases only in the positive direction starting from 0, but there are two types, one with a low reaching point and one with a high reaching point. Here, a low arrival point corresponds to a low rotation speed and a high arrival point corresponds to a high rotation speed. By setting the threshold value to an intermediate value between these, the LSB of the symbol can be appropriately adjusted. It can be determined.

[0081]

According to the first and second aspects of the present invention, the rotation direction of the movement between the signal points of the quaternary FSK-modulated signal is set to four.
Value The FSK-modulated signal is detected every time the sign of the in-phase component and the sign of the quadrature component obtained by quadrature detection are inverted, and this is integrated over a specific time to detect the rotational direction of the movement. Since the quaternary FSK demodulation circuit performs the integration, the result of the integration corresponds to the amount of rotation per symbol time if the specific period is approximated to one symbol time. Even if the symbol timing is slightly deviated, there is little effect on the result of the integration, and phase distortion and DC offset caused by noise contamination and circuit characteristics are present. Even if errors in rotation occur frequently, the effects are canceled by integration, so that the direction of rotation can be properly determined, and if demodulation is performed based on this, demodulation can be performed. There is an effect that can be proper results.

According to the third aspect of the present invention, the four-valued FSK
When performing quadrature detection on a modulated carrier signal, a quaternary F that detects a rotation direction and a rotation speed of movement between signal points arranged on a plane formed by two axes of an in-phase component and a quadrature component
An SK demodulation circuit, as means for detecting the rotation direction, a first detection means for detecting a rising or falling timing of the in-phase component, and a second detection means for detecting a rising or falling timing of the quadrature component. (2) detecting means, a vector detecting unit for detecting a rotating direction at each rising or falling timing of each component detected by the two detecting means, and integrating the detected rotating direction over a specific time. A four-level FSK demodulation circuit including a first integration discharge circuit and a delay circuit, an exclusive OR circuit, and a second integration discharge circuit as means for detecting the rotation speed. If the time is approximated, the result of the integration corresponds to the amount of rotation per symbol time, so that the direction of rotation can be detected by its sign. In addition, even if the symbol timing is slightly shifted, the result of the integration is little affected, and there is a phase distortion and a DC offset caused by noise mixing and circuit characteristics. Even if an error occurs frequently, the influence is canceled by integration, so that the direction of rotation can be properly determined, and if demodulation is performed based on this, there is an effect that the result of demodulation can be properly performed. .

According to the fourth aspect of the present invention, the vector detecting unit determines the value of the quadrature component at each timing when the in-phase component rises or falls, and determines the in-phase component at each timing when the quadrature component rises or falls. The quaternary FSK demodulation circuit according to claim 3, which is a vector detection unit that detects the direction of rotation depending on the value of the component. If the specific period is a time approximating one symbol time, the result of the integration is Since it corresponds to the amount of rotation per symbol time, the direction of rotation can be detected by its sign, and even if the symbol timing is slightly deviated, the result of the integration will be less affected. Due to the phase distortion and DC offset caused by the characteristic, errors in the rotation of signal points frequently occur in a short time. Since the cancel the influence by the integration, it is possible to properly determine the direction of rotation, by performing demodulation it to the original, there is an effect that can properly results demodulation.

According to the fifth aspect of the present invention, the first detection means and the second detection means each include a delay circuit for delaying a signal of the input component for a fixed time and outputting the signal, A rising detection unit that detects that the signal of the component has risen, and a falling detection unit that detects that the signal of the component has fallen, according to the magnitude of the signal of the component and the signal input from the delay circuit. Since the quaternary FSK demodulation circuit according to claim 3 or 4 is a detecting means, if a specific period is a time approximating one symbol time, the result of the integration is a rotation amount per symbol time. Therefore, the direction of rotation can be detected based on the sign, and even if the symbol timing is slightly deviated, the result of the integration is little affected, and the noise is mixed and the circuit characteristics cause Even errors frequently occur for a short time in the rotation of signal points exist, such as generated phase distortion and DC offset, since the cancel the influence by the integration, it is possible to properly determine the direction of rotation,
If demodulation is performed based on this, there is an effect that the result of demodulation can be made appropriate.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of the present circuit.

FIG. 2 is an explanatory diagram illustrating an operation of a vector detection unit 51.

FIG. 3 is a timing chart for explaining the operation of the circuit.

FIG. 4 is a timing chart for explaining the operation of the present circuit.

FIG. 5 is an explanatory diagram illustrating an outline of a value output by a rotation direction detection unit.

FIG. 6 is an explanatory diagram illustrating an outline of a value output by a rotation speed detection unit.

FIG. 7 is a configuration block diagram of a conventional binary FSK demodulation circuit.

FIG. 8 is a configuration block diagram of an example of a zero IF detection circuit in a conventional binary FSK demodulation circuit.

FIG. 9 is an explanatory diagram illustrating a motion of an orthogonal baseband signal in an IQ plane in a quaternary FSK demodulation circuit.

FIG. 10 is an explanatory diagram illustrating an example of a signal in a four-level FSK demodulation circuit.

FIG. 11 is an explanatory diagram illustrating an example of a signal point arrangement in a four-level FSK demodulation circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Zero IF detection circuit, 2 ... Comparator, 3 ... Rotation direction detection part, 4 ... Rotation speed detection part, 5 ... Phase comparison circuit, 9 ... Judgment circuit, 11 ... Local oscillator, 12 ... 90
° Distribution circuit, 13: first mixer circuit, 14: second mixer circuit, 15: first LPF, 16: second LPF, 31: delay circuit, 41: rising detector, 42: falling detection 51, a vector detection unit, 61, a first integration discharge circuit, 62, a second integration discharge circuit, 71, an XOR circuit, 81, a symbol timing extraction circuit

Claims (5)

[Claims] 1. A quadrature FSK-modulated signal is subjected to quadrature detection to receive an input of a signal separated into an in-phase component and a quadrature component. When the sign of the in-phase component changes, the sign of the quadrature component is referred to. To detect the rotation direction of movement between signal points,
A four-level FSK demodulation circuit, wherein the detected rotation direction is integrated over a specific time to detect a rotation direction of movement between signal points at the specific time. 2. A quadrature FSK-modulated signal is subjected to quadrature detection to receive an input of a signal separated into an in-phase component and a quadrature component. When the sign of the quadrature component changes, the sign of the in-phase component is referred to. To detect the rotation direction of movement between signal points,
A four-level FSK demodulation circuit, wherein the detected rotation direction is integrated over a specific time to detect a rotation direction of movement between signal points at the specific time. 3. The quadrature detection of a quaternary FSK-modulated carrier signal, the direction and rotation of movement between signal points arranged on a plane formed by two axes of an in-phase component and a quadrature component. A quaternary FSK demodulation circuit for detecting a speed, as a means for detecting a rotational direction of the movement, receiving a signal of each of the binary-shaped components and receiving a signal of the binary-shaped in-phase component. First detecting means for detecting the rise or fall of the signal and outputting the result of the detection; and detecting the rise or fall of the binary-shaped signal of the quadrature component and outputting the result of the detection. Receiving the input of the detection result of the rising or falling of the binary shaped in-phase component and quadrature component signals and the signal of each of the binary shaped components; Detect rotation direction of movement A vector detection unit that outputs a signal indicating the sign of the rotation direction; and a first integration discharge circuit that integrates a signal input from the vector detection unit over a specific time period. As means for detecting the speed, a delay circuit that delays and outputs the signal of each of the binary-shaped components for a predetermined time, a signal of each of the binary-shaped components and each of the components input from the delay circuit An exclusive-OR circuit for calculating an exclusive-OR with a signal for each component, and an integral of the exclusive-OR for each component input from the exclusive-OR circuit over the specific time A four-level FSK demodulation circuit, comprising: 4. The vector detection unit receives an input of a result of detection of a rising or falling edge of a binary-shaped signal of an in-phase component and a quadrature component and an input of the signal of each of the binary-shaped components, When receiving the result of the detection indicating that the in-phase component signal has risen, if the quadrature component signal is positive, a signal indicating that the rotation direction is negative is output, and the quadrature component signal is output. If the signal is negative, a signal indicating that the rotation direction is positive is output.If the signal of the quadrature component is positive when receiving the result of the detection indicating that the signal of the in-phase component has fallen, If the signal of the orthogonal component is negative, a signal indicating that the direction of rotation is negative is output if the signal of the orthogonal component is negative, indicating that the signal of the orthogonal component has risen. When the input of the detection result is received If the in-phase component signal is positive, a signal indicating that the rotation direction is positive is output.If the in-phase component signal is negative, a signal indicating that the rotation direction is negative is output. If the signal of the in-phase component is positive when the signal of the detection result indicating that the component signal has fallen is received, a signal indicating that the rotation direction is negative is output, and the signal of the in-phase component is output. 4. The four-valued FSK demodulation circuit according to claim 3, wherein the vector detection unit outputs a signal indicating that the rotation direction is positive if it is negative. 5. The first detecting means and the second detecting means,
A delay circuit for delaying each of the input component signals for a certain period of time and outputting the signal, and that if the input component signal is larger than the signal input from the delay circuit, the signal of the component has risen. A rising detection unit that outputs a detection result indicating the detection result, and outputs a detection result indicating that the signal of the component has fallen if the signal of the input component is smaller than the signal input from the delay circuit. 5. The four-level FSK demodulation circuit according to claim 3, wherein the detection unit has a falling edge detection unit.