JPH10144700A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a recombination current and prevent lowering of hFE in a lateral bipolar transistor by supplying excess hydrogen to the interface between a semiconductor substrate and an insulating film by heat treating in a hydrogen-containing atmosphere, then forming a wiring on the insulating film, and maintaining a state where the hydrogen is combined with dangling bonds. SOLUTION: A first oxide silicon film 17 is formed on a semiconductor substrate 10 on which a base region 13a is formed. An emitter region 26b and a collector region 26c are formed on the surface layer of the base region 13a at the bottom surfaces of contact holes 21b and 21c formed in the first silicon film 17. Then, heat treatment is performed in a hydrogen atmosphere to supply hydrogen to an interface A between semiconductor substrate 10 and the first oxide silicon film 17. Thereafter, a wiring 32 connected to the respective regions, covering the base region 13a between the emitter region 26b and the collector region 26c, is formed by using barrier metal containing titanium, on the first oxide silicon film 17. As excess hydrogen is supplied to the interface A, even through the hydrogen is absorbed into the wiring 32, the state where the dangling bonds of the interface A are combined with the hydrogen is maintained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a lateral bipolar transistor provided on a semiconductor substrate.

[0002]

2. Description of the Related Art A lateral bipolar transistor (hereinafter abbreviated as L-Tr.) 5 shown in FIG. 5 is manufactured as follows. That is, after the element isolation region 51 and the base region 52 are formed in the surface layer of the semiconductor substrate 50, the first insulating film 53 is formed on the semiconductor substrate 50. Next, a contact hole 54 reaching the base region 52 is formed in the first insulating film 53, and a polysilicon film 55 connected to the semiconductor substrate 50 is patterned. Next, an emitter region 56 and a collector region 57 are formed in the surface layer of the base region 52 by diffusion from the polysilicon film 55. Thereafter, a second insulating film 58 is formed so as to cover the polysilicon film 55, and the second insulating film 58 and the first insulating film 53 are formed.
Next, a contact hole 59 reaching the polysilicon film 55 and a contact hole 60 reaching the base region 52 are formed. Thereafter, a wiring 61 connected to the polysilicon film 55 on the bottom surface of each of the contact holes 59 and 60 and the base region 52
To thereby form L-Tr. 5 are formed.

[0003] The L-Tr. 5
Is a base region 5 formed on the surface side of the semiconductor substrate 50.
The emitter region 56 and the collector region 57 are arranged on the surface layer of the second region 2, and the base current flows through the surface layer of the base region 52. Therefore, it is necessary to keep the surface layer of the base region 52 stable. Therefore, a structure is generally adopted in which the upper part of the exposed surface of the base region 52 is shielded by the wiring 61.

Meanwhile, a structure in which an aluminum-based material such as aluminum-silicon (Al-Si) is laminated on a barrier metal is widely used for the wiring 61. In particular, as the above-mentioned barrier metal, a material in which a titanium oxynitride (TiON) film is laminated on a titanium (Ti) film is frequently used as a material having excellent electromigration resistance and heat resistance and further having a low contact resistance. .

[0005]

However, Ti used as a barrier metal for wiring has a high affinity for hydrogen as it is also used as a material constituting a hydrogen storage alloy. For this reason, in the semiconductor device manufactured as described above, if a process involving a temperature change such as a sintering process or an alloy process on the back surface is performed after the wiring is formed, dangling at the interface between the semiconductor substrate and the insulating film is performed. Hydrogen bonded to the bond is absorbed by the Ti, and dangling bonds increase at the interface.

Therefore, in the bipolar transistor, a trap level is formed in the surface layer of the base region, and the recombination current, that is, the base current increases.
This is a factor that lowers E.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems. That is, the method for manufacturing a semiconductor device of the present invention is a method for manufacturing a semiconductor device provided with a lateral bipolar transistor, and performs the following procedure. First,
An insulating film capable of diffusing hydrogen is formed on the semiconductor substrate on which the base region is formed, and a contact hole is formed in the insulating film. After that, an emitter region and a collector region are formed on the surface layer of the base region. Next, heat treatment is performed in a hydrogen atmosphere to supply hydrogen to the interface between the semiconductor substrate and the insulating film. Thereafter, a wiring made of a material having high affinity for hydrogen is formed in a state of covering the exposed surface of the base region via the insulating film. The heat treatment is preferably performed at a temperature in the range of 350 ° C. to 450 ° C., and the heat treatment at a temperature at which hydrogen bonded to dangling bonds at the interface between the semiconductor substrate and the insulating film is eliminated during the manufacturing process is completed. After that.

In the above manufacturing method, after supplying hydrogen to the interface between the semiconductor substrate and the insulating film by heat treatment in a hydrogen-containing atmosphere, wiring is formed on the semiconductor substrate via the insulating film. Thus, the wiring is formed in a state where hydrogen is bonded to the dangling bond at the interface. For this reason, even if hydrogen at the above interface is absorbed by wiring formed using a material having a high affinity for hydrogen, excessive heat is supplied to the interface between the semiconductor substrate and the insulating film by the heat treatment. , Hydrogen is subsequently supplied to the dangling bond at the interface.
Therefore, generation of dangling bonds at the interface is suppressed, and formation of trap levels due to generation of dangling bonds in the surface layer of the base region between the emitter and the collector of the lateral bipolar transistor is suppressed.

In the above-mentioned manufacturing method, a silicon nitride film having a thickness capable of diffusing hydrogen may be formed on the insulating film before performing the step of forming the wiring.

Further, another method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device in which a lateral bipolar transistor and a capacitor are provided on the front surface side of a semiconductor substrate, and is performed in the following procedure. First, an insulating film capable of diffusing hydrogen is formed on a semiconductor substrate on which a base region of a lateral bipolar transistor and a lower electrode of a capacitor are formed, and an opening reaching the lower electrode is formed. A silicon nitride film to be a dielectric film of the capacitor is formed. Next, after forming a contact hole in the insulating film and the silicon nitride film, a polysilicon film is formed on the silicon nitride film. Next, an emitter electrode, a collector electrode, and an upper electrode are formed by pattern-etching the polysilicon film. Next, after forming an emitter region and a collector region on the surface layer of the base region, heat treatment is performed in a hydrogen atmosphere to supply hydrogen to the interface between the semiconductor substrate and the insulating film. Then, after performing the heat treatment, a wiring made of a material having high affinity for hydrogen is formed in a state of covering the exposed surface of the base region via the insulating film and the silicon nitride film. The heat treatment is performed in the same manner as in the above-described semiconductor device manufacturing method.

In the method of manufacturing a semiconductor device, the polysilicon film formed on the silicon nitride film is pattern-etched to form an emitter electrode, a collector electrode, and an upper electrode. The silicon nitride film is partially reduced by the etching. For this reason, the thickness of the dielectric film (that is, the silicon nitride film) in the capacitor element is reduced, and even if the silicon nitride film has a reduced effect of preventing diffusion of hydrogen due to the decrease in the film thickness, the interface between the semiconductor substrate and the insulating film is reduced. Since sufficient hydrogen is supplied by the heat treatment, the generation of dangling bonds at the interface is suppressed in the same manner as in the above-described manufacturing method.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method of manufacturing a semiconductor device according to the present invention will be described by using a vertical bipolar transistor (hereinafter referred to as a VT).
r. ) And a lateral bipolar transistor (hereinafter referred to as L
-Tr. This will be described in detail based on an embodiment applied to a method for manufacturing a semiconductor device in which a capacitor and a capacitor are provided over the same substrate.

Here, the V-Tr. Is an NPN type, and the above L-Tr. Is a PNP type. Each Tr. When the conductivity types are reversed, the conductivity types of the impurities and the diffusion layers in the embodiment are all reversed.

First, as shown in FIG. 1A, solid-phase diffusion using diantimony trioxide (Sb 2 O 3)
An N-type diffusion layer 12 is formed on a surface layer of a P-type silicon substrate 11.
a and 12b are formed. And V-Tr. Forming area 1
1a is formed of V-Tr. Embedded collector 1
2a, L-Tr. The formation region 11b is also a diffusion layer 12b.
Is L-Tr. Embedded base 12b. afterwards,
An epitaxial layer 13 of N-type silicon having a resistance value of about 1 Ωcm to 3 Ωcm
The semiconductor substrate 10 formed of the epitaxial layer 13 and the silicon substrate 11 is formed with a thickness of about 2.0 μm. This epitaxial layer 13 is formed of L-Tr. The base region 13a is formed in the formation region 11b.

Next, as shown in FIG. 1B, an 800 nm-thick element isolation film 15 is formed on the surface layer of the semiconductor substrate 10 by a recess LOCOS method using silicon nitride as an oxidation prevention film 14. . This element isolation film 15
V-Tr. Forming region 11a and L-Tr. Formation region 11b
And a capacitor element forming region 11c. At this time, the antioxidant film 14 is formed on a 50 nm-thick pad oxide film (not shown) formed by a thermal oxidation method by a CVD (Chemical Vapor Deposition) method.
It is assumed that the film is formed with a thickness of about 00 nm and patterned.

Next, as shown in FIG. 1 (3), phosphorus ions as N-type impurities are added to the surface layer of the semiconductor substrate 10.
About 5 × 10 ¹⁵ / cm ^{2 is} introduced with an implantation energy of 0 keV. After that, a heat treatment is performed at 1000 ° C. for 30 minutes to activate the impurities, and the V-Tr. Forming area 11
a, a collector lead portion 16a is formed in the L-Tr. The base lead portion 16b is formed in the formation region 11b, and the lower electrode 16c is formed in the capacitance element formation region 11c.

Next, the element isolation film 1 is formed by the existing technology.
After flattening the surface of the semiconductor substrate 10 by shaving the birds head of No. 5, a silicon oxide film 17 is formed to a thickness of about 20 nm on the entire surface of the semiconductor substrate 10 by a thermal oxidation method.
Next, a P-type impurity for forming the channel stop region 18 is introduced into the lower surface of the element isolation film 15 by ion implantation from the silicon oxide film 17. Here, boron is introduced as a P-type impurity at a dose of about 5 × 10 ¹³ / cm ² at an implantation energy of 360 keV. Then, the silicon oxide film 1 is formed by CVD.
Further, a silicon oxide film having a thickness of about 100 nm is formed on the substrate 7 to form a first silicon oxide film 17 having a thickness of 120 nm. This first silicon oxide film 17
It becomes the insulating film described in the claims.

Next, as shown in FIG. 2D, an opening 19 reaching the semiconductor substrate 10 is formed in the first silicon oxide film 17 in the capacitive element forming region 11c. Then LP
(Low Pressure)-A silicon nitride film 20 is formed to a thickness of 20 nm on the first silicon oxide film 17 so as to cover the inner wall of the opening 19 by a CVD method. Opening 19
And the thickness of the silicon nitride film 20 are set to appropriate values according to the capacitance value required for the capacitance element.

Thereafter, the silicon nitride film 20 is patterned so as to leave the silicon nitride film 20 as the dielectric film 20a on the capacitor element forming region 11c, and the L-Tr. The silicon nitride film 20 is left over the formation region 11b. However, the silicon nitride film 20 may be left as it is without being patterned on the entire surface in a solid state, or may be patterned so as to remain only on the capacitor element formation region 11c.

Next, as shown in FIG.
r. A contact hole 21a is formed in the first silicon oxide film 17 in the formation region 11a, and the L-Tr. A contact hole 21b and a contact hole 21c are formed in the silicon nitride film 20 and the first silicon oxide film 17 in the formation region 11b.

Then, as shown in FIG. 2 (6), the contact holes 21a to 21c are
A first polysilicon film 22 having a thickness of about 150 nm is formed on the first silicon oxide film 17 and the silicon nitride film 20. Next, a P-type impurity is introduced into the first polysilicon film 22 by ion implantation. Here, boron difluoride ion (BF ₂ ⁺ ) is set to 30 keV to 70 keV.
10 ¹⁵ / cm ² to 10 ¹⁶ /
Introduce about ² cm ² .

Next, the contact holes 21a to 21a
The first polysilicon film 22 is patterned so as to be connected to the semiconductor substrate 10 on the bottom surface of 1c and to remain on the dielectric film 20a in the capacitive element formation region 11c and to be separated from each other. And V-Tr. Base electrode and LT
r. The first polysilicon film 22 is left as a part of the emitter electrode, the collector electrode, the upper electrode of the capacitor, and the like. Here, the first polysilicon film 22 is patterned by performing etching using a resist pattern (not shown) as a mask. At this time, chlorine gas (C
l ₂ ) / methane difluoride (CH ₂ F ₂ ) / sulfur hexafluoride (SF ₆ ) is used as an etching gas.

When patterning the first polysilicon film 22, the L-Tr. In the formation region 11b, the underlying silicon nitride film 20 is reduced in thickness by the over-etching of the first polysilicon film 22.

Next, as shown in FIG. 2 (7), a second silicon oxide film 23 having a thickness of about 300 nm is formed on the first silicon oxide film 17 so as to cover the first polysilicon film 22 by the CVD method. Is formed. Thereafter, using a resist pattern (not shown) as a mask, V-Tr. Forming area 11
a, the second silicon oxide film 23 and the first polysilicon film 22 in the contact hole 21a in FIG.
An emitter opening 24 reaching the semiconductor substrate 10 is formed in the contact hole 21a.

Next, a B for forming an intrinsic base 25 on the surface layer of the semiconductor substrate 10 from the emitter opening 24 is formed.
F ₂ ⁺ ions 10 ¹³ at an implantation energy of about 30keV~70keV / cm ² ~10 ¹⁴ atoms / cm ² of about introduced. Next, after a silicon oxide film (not shown) having a thickness of 600 nm is formed on the second silicon oxide film 23,
A heat treatment is performed at 0 ° C. for 10 minutes. As a result, impurities in the first polysilicon film diffuse into the semiconductor substrate 10 and V
-Tr. Base lead portion 26a is formed in formation region 11a, and L-Tr. The emitter region 26 is formed in the formation region 11b.
b and the collector 26 region c are formed. Thereafter, the entire surface of the silicon oxide film is etched back to form a V-Tr.
A side wall 27 made of the silicon oxide film is formed on the side wall of the emitter opening 24 in the formation region 11a.

Next, as shown in FIG.
As a result, the second polysilicon is formed on the second silicon oxide film 23.
Film 28 is formed to a thickness of 150 nm, and the second policy
N-type impurities are introduced into the recon film 28. here,
Arsenic ions are converted to 30 keV to 70 k by ion implantation.
10 at injection energy of about eV^FifteenPieces / cm^Two-10 ¹⁶
Pieces / cm^TwoIntroduce a degree. Then, by the CVD method,
An outer layer made of silicon oxide on the second polysilicon film 28
The diffusion preventing layer 29 is formed to a thickness of about 300 nm,
Heat treatment is performed at 00C to 1100C for 5 seconds to 30 seconds.
Thereby, V-Tr. Emitter opening of formation region 11a
At the bottom of the opening 24, the second polysilicon film 28
Impurities are diffused into the surface layer of the base 25 to form an emitter region.
An area 30 is formed.

Next, as shown in FIG. 3 (9), after removing the diffusion preventing layer (29) by wet etching,
The second polysilicon film 28 is patterned, and the V-Tr.
An emitter electrode 28a connected to the emitter 30 in the formation region 11a is formed.

After that, heat treatment in a hydrogen atmosphere, which is the point of the present invention, is performed. Here, a heat treatment is performed in a hydrogen-containing atmosphere such as a forming gas composed of hydrogen gas or nitrogen gas containing hydrogen gas. As a result, hydrogen is diffused into the first silicon oxide film 17 and the second silicon oxide film 23, and the semiconductor substrate 10 and the first silicon oxide film 17 are diffused.
Excess hydrogen is supplied to the interface A with the substrate. Then, dangling bonds are terminated with hydrogen at the interface A,
The dangling bond at the interface A is reduced.

The heat treatment is performed at a temperature of 350 ° C. to 450 ° C. while preventing the hydrogen bonded to the dieling bond from being desorbed. More preferably, by performing the heat treatment at a temperature of 380 ° C. to 420 ° C., hydrogen is efficiently bonded to dangling bonds.

Next, the second silicon oxide film 23 and the first silicon oxide film 17 are patterned to form a V-Tr. A contact hole 31a reaching the first polysilicon film 22 and a contact hole 31b reaching the collector lead-out portion 16a are formed in the formation region 11a. Forming area 1
1b, a contact hole 31c and a contact hole 31d reaching the first polysilicon film 22 and a contact hole 31e reaching the base lead portion 16b are formed.
A contact hole 31f reaching the first polysilicon film 22 and a contact hole 31g reaching the lower electrode 16c are formed in the capacitive element region 11c.

Thereafter, as shown in FIG. 3 (10), a wiring 32 connecting to the semiconductor substrate 10 and the first polysilicon film 22 and the second polysilicon film 28 on the bottom surfaces of the contact holes 31a to 31g is formed. I do. This wiring 32
Is configured as shown in the enlarged view of FIG. That is,
The wiring 32 is made of titanium (Ti) 41 having a thickness of about 30 nm.
Titanium oxynitride (TiON) with a thickness of about 70 nm
The barrier metal is formed by stacking a barrier metal 42 and aluminum silicon (AlSi) 43 having a thickness of about 600 nm formed on the barrier metal. FIG. 4 is similar to FIG.
It is an enlarged view of the B section in (10). As is apparent from this figure, the silicon nitride film 20 is reduced in thickness by over-etching when patterning the first polysilicon film 22. Thereby, the silicon nitride film 20 is thinned to such an extent that hydrogen can be diffused.

In addition, L-Tr. In the formation region 11b, the surface of the base region 13a between the emitter region 26b and the collector region c is covered with the wiring 32. This ensures the stability of the surface of the base region 13a between the emitter region 26b and the collector region 26c.

As described above, as shown in FIG. 3 (10), the V-Tr. 10a,
L-Tr. 10b and the capacitor 10c are formed. Thereafter, a multilayer wiring (not shown) is formed here to form an overcoat film, and an opening for a bonding pad is formed in the overcoat film. Then, a sintering process is performed at 400 ° C. for 60 minutes in a forming gas.

In the sintering process, the hydrogen supplied to the interface A between the semiconductor substrate 10 and the first silicon oxide film 17 by the heat treatment in the hydrogen-containing atmosphere is changed to the first type.
It diffuses into the silicon oxide film 17. Here, the silicon nitride film 20 on the first silicon oxide film 17 is so thin that the effect of preventing diffusion of hydrogen is lost due to over-etching of the first polysilicon film 22. Therefore, the hydrogen diffuses from the first silicon oxide film 17 into the silicon nitride film 20 and the second silicon oxide film 22 and is absorbed by titanium forming the wiring 32. However, since excess hydrogen was supplied to the interface A between the semiconductor substrate 10 and the first silicon oxide film 17 by heat treatment in a hydrogen-containing atmosphere, hydrogen was bonded to dangling bonds at the interface A. State can be maintained.

From the above, according to the above manufacturing method,
Generation of dangling bonds at the interface A between the semiconductor substrate 10 and the first silicon oxide film 17 can be suppressed. And L-Tr. In (10b), an increase in recombination current due to generation of dangling bonds can be prevented in the surface layer of the base region 13a between the emitter region 26b and the collector region c.

In the process described in the above embodiment with reference to FIG. 1D, the L-Tr. The silicon nitride film 20 is also formed on the formation region 11b.
The silicon nitride film 20 was patterned so as to leave. However, in the present invention, L-Tr. Forming area 1
1b, the conductive substrate 1
As described above, excess hydrogen is supplied to the interface A between the first silicon oxide film 17 and the first silicon oxide film 17.
In this case, the state in which hydrogen is bonded to the dangling bond can be maintained, and the same effect can be obtained.

Further, in the steps described in the above embodiment with reference to FIG.
After forming 1 g, heat treatment in a hydrogen atmosphere may be performed. In this case, the contact hole 31
Since the heat treatment is performed in a state where the openings a to 31g are opened, hydrogen diffuses to the semiconductor substrate 10 through the contact holes 31c to 31d. Therefore, hydrogen can be efficiently supplied to the interface between the semiconductor substrate 10 and the first silicon oxide film 17 in a shorter time.

Further, in the above embodiment, FIG.
The heat treatment in a hydrogen atmosphere performed in the process described with reference to FIG.
May be performed after the film is formed and after the high-temperature step of 600 ° C. or more is completed.

[0039]

As described above, according to the method of manufacturing a semiconductor device of the present invention, in a process of manufacturing a lateral bipolar transistor and a process of manufacturing a lateral bipolar transistor and a capacitor on the same substrate, a process including a hydrogen-containing atmosphere is performed. Forming an interconnect on the insulating film after supplying excess hydrogen to the interface between the semiconductor substrate and the insulating film by the heat treatment in the above, the hydrogen is bonded to the dangling bond at the interface even if the interconnect absorbs hydrogen. It is possible to keep the state. Therefore, recombination current due to dangling bonds, that is, an increase in base current in the surface layer of the base region between the emitter region and the collector region is prevented, and h in the lateral bipolar transistor is reduced.
It is possible to prevent a decrease in FE.

[Brief description of the drawings]

FIG. 1 is a sectional process view (part 1) for describing an embodiment to which the present invention is applied.

FIG. 2 is a sectional process view (part 2) for describing an embodiment to which the present invention is applied.

FIG. 3 is a sectional process view (part 3) for describing an embodiment to which the present invention is applied.

FIG. 4 is an enlarged view of a main part for describing the embodiment.

FIG. 5 is a cross-sectional view for explaining a conventional technique.

[Explanation of symbols]

1 Semiconductor device 10 Semiconductor substrate 10b L-Tr. (Horizontal bipolar transistor)
10c Capacitor 13a Base region 17 First silicon oxide film (insulating film) 20 Silicon nitride film 20a Dielectric film 21b, 21c Contact hole 26b Emitter region 26c Collector region 32 Wiring A interface

 ──────────────────────────────────────────────────の Continued on the front page (72) Inventor Shigeru Kanematsu Inside Sony Corporation 6-35 Kita Shinagawa, Shinagawa-ku, Tokyo

Claims (7)

[Claims] 1. A method of manufacturing a semiconductor device comprising a lateral bipolar transistor provided on a surface side of a semiconductor substrate, comprising: forming an insulating film capable of diffusing hydrogen on a semiconductor substrate on which a base region of the lateral bipolar transistor is formed. Forming a contact hole reaching the base region in the insulating film; forming an emitter region and a collector region in a surface layer of the base region on the bottom surface of the contact hole; Performing a heat treatment to supply hydrogen to an interface between the semiconductor substrate and the insulating film; and, after performing the heat treatment, reacting with the hydrogen while covering the exposed surface of the base region via the insulating film. Forming a wiring formed using a material having high affinity for the semiconductor device. 2. The method according to claim 1, wherein the heat treatment is performed at a temperature in the range of 350 ° C. to 450 ° C. 3. The heat treatment in a hydrogen atmosphere is performed after a heat treatment process at a temperature at which hydrogen bonded to dangling bonds at an interface between a semiconductor substrate and the insulating film is eliminated. 2. The method of manufacturing a semiconductor device according to claim 1, wherein 4. The method of manufacturing a semiconductor device according to claim 1, wherein a silicon nitride film having a thickness capable of diffusing hydrogen is formed on the insulating film before performing the step of forming the wiring. Method. 5. A method of manufacturing a semiconductor device comprising a lateral bipolar transistor and a capacitor provided on a surface side of a semiconductor substrate, wherein the base region of the lateral bipolar transistor and a lower electrode of the capacitor are formed on the semiconductor substrate. Forming an insulating film through which hydrogen can be diffused, and forming an opening in the insulating film to reach the lower electrode; and forming an opening on the insulating film by LP-CVD so as to cover an inner wall of the opening. Forming a silicon nitride film serving as a dielectric film of a capacitor element, forming a contact hole reaching the base region in the insulating film and the silicon nitride film, and covering the inner wall of the contact hole. Forming a polysilicon film on the silicon nitride film and the insulating film; and pattern-etching the polysilicon film to form a polysilicon film. Forming an upper electrode on the silicon nitride film above the lower electrode and an emitter electrode and a collector electrode connected to the bottom surface of the contact hole; and diffusing impurities from the polysilicon film to form the base region on the bottom surface of the contact hole. Forming an emitter region and a collector region on the surface layer of the above, performing a heat treatment in a hydrogen atmosphere to supply hydrogen to an interface between the semiconductor substrate and the insulating film, and performing the heat treatment. Forming a wiring made of a material having a high affinity for hydrogen while covering the exposed surface of the base region via the insulating film and the silicon nitride film. A method for manufacturing a semiconductor device. 6. The method according to claim 5, wherein the heat treatment is performed at a temperature in a range of 350 ° C. to 450 ° C. 7. The heat treatment in a hydrogen atmosphere is performed after a heat treatment step at a temperature at which hydrogen bonded to dangling bonds at an interface between a semiconductor substrate and the insulating film is eliminated. 6. The method for manufacturing a semiconductor device according to claim 5, wherein