JPH1012794A - Lead frame for semiconductor device - Google Patents
Lead frame for semiconductor deviceInfo
- Publication number
- JPH1012794A JPH1012794A JP16739396A JP16739396A JPH1012794A JP H1012794 A JPH1012794 A JP H1012794A JP 16739396 A JP16739396 A JP 16739396A JP 16739396 A JP16739396 A JP 16739396A JP H1012794 A JPH1012794 A JP H1012794A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- lead
- package
- folded part
- island
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置に使用
するリードフレームに関する。The present invention relates to a lead frame used for a semiconductor device.
【０００２】[0002]
【従来の技術】従来の半導体装置用リードフレームは、
図２（ａ），（ｂ）の平面図、断面図に示す様に、半導
体素子を搭載するアイランド４とそのアイランド４をリ
ードフレーム１の外枠で保持する吊りリード２と半導体
素子の電極パッドとボンディングワイヤを接続するため
のインナーリード５とから構成されている。また、吊り
リード２には、樹脂封止性及びパッケージ反りを防止す
るために曲げ加工を施した吊りリード屈折部３が設けら
れている。2. Description of the Related Art Conventional lead frames for semiconductor devices are:
2A and 2B, an island 4 on which a semiconductor element is mounted, a suspension lead 2 for holding the island 4 by an outer frame of a lead frame 1, and an electrode pad of the semiconductor element. And an inner lead 5 for connecting a bonding wire. Further, the suspension lead 2 is provided with a suspension lead bending portion 3 which has been subjected to a bending process in order to prevent resin sealing and package warpage.
【０００３】図２（ｃ）〜（ｆ）は従来のリードフレー
ムに半導体素子を搭載する工程の断面図を示している。
屈折部３を設けた吊りリード２によって保持されるアイ
ランド４に半導体素子６を搭載し（図２（ｃ））、その
半導体素子６の電極パッドとインナーリード５とを、ボ
ンディングワイヤ７によって接続し（図２（ｄ））、封
止樹脂８により封止を行う（図２（ｅ））（特開昭６２
−２５４４５７参照）。FIGS. 2C to 2F are cross-sectional views showing a process of mounting a semiconductor element on a conventional lead frame.
The semiconductor element 6 is mounted on the island 4 held by the suspension lead 2 provided with the bending portion 3 (FIG. 2C), and the electrode pad of the semiconductor element 6 and the inner lead 5 are connected by a bonding wire 7. (FIG. 2D), sealing is performed with a sealing resin 8 (FIG. 2E)
-254457).
【０００４】この従来のリードフレームでは、屈折部３
がパッケージの内側に設けられているため、リードフレ
ーム製造時に曲げ加工を施した屈折部３の残留応力によ
り、図２（ｆ）で示す様に樹脂封止後にパッケージが反
るという問題があった。In this conventional lead frame, the bending portion 3
Is provided inside the package, so that there is a problem that the package warps after resin sealing as shown in FIG. .
【０００５】[0005]
【発明が解決しようとする課題】従来のリードフレーム
においては、樹脂封止後にパッケージが反るという問題
点がある。その理由は、吊りリード屈折部がパッケージ
の内側に設けられているため、リードフレーム製造時、
曲げ加工を施した屈折部の残留応力が樹脂封止直後、内
部構造物が収縮する際にパッケージ反りを発生させるか
らである。The conventional lead frame has a problem that the package warps after resin sealing. The reason is that the suspension lead bending part is provided inside the package, so when manufacturing the lead frame,
This is because the residual stress in the bent bent portion causes package warpage when the internal structure contracts immediately after resin sealing.
【０００６】本発明の目的は、パッケージ反りを防止
し、後工程であるリード成形時の外形寸法精度を向上し
得る半導体装置用リードフレームを提供することであ
る。SUMMARY OF THE INVENTION An object of the present invention is to provide a lead frame for a semiconductor device which can prevent package warpage and improve the external dimensional accuracy at the time of lead forming as a subsequent process.
【０００７】[0007]
【課題を解決するための手段】本発明は、吊りリードを
有する半導体装置用リードフレームにおいて、吊りリー
ドの屈折部分位置をパッケージの外側に設けたことを特
徴とする。これによりリードフレーム製造時屈折部に生
じる残留応力により樹脂封止後パッケージが反るのを防
止できる。According to the present invention, in a lead frame for a semiconductor device having suspension leads, a bending portion of the suspension lead is provided outside the package. Thereby, it is possible to prevent the package from warping after the resin sealing due to the residual stress generated in the bending portion at the time of manufacturing the lead frame.
【０００８】[0008]
【発明の実施の形態】次に、本発明の実施の形態につい
て図面を参照して詳細に説明する。図１（ａ），（ｂ）
は本発明のリードフレームの実施の形態を示した平面図
と断面図である。本発明のリードフレームでは、半導体
素子を搭載するアイランド４をリードフレーム１の外枠
に保持する吊りリード２の屈折部３をパッケージの外側
に設けている。Next, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 (a), (b)
FIG. 1 is a plan view and a sectional view showing an embodiment of a lead frame of the present invention. In the lead frame of the present invention, the bending portion 3 of the suspension lead 2 for holding the island 4 on which the semiconductor element is mounted on the outer frame of the lead frame 1 is provided outside the package.
【０００９】図１（ｃ）〜（ｅ）は、本発明のリードフ
レームに半導体素子を搭載する工程を示す断面図であ
る。半導体素子を搭載するアイランド４のリードフレー
ム１の外枠に保持する吊りリード２の屈折部３は、パッ
ケージの外側に設けられている。図１（ｃ）に示すよう
に、リードフレーム１のアイランド４に半導体素子６を
マウントする。つぎに、図１（ｄ）に示すように半導体
素子６の電極パッドとインナーリード５をボンディング
ワイヤ７によって接続する。そして最後に図１（ｅ）に
示すように、封止樹脂８によって封止を行う。FIGS. 1C to 1E are cross-sectional views showing steps of mounting a semiconductor element on a lead frame of the present invention. The bending portion 3 of the suspension lead 2 held on the outer frame of the lead frame 1 of the island 4 on which the semiconductor element is mounted is provided outside the package. As shown in FIG. 1C, the semiconductor element 6 is mounted on the island 4 of the lead frame 1. Next, as shown in FIG. 1D, the electrode pads of the semiconductor element 6 and the inner leads 5 are connected by bonding wires 7. Finally, as shown in FIG. 1E, sealing is performed with a sealing resin 8.
【００１０】本発明のリードフレームでは、吊りリード
の屈折部３の位置がパッケージの外側であり、リードフ
レーム製造時、曲げ加工を施した屈折部３の残留応力に
より、樹脂封止後内部構造物が収縮する際にパッケージ
反りが発生することがない。In the lead frame of the present invention, the position of the bending portion 3 of the suspension lead is outside the package, and the internal structure after resin sealing is produced by the residual stress of the bent bending portion 3 during the manufacture of the lead frame. The package does not warp when shrinking.
【００１１】[0011]
【発明の効果】本発明の効果は、樹脂封止後にパッケー
ジが反らないため、後工程のリード成形において外形寸
法精度を構造することができることである。その理由
は、吊りリードの屈折部をパッケージの外側に設けてい
るため、リードフレーム製造時曲げ加工を施した屈折部
分の残留応力の影響を受けないからである。The effect of the present invention is that since the package does not warp after resin sealing, the external dimension accuracy can be structured in lead forming in a later step. The reason is that since the bending portion of the suspension lead is provided outside the package, it is not affected by the residual stress of the bending portion that has been bent at the time of manufacturing the lead frame.
【図１】（ａ）〜（ｅ）は、本発明のリードフレームの
一実施の形態を示す平面図、断面図、工程断面図であ
る。FIGS. 1A to 1E are a plan view, a sectional view, and a process sectional view showing an embodiment of a lead frame of the present invention.
【図２】（ａ）〜（ｆ）は、従来のリードフレームの平
面図、断面図、工程断面図である。FIGS. 2A to 2F are a plan view, a cross-sectional view, and a process cross-sectional view of a conventional lead frame.
１ リードフレーム ２ 吊りリード ３ 吊りリードの屈折部 ４ アイランド ５ インナーリード ６ 半導体素子 ７ ボンディングワイヤ ８ 封止樹脂 DESCRIPTION OF SYMBOLS 1 Lead frame 2 Suspension lead 3 Refraction part of suspension lead 4 Island 5 Inner lead 6 Semiconductor element 7 Bonding wire 8 Sealing resin
Claims (1)
吊りリード屈折部分（半導体素子を搭載するアイランド
とリードフレーム外枠と保持するための吊りリードに曲
げ加工を施した部分）を、パッケージの外側に設けたこ
とを特徴とする半導体装置用リードフレーム。In a lead frame for a semiconductor device,
A lead frame for a semiconductor device, wherein a suspension lead bending portion (a portion where a suspension lead for holding a semiconductor element mounting island and a lead frame outer frame is bent) is provided outside a package.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16739396A JPH1012794A (en) | 1996-06-27 | 1996-06-27 | Lead frame for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16739396A JPH1012794A (en) | 1996-06-27 | 1996-06-27 | Lead frame for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH1012794A true JPH1012794A (en) | 1998-01-16 |
Family
ID=15848875
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16739396A Pending JPH1012794A (en) | 1996-06-27 | 1996-06-27 | Lead frame for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH1012794A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0233961A (en) * | 1988-07-23 | 1990-02-05 | Nec Corp | Lead frame |
| JPH07202106A (en) * | 1993-12-29 | 1995-08-04 | Mitsubishi Electric Corp | Semiconductor device and its manufacturing device |
-
1996
- 1996-06-27 JP JP16739396A patent/JPH1012794A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0233961A (en) * | 1988-07-23 | 1990-02-05 | Nec Corp | Lead frame |
| JPH07202106A (en) * | 1993-12-29 | 1995-08-04 | Mitsubishi Electric Corp | Semiconductor device and its manufacturing device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19980721 |