JPH10116201A - Interrupt request signal control circuit, and interrupt mask circuit used for the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To change maps after a computer was actuated by providing a means which prevents interruption request misrecognition by an interrupt control circuit when the interrupt request level of peripheral equipment is changed. SOLUTION: The state wherein the interrupt signal I1 of peripheral equipment 5 is mapped on the interrupt level 1 of a programmable interrupt controller 3 is supposed. Namely, the interrupt signal of the peripheral equipment 5 is mapped to the level 1 of the programmable interrupt controller 3 in the route of the signals I1, I2, and I21. At this time, an interrupt mask signal MO that a register group 4 controls is so set that the interruption of the peripheral equipment 5 is not impeded, and an interrupt level select signal S1 is so set as to route the signal I2 to the signal I21. Then when the peripheral equipment 5 is changed in map to the interrupt level 2, the map change is made in a period wherein the peripheral equipment 5 sends no interrupt request.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an interrupt request signal control circuit, and more particularly to a map change control circuit for an interrupt request signal connected to an interrupt control circuit provided in a computer.

[0002]

2. Description of the Related Art In general, a processor mounted on a computer has only one interrupt input terminal. Therefore, it is necessary to mount a circuit called a programmable interrupt controller to control a plurality of peripheral devices. The peripheral devices are connected to the appropriate interrupt level of the programmable interrupt controller, and the programmable interrupt controller performs the processing according to the specified priority for the interrupt request from each peripheral device. Issues an interrupt request.

[0003] Such a programmable interrupt
As a controller, a conventional Intel i8259
A or a circuit having the same function is widely used.

[0004] The i8259A recognizes an interrupt request from a peripheral device, triggered by a rising edge when an interrupt request signal from the peripheral device transitions from low to high. On the other hand, the method of operating the interrupt signal for the peripheral device to make the a8259A recognize the interrupt is roughly divided into two.
Exists. Here, for convenience, they are referred to as "A type" and "Otsu type".

Type A: An interrupt request signal is set to H during normal times when no peripheral device requests an interrupt to the i8259A.
high, a low pulse is generated when an interrupt is requested, and a low to high transition occurs at the trailing edge of the pulse.
A type in which the transition to h is a trigger to i8259A.

[0006] In the normal case where the peripheral device does not issue an interrupt request to the i8259A, the interrupt request signal is set to L.
ow, High drive when requesting an interrupt, and using the transition as a trigger for i8259A.

[0007]

While the number of interrupt request signals that can be handled by the conventional interrupt request signal control device i8259A is limited, the number of peripheral devices built in or connected to the computer increases. There is a tendency for the resources of the interrupt level to be in short supply.Some peripheral devices have several interrupt levels as options, and select them at startup to measure the effective use of resources, From the circuit characteristics of the i8259A, it is problematic to change the interrupt level after starting once.

[0008] That is, the peripheral device assigned to a certain interrupt level is set to a normal interrupt request signal value of L.
When the value of the interrupt request signal in the normal state is switched from the type B peripheral device that is ow to the type A peripheral device in which the interrupt request signal is high in the normal state, the interrupt request signal of that level has changed from low to high for the i8259A. Since they are equivalent, i825 is used in spite of the fact that neither the first assigned peripheral device nor the first assigned second party peripheral device actually issues an interrupt request.
9A has a problem in that it recognizes that an interrupt request has been issued from a peripheral device of the relevant level.

[0009] An object of the present invention is to solve the above-mentioned problem and to make it possible to change the interrupt level of a peripheral device even after activation.

[0010]

SUMMARY OF THE INVENTION An interrupt request signal control circuit according to the present invention has an interrupt mask circuit having a function of preventing an interrupt request from a peripheral device from being propagated to the interrupt control circuit, and a peripheral device having passed through the interrupt mask circuit. The interrupt request signal routing circuit that assigns the interrupt request signal to any interrupt request level of the interrupt control circuit, and when changing the interrupt request level of peripheral devices,
It is characterized in that there is provided means for preventing the interrupt control circuit from erroneously recognizing an interrupt request by using the above circuit.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention.
The interrupt signal control circuit includes an interrupt mask circuit 1;
Interrupt request signal routing circuit 2, i8259A
, A register group 4 and signal lines I1,
I2, I21, I22, S1, and M0. PI
Terminals L1 and L2 of C1 are interrupt request signal input terminals for interrupt levels 1 and 2, respectively.

In the circuit having the above configuration, the interrupt request signal of the peripheral device 5 for performing the above-mentioned instep type interrupt request control is I1
Connected as. The logic of the interrupt mask circuit 1 is as follows. The condition in which the interrupt mask circuit 1 masks the signal propagation on the path from I1 to I2 Mask start condition: Mask instruction assertion by signal M0 from register group 4 Mask release condition: Mask instruction deassertion by signal M0 from register group 4 Thereafter, the peripheral device 5 requests an interrupt. I2 value Mask period: Low mask release period: the same as the value of I1 regardless of the value of I1 An example of a circuit that realizes this logic is shown in FIG. In FIG. 2, reference numeral 6 denotes a flip-flop with a reset, and an input port is pre-upped to a power supply. Reference numeral 7 denotes a two-input AND gate that receives the output Q of the flip-flop 6 and a clock.

Hereinafter, a map change procedure of the interrupt request signal will be described. First, it is assumed that the interrupt signal I1 of the peripheral device 5 is mapped to the interrupt level 1 of the programmable interrupt controller 3. That is, the interrupt request of the peripheral device 5 is I1 → I2 → I21
Is mapped to the level 1 of the programmable interrupt controller 3 through the path of FIG. At this time, the interrupt mask signal M0 controlled by the register group 4 is
The interrupt level selection signal S1 is set so as to route the signal I2 to the signal I21.

Next, a procedure for map-changing the peripheral device 5 to the interrupt level 2 is assumed. The map change is performed during a period when the peripheral device 5 does not issue an interrupt request.

(1) The register group 4 is operated to control the signal M0 to assert a mask instruction to the interrupt mask circuit 1,
The propagation of the interrupt request on the path from I1 to I2 is masked.
As a result, the value of I2 becomes Low.

By omitting this process and simply routing the signal I2 to I22 by manipulating the signal S1, the peripheral device 5 is a type-A peripheral device, so that the value of I22 before the routing change is Low. In this case, the imaginary interrupt request that has not actually been issued is recognized by the programmable interrupt controller 3.

(2) By operating the register group 4 to control the signal S1, the routing set as I2 → I21 is changed to I2
Change from 2 to I22.

(3) By operating the register group 4 to control the signal M0, the mask instruction for the interrupt mask circuit 1 is deasserted. However, at this point, since the mask release condition has not yet been satisfied, the mask is applied, and the value of I2 remains Low as before. Therefore, the value of I22 after the map change is also Low, and the map change is completed without the interrupt request signal to the programmable interrupt controller 3 transitioning from Low to High.

(4) After the mask instruction from the register group 4 is deasserted, when the first interrupt request is issued from the peripheral device 5, the mask release condition is satisfied and I1 is maintained until the register group 4 issues the mask instruction again. The interrupt request signal of the peripheral device 5 is propagated to the programmable interrupt controller 3 through the route of → I2 → I22.

It should be noted that I1 changes from Low to High in response to an interrupt request from the peripheral device 5 that triggers the mask release, so that the value of I during the interrupt mask period is low.
2 also becomes a High value after the mask is released, and I2 is also Lo.
A transition from w to High occurs. Therefore, the interrupt request signal that triggered the release of the mask of the interrupt request signal is not missed.

[0022]

As described above, according to the present invention, even when the map change of the interrupt request signal is performed, the value does not transition from Low to High at the input terminal of the interrupt request signal of the programmable interrupt controller. Programmable
The interrupt controller does not mistakenly recognize the interrupt request signal.

Therefore, in addition to the map change before and at the time of starting the computer, which has been conventionally possible, there is an effect that the map can be changed even after the computer is started.

[0024] As a result, the user of the computer can allocate necessary peripheral devices to the interrupt request level of the programmable interrupt controller for a necessary period and use the interrupt request level, which is a finite resource. Can be used effectively.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of an interrupt request signal control circuit according to the present invention.

FIG. 2 is a diagram illustrating a configuration example of an interrupt mask circuit used in FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Interrupt mask circuit 2 Interrupt request signal routing circuit 3 Programmable interrupt controller 4 Register group 5 Peripheral device 6 Flip-flop with reset 7 2-input AND gate

Claims (4)

[Claims] 1. A mask state for masking an interrupt request signal at the time of a map change of an interrupt request signal which may have a different standby level of an interrupt request signal given from a peripheral device. An interrupt mask circuit that releases the mask state based on an interrupt request signal newly supplied by control and passes the newly supplied interrupt request signal; and an interrupt request level from the peripheral device. An interrupt control circuit that performs a process according to a specified priority and issues an interrupt request to a processor; and allocates an interrupt request signal from the peripheral device through the interrupt mask circuit to an arbitrary interrupt request level of the interrupt control circuit. And an interrupt request signal routing circuit. Request signal control circuit. 2. The interrupt mask circuit according to claim 1, wherein the interrupt request signal is supplied to a clock input terminal, a high level is supplied to a data input terminal, and a signal indicating the map change and its end is supplied to a reset terminal. 2. The interrupt request signal control circuit according to claim 1, further comprising: a flip-flop to which the interrupt request signal is supplied, and an AND gate to which the output of the flip-flop and the interrupt request signal are supplied. 3. A mask state for masking an interrupt request signal at the time of a map change of an interrupt request signal which may have a different standby level of an interrupt request signal given from a peripheral device. An interrupt mask circuit that releases the mask state based on an interrupt request signal newly supplied by control and passes the newly supplied interrupt request signal. 4. A flip-flop to which the interrupt request signal is supplied to its clock input terminal, a high level is supplied to its data input terminal, and a signal indicating the map change and its end is supplied to its reset terminal. And an AND gate to which the output of the flip-flop and the interrupt request signal are supplied.
2. The interrupt mask circuit according to 1.