JPH1010494A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device which has a high anti-static effect in a liquid crystal display device of horizontal electric field mode by forming an anti-static circuit which absorbs static electricity promptly. SOLUTION: This device changes the optical transmittance of a liquid crystal layer by an electric field component generated roughly parallelly to an active matrix substrate between a pixel electrode PX formed for each pixel PE and the counter electrode CT on the acive matrix substrate. In this case, a common connecting line CLC which is placed outside the display region and electrically connects each counter electrode connecting line CL connecting counter electrodes CT and a frame-shaped shortcircuit line SB which connects each scan signal line GL and each video signal line DL respectively through non-linear resistance element NR are formed on the above surface and the shortcircuit line SB is electrically connected to the common connecting line CLC.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix driving type liquid crystal display device, and more particularly to a structure of an electrostatic protection circuit in a horizontal electric field type liquid crystal display device.

[0002]

2. Description of the Related Art For example, a liquid crystal display element of an active matrix type liquid crystal display device (ie, a liquid crystal display panel).
In one of the two liquid crystal display substrates made of glass or the like which are arranged to face each other with a liquid crystal layer interposed therebetween, one of the glass substrates extends in the x direction on the surface on the liquid crystal layer side and is aligned in the y direction. A scanning signal line group to be provided and a video signal line group extending in the y direction while being insulated from the scanning signal line group are formed in parallel in the x direction.

Each region surrounded by the scanning signal line group and the video signal line group is a pixel region, and a thin film transistor (TFT) and a transparent pixel electrode are formed as switching elements in the pixel region. In addition,
The gate electrode of the thin film transistor is connected to a scanning signal line, the drain electrode is connected to a video signal line, and the source electrode is connected to a transparent pixel electrode.

In such a configuration, when a scanning signal is supplied to the scanning signal line, the thin film transistor is turned on, and a video signal from the video signal line is supplied to the pixel electrode via the turned on thin film transistor.

[0005] Each of the scanning signal lines of the scanning signal line group and each of the video signal lines of the video signal line group extend to the periphery of the liquid crystal display substrate to form external connection terminals.

In the manufacture of a liquid crystal display element, uneven display due to fluctuations in the threshold voltage _Vth of the thin film transistor due to static electricity generated inside the liquid crystal display element from the outside or static electricity generated inside the liquid crystal display element, and damage to the thin film transistor Also, there is a problem that a display failure or the like occurs due to a short circuit at an intersection between the scanning signal line and the video signal line via an insulating film.

Conventionally, a guard ring (short-circuit line) for countermeasures against static electricity is formed on the outermost periphery outside a cutting line of an active matrix substrate (also referred to as a TFT substrate) constituting a liquid crystal display element, and scanning is performed on the guard ring. In general, a method of avoiding the above problem by short-circuiting the signal line and the video signal line to reduce a potential difference generated inside the liquid crystal display element. However, after assembling the two substrates with a predetermined gap therebetween, and cutting the periphery of the TFT substrate along a cutting line, the guard ring outside the cutting line is cut off. After the liquid crystal encapsulation step, there is no defense against static electricity.

For this reason, in order to protect the liquid crystal display element from static electricity even after the guard ring is disconnected, the scanning signal line and the video signal line are connected to a two-terminal thin film transistor or a metal thin film transistor.
There has been proposed an electrostatic protection circuit that is electrically connected to a short-circuit line via a non-linear resistance element such as an insulator-metal diode.

For example, JP-A-63-85586 discloses
JP-A-63-106788, JP-A-63-220
No. 289 discloses a display area (that is, a pixel array).
A non-linear resistance element connected to the drain electrode or the source electrode by forming a contact hole in the gate insulating layer on the gate electrode of the thin film transistor, By inserting between the line and the short-circuit line, the potential difference between the scanning signal line and the video signal line due to static electricity generated during the manufacturing process of the liquid crystal display element is reduced, and destruction due to static electricity is avoided.

FIG. 17 is a schematic diagram showing a configuration example of a conventional electrostatic protection circuit in a later-described vertical electric field type liquid crystal display element.

PE is a pixel, GL is a scanning signal line (gate signal line or horizontal signal line), DL is a video signal line (drain signal line or vertical signal line), TFT is a thin film transistor, PX is a pixel electrode, and GTM is a scanning signal. An external connection terminal for connecting an external drive electric circuit to the line GL, DTM is an external connection terminal for connecting the external drive electric circuit to the video signal line DL, NR is a non-linear resistance element, SB is a short-circuit line, CT
M is a terminal connected to the common transparent pixel electrode on the color filter substrate side.

A thin film transistor TFT is provided as a switching element near each intersection of the scanning signal line GL and the video signal line DL, and a source electrode of the thin film transistor TFT is connected to a pixel electrode PX for applying an electric field to the liquid crystal. , Display pixels PE (1, 1) arranged two-dimensionally
(M, n). A short-circuit line SB formed between the external connection terminals GTM and DTM outside the display area formed by the intersection area of the scanning signal line GL and the video signal line DL.
And the nonlinear resistance element NR constitute an electrostatic protection circuit. That is, as shown in FIG. 17, each of the scanning signal lines GL and each of the video signal lines DL are, for example, a bidirectional diode formed by combining a pair of forward and reverse diodes composed of, for example, a two-terminal operation thin film transistor, or a MIM ( It is electrically connected to the short-circuit line SB via a non-linear resistance element NR composed of a (metal-insulator-metal) element or the like.
The short-circuit line SB is electrically connected to the common transparent pixel electrode on the color filter substrate side via the terminal CTM. With such a configuration, static electricity generated from entering the scanning signal line GL or the video signal line DL from the outside, or generated in the liquid crystal display element, is transmitted to the common transparent pixel electrode through the non-linear resistance element NR. , And the static electricity, that is, the electric charge, is quickly dispersed and absorbed, the voltage between the scanning signal line GL and the video signal line DL is relaxed, and the above-described destruction due to the static electricity is prevented.

The liquid crystal display devices are roughly classified into a "vertical electric field system" and a "lateral electric field system" when classified according to the driving mode of the liquid crystal.

In a vertical electric field type liquid crystal display device, a transparent substrate disposed opposite to each other with a liquid crystal layer interposed between a pixel electrode made of a transparent electrode and a region corresponding to a unit pixel on the liquid crystal layer side. Electrodes are provided to face each other, and light transmitted through the liquid crystal layer is modulated by an electric field generated perpendicularly to the transparent substrate between the pixel electrode and the common electrode.

On the other hand, an in-plane switching mode liquid crystal display device is a transparent substrate which is disposed to face each other via a liquid crystal layer.
A pixel electrode and a counter electrode are provided on an area surface corresponding to a unit pixel on one (or both) of the liquid crystal layers, and an electric field component generated substantially parallel to the transparent substrate between the pixel electrode and the counter electrode. This modulates light transmitted through the liquid crystal layer.

A liquid crystal display device of a horizontal electric field type (also called an in-plane switch type) differs from a liquid crystal display device of a vertical electric field type in that a clear image can be obtained even when observed from a large angle field of view on the display surface. It is recognizable and has come to be known as having excellent so-called angular visual field.

The liquid crystal display having such a configuration is described in detail in, for example, Japanese Patent Application Laid-Open No. Hei 6-160878.

[0018]

The in-plane switching mode liquid crystal display is characterized in that the electrodes (pixel electrode and counter electrode) for changing the optical characteristics of the liquid crystal are all formed in the active matrix substrate. is there. In other words, the horizontal electric field method employs a configuration in which there is no common transparent pixel electrode provided substantially on the front surface of the color filter substrate in the vertical electric field method. That is, in the configuration of the conventional electrostatic protection circuit illustrated in FIG.
The common transparent pixel electrode, which is the destination of the static electricity discharged to B and is provided on almost the entire surface of the color filter substrate, does not exist in the horizontal electric field method.

It is an object of the present invention to provide a liquid crystal display device of an in-plane switching mode, which newly secures a destination for absorbing static electricity discharged to a short-circuit line through a non-linear resistance element of an electrostatic protection circuit and strengthens measures for protecting the static electricity. It is to provide a liquid crystal display device which can perform the above.

[0020]

In order to solve the above-mentioned problems, the present invention provides a liquid crystal display device having a liquid crystal display device and a liquid crystal display device. A scanning signal line group extending in the x direction and juxtaposed in the y direction on the surface on the liquid crystal layer side, and extending in the y direction insulated from the scanning signal line group and juxtaposed in the x direction. A video signal line group is formed, a display area is formed by an area where the scanning signal line group and the video signal line group intersect, and a region surrounded by each scanning signal line and each video signal line is formed. , A switching element, a pixel electrode, and a counter electrode are respectively formed, and a connection line group extending in the x direction and juxtaposed in the y direction is formed on the surface, and a connection line group connecting the respective counter electrodes is formed. And an electric field component generated substantially parallel to the surface between the counter electrode and Wherein the liquid crystal display device that changes the light transmittance of the liquid crystal layer is disposed outside the display area, the respective scanning signal lines and the respective video signal lines I,
A short-circuit line electrically connected to each other via a non-linear resistance element is formed on the surface, and the short-circuit line and the connection line are electrically connected.

Further, each of the connection lines is electrically connected to a common connection line, and the common connection line and the short-circuit line are electrically connected.

Further, the connection line or the short-circuit line is electrically connected to an external electric circuit.

[0023] Further, y is arranged outside the display area, and y
A common connection line extending in the direction and electrically connecting the connection line group, and each of the scanning signal lines and each of the video signal lines are arranged outside the display area, and each of the scanning signal lines and the video signal lines is connected via a non-linear resistance element. An electrically connected short-circuit line is formed on the surface, and the short-circuit line is electrically connected to the common connection line.

Further, the short-circuit line is formed in a frame shape outside the display area, and the common connection line and a part of the short-circuit line are shared.

Further, the common connection line or the short-circuit line is electrically connected to an external electric circuit.

Further, each of the opposing electrodes extends in the y-direction from the connection line extending in the x-direction at a predetermined interval in parallel with the pixel electrodes.

Further, the short-circuit line is formed in a frame shape outside the display area.

Further, the invention is characterized in that the non-linear resistance element is constituted by two diodes in the forward direction and the reverse direction.

According to the present invention, in the lateral electric field type liquid crystal display device, in the liquid crystal display device of the horizontal electric field type, the static electricity discharged to the short-circuit line through the non-linear resistance element is absorbed by the connection line connecting the counter electrode or the common line of the connection line. A new connection line can be secured. Since the connection line or the common connection line connects a large number of opposed electrodes, it has a sufficient capacity to absorb static electricity. Therefore, it is possible to enhance measures for protecting against static electricity.

[0030]

Embodiments of the present invention will be described below with reference to the drawings. In the drawings described below,
Those having the same function are denoted by the same reference numerals, and their repeated description will be omitted.

<< Active Matrix Liquid Crystal Display Device >> An active matrix type color liquid crystal display device to which the present invention can be applied will be described below.

<< Planar Configuration of Matrix Section (Pixel Section) >> FIG. 4 is a plan view showing one pixel of an active matrix type color liquid crystal display device, a light shielding region of a black matrix BM, and its periphery.

As shown in FIG. 4, each pixel has a scanning signal line (gate signal line or horizontal signal line) GL, a counter voltage signal line (counter electrode line) CL, and two adjacent video signal lines (drain). The signal line or the vertical signal line) is arranged in an intersecting region with the DL (in a region surrounded by four signal lines). Each pixel is a thin film transistor TFT, a storage capacitor Cst
g, the pixel electrode PX and the counter electrode CT. The scanning signal lines GL and the counter voltage signal lines CL extend in the left-right direction in FIG. Video signal line DL
Extend in the up-down direction and are arranged in a plurality in the left-right direction. The pixel electrode PX is connected to the thin film transistor TFT, and the counter electrode CT is integrated with the counter voltage signal line CL.

The pixel electrode PX and the counter electrode CT are opposed to each other, and the alignment state of the liquid crystal LC is controlled by an electric field between each pixel electrode PX and the counter electrode CT, and the transmitted light is modulated to control the display. The pixel electrode PX and the counter electrode CT are formed in a comb shape, and each is an electrode that is elongated in the vertical direction in the figure.

The number O (number of comb teeth) of the counter electrode CT in one pixel is equal to the number P (number of comb teeth) of the pixel electrode PX and O =
It is configured to always have a relationship of P + 1 (in this example, O
= 2, P = 1). This is because the counter electrode CT and the pixel electrode PX
Are alternately arranged, and the counter electrode CT is connected to the video signal line DL.
In order to make it always adjacent to Thereby, the counter electrode C
The electric field lines from the video signal line DL can be shielded by the counter electrode CT so that the electric field between T and the pixel electrode PX is not affected by the electric field generated from the video signal line DL. The potential of the counter electrode CT is stable because the potential is always supplied from the outside by the counter voltage signal line CL. Therefore, there is almost no change in potential even adjacent to the video signal line DL. Further, as a result, the geometric position of the pixel electrode PX from the video signal line DL becomes farther,
The parasitic capacitance between the pixel electrode PX and the video signal line DL is greatly reduced, and the fluctuation of the pixel electrode potential Vs due to the video signal voltage can be suppressed. Thus, crosstalk (defective image quality called vertical smear) occurring in the vertical direction can be suppressed.

The electrode width W between the pixel electrode PX and the counter electrode CT
Each of p and Wc is set to 6 μm, which is set sufficiently larger than 4.5 μm which exceeds the maximum set thickness of the liquid crystal layer described later.
It is preferable to have a margin of 20% or more in consideration of processing variations in manufacturing.
It is better to make it bigger than it is. Thus, the electric field component applied to the liquid crystal layer parallel to the substrate surface becomes larger than the electric field component in the direction perpendicular to the substrate surface, so that an increase in the voltage for driving the liquid crystal can be suppressed. Further, it is preferable that the maximum value of the electrode widths Wp and Wc of each electrode is smaller than the distance L between the pixel electrode PX and the counter electrode CT. This is because if the distance between the electrodes is too much or you like it, the line of electric force will be more curved,
This is because the region where the electric field component perpendicular to the substrate surface is larger than the electric field component parallel to the substrate surface is increased, so that the electric field component parallel to the substrate surface cannot be efficiently applied to the liquid crystal layer. Therefore, the interval L between the pixel electrode PX and the counter electrode CT needs to be larger than 7.2 μm when the margin is 20%. In this example, the pixel pitch is about 60 μm because the resolution is about 5.7 inches diagonal and 640 × 480 dots.
By dividing the pixel into two, the interval L> 7.
2 μm was realized. The electrode width of the video signal line DL is set to 8 μm, which is slightly wider than the pixel electrode PX and the counter electrode CT in order to prevent disconnection, and the interval between the video signal line DL and the counter electrode CT is to prevent short circuit. At an interval of about 1 μm, and a video signal line DL on the upper side of the gate insulating film.
Are formed on the lower side to form a counter electrode CT and are arranged in different layers.

On the other hand, the electrode interval between the pixel electrode PX and the counter electrode CT changes depending on the liquid crystal material used. this is,
Since the electric field strength that achieves the maximum transmittance varies depending on the liquid crystal material, the electrode spacing is set according to the liquid crystal material, and within the range of the maximum amplitude of the signal voltage set by the withstand voltage of the video signal driving circuit (signal side driver) used. , So that the maximum transmittance can be obtained. When a liquid crystal material described later is used, the electrode interval is about 15 μm.

In this example, the black matrix BM is formed on the gate line GL, the thin film transistor TFT,
On the drain wiring DL, the drain wiring DL and the counter electrode CT
Formed between them.

<< Cross-Sectional Structure of Matrix (Pixel) >> FIG. 6 shows a thin film transistor TF taken along section line 4-4 in FIG.
FIG. 7 is a cross-sectional view of the storage capacitor Cstg along the line 5-5 in FIG. FIG. 11 shows a cross-sectional view near the electrode of one pixel and a cross-sectional view around the substrate in the image display area of the liquid crystal display substrate of the horizontal electric field type. As shown in FIG. 11, the lower transparent glass substrate S
On the UB1 side, a thin film transistor TFT, a storage capacitor Cstg
(Not shown) and an electrode group CT, PX are formed, and a color filter FIL,
A light-shielding black matrix pattern BM is formed. Although not known, it is also possible to form the light-shielding black matrix pattern BM on the lower transparent glass substrate SUB1 side according to Japanese Patent Application No. 7-198349 filed by the same applicant.

Further, transparent glass substrates SUB1, SUB2
Are provided with alignment films ORI1 and ORI2 for controlling the initial alignment of the liquid crystal on the inner surface of each (liquid crystal LC side), and the polarizing axes are provided on the outer surfaces of the transparent glass substrates SUB1 and SUB2. Polarizing plates POL1 and POL2 arranged orthogonally (crossed Nicols arrangement) are provided.

<< TFT Substrate >> First, the configuration of the lower transparent glass substrate SUB1 side (TFT substrate, ie, active matrix substrate) will be described in detail.

<< Thin Film Transistor >> The thin film transistor TFT operates so that the channel resistance between the source and the drain is reduced when a positive bias is applied to the gate electrode GT, and the channel resistance is increased when the bias is zero.

As shown in FIG. 6, the thin-film transistor TFT has a gate electrode GT, a gate insulating film GI, and an i-type (intrinsic, intrinsic, not doped with conductivity-determining impurities) amorphous silicon (Si). Type semiconductor layer A
S, a pair of source electrode SD1 and drain electrode SD2. It should be understood that the source and the drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarity is inverted during the operation, so that the source and the drain are interchanged during the operation. However, in the following description, one is fixed and the other is fixed as a drain for convenience.

<< Gate Electrode GT >> The gate electrode GT is formed continuously with the scanning signal line GL.
Is configured to be a gate electrode GT. The gate electrode GT is a portion exceeding the active region of the thin film transistor TFT, and is formed to be larger (as viewed from below) so as to completely cover the i-type semiconductor layer AS. Thereby, in addition to the role of the gate electrode GT, a device is devised so that external light and backlight do not hit the i-type semiconductor layer AS. In this example, the gate electrode GT is formed of a single-layer conductive film g1. As the conductive film g1, for example, an aluminum (Al) film formed by sputtering is used, and an anodic oxide film AOF of Al is provided thereon.

<< Scanning Signal Line GL >> The scanning signal line GL is formed of the conductive film g1. The conductive film g1 of the scanning signal line GL is formed in the same manufacturing process as the conductive film g1 of the gate electrode GT, and is integrally formed. This scanning signal line G
L, the gate voltage Vg is applied from an external circuit to the gate electrode G.
Supply to T. An anodic oxide film AOF of Al is also provided on the scanning signal line GL. Note that the video signal line DL
The portion that intersects with the video signal line DL is made thin in order to reduce the probability of short-circuiting with the video signal line DL, and is made bifurcated so that even if it is short-circuited, it can be separated by laser trimming.

<< Counter Electrode CT >> The counter electrode CT is formed of a conductive film g1 in the same layer as the gate electrode GT and the scanning signal line GL. An Al anodic oxide film AOF is also provided on the counter electrode CT. Since the counter electrode CT is completely covered with the anodic oxide film AOF, even if the counter electrode CT is brought as close as possible to the video signal line, they are not short-circuited. Further, they may be configured to cross each other. The counter electrode CT is configured to apply a counter voltage Vcom. In this example, the counter voltage Vcom is the minimum level of the drive voltage Vdmin applied to the video signal line DL.
Is set to a potential lower than the intermediate DC potential between the maximum driving voltage Vdmax and the maximum level by a feedthrough voltage ΔVs generated when the thin film transistor element TFT is turned off. When it is desired to reduce the power supply voltage of the circuit by about half, an AC voltage may be applied.

<< Counter Voltage Signal Line CL >> Counter Voltage Signal Line C
L is composed of the conductive film g1. The conductive film g1 of the counter voltage signal line CL is formed in the same manufacturing process as the conductive film g1 of the gate electrode GT, the scanning signal line GL, and the counter electrode CT, and is formed integrally with the counter electrode CT. The opposing voltage signal line CL allows the opposing voltage Vcom
Is supplied to the counter electrode CT. Also, the counter voltage signal line CL
An anodic oxide film AOF of Al is also provided thereon. The portion that intersects with the video signal line DL is the scanning signal line GL.
In the same manner as described above, the width may be reduced in order to reduce the probability of short-circuiting with the video signal line DL, or it may be made bifurcated so that even if short-circuited, it can be separated by laser trimming.

<< Insulating Film GI >> The insulating film GI is used as a gate insulating film for applying an electric field to the semiconductor layer AS together with the gate electrode GT in the thin film transistor TFT. The insulating film GI includes the gate electrode GT and the scanning signal line GL.
Is formed in the upper layer. As the insulating film GI, for example, a silicon nitride film formed by plasma CVD is selected.
It is formed to a thickness of about 200 to 2700 ° (about 2400 ° in this example). The gate insulating film GI has a matrix portion A
R is formed so as to surround the entirety of R, and the peripheral portion is removed so as to expose the external connection terminals DTM and GTM. The insulating film GI also contributes to electrical insulation between the scanning signal line GL and the counter voltage signal line CL and the video signal line DL.

<< i-type semiconductor layer AS >> i-type semiconductor layer AS
Is amorphous silicon and is formed to a thickness of 200 to 2200 ° (in this example, a film thickness of about 2000 °). The layer d0 is an N ⁺ -type amorphous silicon semiconductor layer doped with phosphorus (P) for ohmic contact, where the i-type semiconductor layer AS is present on the lower side and the conductive layer d1 (d2) is present on the upper side. Only left.

The i-type semiconductor layer AS is also provided between the scanning signal line GL and the intersection (crossover portion) between the counter voltage signal line CL and the video signal line DL. The i-type semiconductor layer AS at the intersection reduces a short circuit between the scanning signal line GL and the counter voltage signal line CL and the video signal line DL at the intersection.

<< Source electrode SD1, Drain electrode SD
2 >> Each of the source electrode SD1 and the drain electrode SD2 is composed of a conductive film d1 in contact with the N ⁺ type semiconductor layer d0 and a conductive film d2 formed thereon. As the conductive film d1, a chromium (Cr) film formed by sputtering is used.
To a thickness of 00 to 1000 mm (about 600 mm in this example)
Is formed. Since the stress increases when the Cr film is formed to have a large thickness, the Cr film is formed within a range not exceeding about 2000 °. Cr film was good adhesion between the N ⁺ -type semiconductor layer d0, Al of the conductive film d2 is prevented from diffusing into the N ⁺ -type semiconductor layer d0 (so-called barrier layer) is used for the purpose. As the conductive film d1, a refractory metal (Mo, Ti, Ta, W) film or a refractory metal silicide (MoSi ₂ , TiSi ₂ , TaSi ₂ , WSi ₂ ) film may be used in addition to the Cr film.

The conductive film d2 has a thickness of 30
It is formed to a thickness of about 00 to 5000 (in this example, about 4000). The Al film has a smaller stress than the Cr film and can be formed to have a large thickness.
It functions to reduce the resistance values of D1, the drain electrode SD2, and the video signal line DL, and to ensure that the gate electrode GT and the i-type semiconductor layer AS cross over a step (to improve the step coverage).

After patterning the conductive films d1 and d2 with the same mask pattern, the N ⁺ type semiconductor layer d0 is removed using the same mask or using the conductive films d1 and d2 as a mask. That is, in the N ⁺ -type semiconductor layer d0 remaining on the i-type semiconductor layer AS, portions other than the conductive films d1 and d2 are removed by self-alignment. At this time, since the N ⁺ -type semiconductor layer d0 is etched so as to remove the entire thickness thereof, the surface of the i-type semiconductor layer AS is also slightly etched, but the degree is controlled by the etching time. Good.

<< Video Signal Line DL >> The video signal line DL is composed of the second conductive film d2 and the third conductive film d3 in the same layer as the source electrode SD1 and the drain electrode SD2. The video signal line DL is formed integrally with the drain electrode SD2.

<< Pixel Electrode PX >> The pixel electrode PX is a second conductive film d of the same layer as the source electrode SD1 and the drain electrode SD2.
2, the third conductive film d3. Further, the pixel electrode PX is formed integrally with the source electrode SD1.

<< Storage Capacitor Cstg >> The pixel electrode PX is formed so as to overlap the counter voltage signal line CL at the end opposite to the end connected to the thin film transistor TFT. This superposition is apparent from FIG.
The pixel electrode PX is used as one electrode PL2, and the counter voltage signal C
Storage capacitance (capacitance element) where L is the other electrode PL1
Construct Cstg. The dielectric film of the storage capacitor Cstg includes an insulating film GI used as a gate insulating film of the thin film transistor TFT and an anodic oxide film AOF.

As shown in FIG. 4, the storage capacitance Cst
g is formed in the conductive film g1 of the counter voltage signal line CL.

In this case, the storage capacitor Cstg is such that the material of the electrode positioned below the insulating film GI is A
1 and the surface thereof is anodized, so that the storage capacitance which makes it difficult to cause adverse effects due to point defects (short-circuit with the electrode positioned on the upper side) caused by so-called whiskers of Al or the like. Obtainable.

<< Protective Film PSV1 >> Thin Film Transistor TF
On T, a protective film PSV1 is provided. Protective film PS
V1 is formed mainly to protect the thin film transistor TFT from moisture and the like, and uses a material having high transparency and good moisture resistance. The protective film PSV1 is formed of, for example, a silicon oxide film or a silicon nitride film formed by a plasma CVD apparatus, and has a thickness of about 5000 °.

The protective film PSV1 is formed so as to surround the whole of the matrix part AR, and the peripheral part is connected to the external connection terminal DT.
M and GTM have been removed to expose. Protective film PS
Regarding the thickness relationship between V1 and the gate insulating film GI, the former is made thicker in consideration of the protection effect, and the latter is made thinner in consideration of the transconductance gm of the transistor.

<< Color Filter Substrate >> Next, FIGS.
1, the configuration of the upper transparent glass substrate SUB2 side (color filter substrate) will be described in detail.

<< Light shielding film BM >> Upper transparent glass substrate SUB
On the second side, an unnecessary gap (pixel electrode PX and counter electrode CT)
Transmitted light from the gap other than the gap between
A light-shielding film BM (a so-called black matrix) is formed so as not to lower the contrast ratio and the like. Light shielding film B
M indicates that the external light or the backlight light is the i-type semiconductor layer AS
It also plays a role in preventing light from entering. That is, the i-type semiconductor layer AS of the thin film transistor TFT is sandwiched between the upper and lower light-shielding films BM and the large gate electrode GT, so that external natural light or backlight does not shine.

The closed polygonal outline of the light-shielding film BM shown in FIG. 4 indicates an opening in which the light-shielding film BM is not formed. This contour pattern is an example.

In a horizontal electric field type liquid crystal display device, a black matrix having the highest possible resistance is suitable.
Generally, a resin composition is used. For this resistance standard,
Although it is not publicly known, Japanese Patent Application No. 7-1919 filed by the same applicant
No. 94. In other words, if the specific resistance value of the liquid crystal composition material LC is 10 N raised to 10 N, then 10 NΩ · c
m or more, and the specific resistance of the black matrix BM is 10
If the M-th power is described as 10M, it is 10MΩ · cm or more,
In addition, it is assumed that the relationship satisfies N> 9 and M> 6. Alternatively, it is desirable that the relationship satisfy N> 13 and M> 7.

It is also desirable to use a resin composition for the black matrix for the purpose of reducing the surface reflection of the liquid crystal display device.

Further, as compared with the case where a metal film such as Cr is used for the black matrix, an etching process of the metal film is not required, so that the manufacturing process of the color filter substrate can be simplified. When a metal film is used, the manufacturing steps are: 1) metal film formation, 2) resist coating, 3) exposure, 4) development, 5)
Metal film etching, 6) resist stripping. on the other hand,
In the case of using a resin, the manufacturing steps are 1) resin application, 2)
Exposure and 3) development, which can significantly shorten the process.

However, the resin composition has a lower light-shielding property than the metal film. Increasing the thickness of the resin improves the light-shielding properties, but increases the variation in the thickness of the black matrix. This means that, for example, when there is a thickness variation of ± 10%, when the thickness of the black matrix is 1.0 μm, ± 0.1 μm,
This is because when it is 2 μm, it becomes ± 0.2 μm. Also, when the thickness of the black matrix is increased, the variation in the thickness of the color filter substrate increases, and it becomes difficult to improve the gap accuracy of the liquid crystal display substrate. For the above reasons, it is desirable that the thickness of the resin is 2 μm or less.

In order to increase the OD value to about 4.0 or more at a film thickness of 1 μm, for example, when blackening is performed by increasing the carbon content, the specific resistance of the black matrix BM is about 10 ⁶ Ω · cm or less and cannot be used at present. The OD value can be defined as a value obtained by multiplying the extinction coefficient by the film thickness.

For this reason, in this embodiment, the light shielding film BM
Is formed of a resin composition obtained by mixing a black inorganic pigment into a resist material, and is formed to a thickness of about 1.3 ± 0.1 μm. Examples of the inorganic pigment include palladium and electroless plated Ni. Further, the specific resistance of the black matrix BM was set to about 10 ⁹ Ω · cm, and the OD value was set to about 2.0.

The calculation results of the light transmission amount when this resin composition black matrix BM is used are shown below.

[0071]

OD value = log (100 / Y) Y = ∫A (λ) · B (λ) · C (λ) dλ / ∫A (λ)
C (λ) dλ Here, A is the visibility, B is the transmittance, C is the light source spectrum, and λ is the wavelength of the incident light.

When light is shielded by a film having an OD value of 2.0, Y = 1% is obtained from the above equation (1), and an incident light intensity of 4000 cd /
Assuming m ² , about 40 cd / m ² of light will be transmitted. This light intensity is sufficiently bright to be visually recognized by humans.

The light-shielding film BM is also formed in a frame shape in the peripheral portion, and its pattern is shown in FIG.
Are formed continuously with the pattern of the matrix section shown in FIG.

One of the objects of this embodiment is to define the position of the outer peripheral portion of the light-shielding film BM by the positional relationship with the seal portion SL, the polarizing plate POL, the opening WD of the module housing, and the like. .

<< Color Filter FIL >> The color filter FIL is formed in a stripe shape by repeating red, green and blue at a position facing the pixel. The color filter FIL is formed so as to overlap the edge portion of the light shielding film BM.

The color filter FIL can be formed as follows. First, a dye base such as an acrylic resin is formed on the surface of the upper transparent glass substrate SUB2, and the dye base other than the red filter formation region is removed by photolithography. Thereafter, the dyed substrate is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, a green filter G and a blue filter B are sequentially formed by performing a similar process.

<< Overcoat Film OC >> The overcoat film OC prevents the dye of the color filter FIL from leaking to the liquid crystal LC, and prevents the color filter FIL and the light-shielding film BM.
It is provided for flattening the step due to the above. The overcoat film OC is formed of a transparent resin material such as an acrylic resin and an epoxy resin.

<< Liquid Crystal Layer and Polarizing Plate >> Next, the liquid crystal layer, the alignment film, the polarizing plate and the like will be described.

<< Liquid Crystal Layer >> As the liquid crystal material LC, the dielectric anisotropy Δε is positive and the value is 13.2, and the refractive index anisotropy Δn
Is 0.081 (589 nm, 20 ° C.), a negative liquid crystal having a negative dielectric anisotropy Δε of -7.3 and a refractive index anisotropy Δn of 0.053 (589 nm, 20 ° C.). Was used. Liquid crystal layer thickness (gap)
Is more than 2.8 μm and 4.5 μm when the dielectric anisotropy Δε is positive.
m. This is because retardation △ n · d is 0.
When it is more than 25 μm and less than 0.32 μm, a transmittance characteristic having almost no wavelength dependence within a visible light range can be obtained, and most of the liquid crystal having a positive dielectric constant anisotropy has a birefringent anisotropy. n
Is more than 0.07 and less than 0.09. On the other hand, when the dielectric anisotropy Δε was negative, the thickness (gap) of the liquid crystal layer was set to more than 4.2 μm and less than 8.0 μm. This is because, like a liquid crystal having a positive dielectric anisotropy △ ε, a retardation △
In order to suppress n · d to more than 0.25 μm and less than 0.32 μm, most of the liquid crystal having a negative dielectric anisotropy Δ △ has a birefringence anisotropy Δn of more than 0.04 and less than 0.06. Because there is.

Further, by combining an alignment film and a polarizing plate, which will be described later, the liquid crystal molecules are shifted by 45 ° from the rubbing direction to the electric field direction.
The maximum transmittance can be obtained when rotated.

The thickness (gap) of the liquid crystal layer is controlled by polymer beads.

The liquid crystal material LC is not particularly limited as long as it is a nematic liquid crystal. The larger the value of the dielectric anisotropy Δ △, the lower the driving voltage. The smaller the refractive index anisotropy Δn is, the larger the thickness (gap) of the liquid crystal layer can be, the shorter the liquid crystal filling time can be, and the smaller the gap variation can be.

<< Orientation Film >> Polyimide is used as the orientation film ORI. The rubbing direction RDR is parallel to each other between the upper and lower substrates, and the angle Фlc between the rubbing direction RDR and the applied electric field direction EDR.
Is 75 °. FIG. 5 shows the relationship.

The angle between the rubbing direction RDR and the applied electric field direction EDR is 45 ° C. or more and less than 90 ° C. if the dielectric anisotropy Δ △ of the liquid crystal material is positive.
If the value is negative, it may be more than 0 ° and 45 ° or less.

<< Polarizing Plate >> As the polarizing plate POL, G1220DU manufactured by Nitto Denko Corporation was used, and the polarization transmission axis MAX1 of the lower polarizing plate POL1 was matched with the rubbing direction RDR.
The polarization transmission axis MAX2 of the upper deflection plate POL2 is made orthogonal to it. FIG. 5 shows the relationship. Thereby, the voltage applied to the pixel of the present invention (the pixel electrode PX and the counter electrode C
Normally closed characteristics in which the transmittance increases as the voltage (voltage during T) increases. Furthermore, in the liquid crystal display device referred to as the in-plane switching method disclosed in the present invention, display abnormalities occur when a high potential such as static electricity is applied from outside the surface on the upper substrate SUB2 side.
Therefore, a layer of a transparent conductive film having a sheet resistance of 1 × 10 ⁸ Ω / □ or less is formed further above or on the surface of the upper polarizing plate POL2, or a sheet resistance of 1 × 10 ⁸ Ω / □ is provided between the polarizing plate and the transparent substrate. Forming a layer of a transparent conductive film such as ITO of 10 ⁸ Ω / □ or less, or mixing conductive particles such as ITO, SnO ₂ , and In ₂ O _{3 with} the adhesive layer of the polarizing plate to reduce the sheet resistance to 1 It is necessary to be less than × 10 ⁸ Ω / □. Although this measure is not publicly known, Japanese Patent Application No. 7-264443 filed by the same applicant describes in detail the improvement of the shielding function.

<< Configuration around Matrix >> FIG. 12 shows a display panel PNL including upper and lower glass substrates SUB1 and SUB2.
FIG. 4 is a diagram showing a main part plane around a matrix (AR).

[0087] Any For this panel In the manufacture of, if small size divided from simultaneously processing a plurality fraction of the device in one glass substrate for increased throughput, manufacturing facilities if large size shared A glass substrate of a standardized size is processed even in a variety, and the size is reduced to a size suitable for each type. In each case, the glass is cut after passing through one process. FIG. 12 shows the latter example, and both figures in FIG. 12 show the upper and lower substrates SUB1 and SUB2 after cutting, and LN indicates the edge of both substrates before cutting.
In any case, in the completed state, the external connection terminal groups Tg, Tg
The size of the upper substrate SUB2 is limited to the inside of the lower substrate SUB1 so that the portions where the d and the terminal CTM are present (the upper side and the left side in the figure) are exposed. The terminal groups Tg and Td are respectively connected to a scanning circuit connection terminal G described later.
A plurality of TMs, video signal circuit connection terminals DTM, and their leading wiring portions are collectively named for the unit of the tape carrier package TCP on which the integrated circuit chip CHI is mounted. The lead wiring from the matrix section of each group to the external connection terminal section is inclined as approaching both ends. This is because the display panel P is set in the arrangement pitch of the package TCP and the connection terminal pitch in each package TCP.
This is for matching the terminals DTM and GTM of the NL. The counter electrode terminal CTM is a terminal for applying a counter voltage to the counter electrode CT from an external circuit. The counter electrode signal line CL of the matrix section is drawn out on the opposite side (right side in the figure) of the scanning circuit terminal GTM, and the respective counter voltage signal lines are grouped together by a common bus line CB and connected to the counter electrode terminal CTM. .

Along the edge between the transparent glass substrates SUB1 and SUB2, except for the liquid crystal filling port INJ, the liquid crystal LC
Is formed to seal the sealing pattern SL. The sealing material is made of, for example, an epoxy resin.

The layers of the alignment films ORI1 and ORI2 are formed inside the seal pattern SL. Polarizing plates POL1, P
OL2 is formed on the outer surfaces of the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2, respectively.
The liquid crystal LC is a lower alignment film ORI for setting the direction of liquid crystal molecules.
1 and the upper alignment film ORI2 are sealed in a region partitioned by a seal pattern SL. Lower alignment film ORI1
Is formed on the protective film PSV1 on the lower transparent glass substrate SUB1 side.

In this liquid crystal display device, various layers are separately stacked on the lower transparent glass substrate SUB1 side and the upper transparent glass substrate SUB2 side, and the seal pattern SL is formed on the substrate SUB2.
Side, the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2 are overlapped, liquid crystal LC is injected from the opening INJ of the sealing material SL, the injection port INJ is sealed with epoxy resin or the like, and the upper and lower substrates are sealed. Assembled by cutting.

<< Equivalent Circuit of Entire Display Device >> As shown in FIG. 13, the liquid crystal display substrate is composed of a set of a plurality of pixels in which an image display section is arranged in a matrix, and each pixel is located on the back of the liquid crystal display substrate. It is configured such that the transmitted light from the backlight arranged in the device can be independently modulated and controlled.
On the active matrix substrate SUB1, which is one of the components of the liquid crystal display substrate, the effective pixel region AR is opposed to the gate signal lines GL extending in the x direction (row direction) and juxtaposed in the y direction. A voltage signal line CL is formed. The gate signal line GL and the counter voltage signal line CL
And a drain signal line DL extending in the y direction while being insulated from each other, and juxtaposed in the x direction. Here, a unit pixel is formed in a rectangular area surrounded by each of the gate signal line GL, the counter voltage signal line CL, and the drain signal line DL. The liquid crystal display substrate includes a vertical scanning circuit V and a video signal driving circuit H as its external circuits.
Are sequentially supplied to each of them, and the video signal drive circuit H supplies the video signal (voltage) to the drain signal line DL in accordance with the timing. Note that the vertical scanning circuit V and the video signal driving circuit H
Power is supplied from the liquid crystal drive power supply circuit,
Image information from the CPU is divided into display data and control signals by a controller and input.

<< Driving Method >> FIG. 14 shows a driving waveform of the liquid crystal display device of the present invention. The counter voltage is a binary AC rectangular wave of VCH and VCL, and the scanning signal VG (i
-1), the non-selection voltage of VG (i) is changed every scanning period.
VGLH and VGLL are changed in two values. The amplitude value of the counter voltage and the amplitude value of the non-selection voltage are the same. The video signal voltage is calculated by subtracting the amplitude of the counter voltage from the voltage to be applied to the liquid crystal layer by one.
/ 2 minus the voltage.

The counter voltage may be DC, but by converting it to AC, the maximum amplitude of the video signal voltage can be reduced, and a video signal drive circuit (signal side driver) having a low withstand voltage can be used.

<< Function of Storage Capacitance Cstg >> Storage Capacitance Cstg
Is provided in order to accumulate video information (after the thin film transistor TFT is turned off) written in the pixel for a long time.
In the method of applying an electric field parallel to the substrate surface used in the present invention, unlike the method of applying the electric field perpendicular to the substrate surface, there is almost no capacitance (so-called liquid crystal capacitance) formed by the pixel electrode and the counter electrode. , The storage capacity Cstg is an essential component.

The storage capacitor Cstg also works to reduce the effect of the gate potential change ΔVg on the pixel electrode potential Vs when the thin film transistor TFT switches. This situation is represented by the following equation.

[0096]

△ Vs = {Cgs / (Cgs + Cstg + Cpix)} × △ Vg where Cgs is the gate electrode G of the thin film transistor TFT.
Parasitic capacitance formed between T and the source electrode SD1, C
pix represents a capacitance formed between the pixel electrode PX and the counter electrode CT, and ΔVs represents a so-called feedthrough voltage corresponding to a change in the pixel electrode potential due to ΔVg. This change ΔVs causes a DC component applied to the liquid crystal LC, but the storage capacitance Cst
The value can be reduced as g is increased.
The reduction of the DC component applied to the liquid crystal LC improves the life of the liquid crystal LC, and can reduce so-called burn-in in which a previous image remains when the liquid crystal display screen is switched.

As described above, since the gate electrode GT is made large so as to completely cover the i-type semiconductor layer AS, the overlap area with the source electrode SD1 and the drain electrode SD2 increases, and therefore the parasitic capacitance Cgs increases. The pixel electrode potential Vs is susceptible to the gate (scanning) signal Vg. However, this disadvantage can be eliminated by providing the storage capacitor Cstg.

<< Manufacturing Method >> Next, a method of manufacturing the above-described liquid crystal display device on the substrate SUB1 side will be described with reference to FIGS. In the same figure, the letters in the center are the abbreviations of the process names, the left side shows the processing flow as viewed from the cross-sectional shape near the gate terminal on the thin film transistor TFT portion shown in FIG. 6, and the right side. Step A to Step I except for Step B and Step D
Is a sectional view corresponding to each photographic processing, and each cross-sectional view of each step shows a stage after the processing after the photographic processing is completed and the photoresist is removed. In the present description, photographic processing refers to a series of operations from application of a photoresist to selective exposure using a mask to development thereof, and a repeated description will be omitted. A description will be given below according to the divided steps.

Step A, FIG. 8 A 3000 mm thick Al-Pd or Al-Pd film is formed on a lower transparent glass substrate SUB1 made of AN635 glass (trade name).
Conductive film g made of W, Al-Ta, Al-Ti-Ta, etc.
1 is provided by sputtering. After the photographic processing, the conductive film g1 is selectively etched with a mixed acid solution of phosphoric acid, nitric acid, and glacial acetic acid. Thereby, the gate electrode GT, the scanning signal line GL, the counter electrode CT, the counter voltage signal line CL, and the electrode PL
1, gate terminal GTM, first conductive layer of common bus line CB, first conductive layer of counter electrode terminal CTM, gate terminal GT
An anodizing bus line SHg (not shown) connecting M and an anodizing pad (not shown) connected to the anodizing bus line SHg are formed.

Step B, FIG. 8 After the formation of the anodic oxidation mask AO by direct writing, a solution in which 3% tartaric acid was adjusted to PH 6.25 ± 0.05 with ammonia and diluted 1: 9 with ethylene glycol solution was used. The substrate SUB1 is immersed in an anodizing solution and adjusted so that the formation current density becomes 0.5 mA / cm ² (constant current formation). Next, anodic oxidation is performed until the formation voltage 125 V necessary for obtaining a predetermined Al ₂ O ₃ film thickness is reached. Thereafter, it is desirable to hold this state for several tens of minutes (constant voltage formation). This is important for obtaining a uniform Al ₂ O ₃ film. Thereby, the conductive film g1 is anodized to form an anodic oxide film AOF having a thickness of 1800 ° on the gate electrode GT, the scanning signal line GL, the counter electrode CT, the counter voltage signal line CL, and the electrode PL1.

Step C, FIG. 8 A transparent conductive film g2 made of an ITO film having a thickness of 1400 ° is provided by sputtering. After the photoprocessing, the transparent conductive film g2 is selectively etched with a mixed acid solution of hydrochloric acid and nitric acid as an etchant to form the uppermost layer of the gate terminal GTM, the drain terminal DTM, and the second conductive layer of the counter electrode terminal CTM. I do.

Step D, FIG. 9 An ammonia gas, a silane gas, and a nitrogen gas are introduced into a plasma CVD apparatus to form a Si nitride film having a thickness of 2200 °, and a silane gas and a hydrogen gas are introduced into the plasma CVD apparatus to form a film. After providing an i-type amorphous Si film having a thickness of 2000 °, a silane gas, a hydrogen gas and a phosphine gas are introduced into a plasma CVD apparatus to form an N ⁺ -type amorphous Si film having a thickness of 300 °.

Step E, FIG. 9 After the photographic processing, the N ⁺ -type amorphous Si film and the i-type amorphous Si film are selectively etched using SF ₆ as a dry etching gas. The island of the layer AS is formed.

Step F, FIG. 9 After the photo processing, the Si nitride film is selectively etched using SF ₆ as a dry etching gas.

Step G, FIG. 10 A conductive film d1 made of Cr having a thickness of 600 .ANG. Is provided by sputtering, and an Al-P film having a thickness of 4000 .ANG.
A conductive film d2 made of d, Al-Si, Al-Ta, Al-Ti-Ta, or the like is provided by sputtering. After the photographic processing, the conductive film d2 is etched with the same liquid as in step A,
The conductive film d1 is etched with a ceric ammonium nitrate solution, and the video signal line DL, the source electrode SD1, the drain electrode SD2, the pixel electrode PX, the electrode PL2, the second conductive layer, the third conductive layer, and the drain of the common bus line CB are formed. A bus line SHd (not shown) for short-circuiting the terminal DTM is formed. Next, SF ₆ was introduced into a dry etching apparatus to etch the N ⁺ -type amorphous Si film.
The N ⁺ type semiconductor layer d0 between the source and the drain is selectively removed.

Step H, FIG. 10 An ammonia gas, a silane gas, and a nitrogen gas are introduced into a plasma CVD apparatus to form a 5000-nm-thick Si nitride film. After photographic processing, SF _{6 is used} as a dry etching gas.
The protective film PSV1 is formed by selectively etching the Si nitride film by a photo-etching technique using GaN.

<< Overall Configuration of Liquid Crystal Display Module >> FIG.
FIG. 3 is an exploded perspective view showing each component of the liquid crystal display module MDL. SHD is a frame-shaped shield case (metal frame) made of a metal plate, WD is its display window, PNL
Is a liquid crystal display panel, SPS is a light diffusion plate, GLB is a light guide, RFS is a reflection plate, BL is a backlight fluorescent tube, MC
Reference numeral A denotes a lower case (backlight case), in which members are stacked in a vertical arrangement as shown in the figure to assemble a module MDL.

The module MDL is a shield case SH
The entirety is fixed by claws and hooks provided on D. Here, the housing MD is a module MD.
L and the backlight case MCA.

The backlight case MCA includes a backlight fluorescent tube BL, a light diffusion plate SPS, a light guide GLB, and a reflection plate R.
FS is housed, and the light of the backlight fluorescent tube BL arranged on the side surface of the light guide GLB is transmitted to the light guide G.
A uniform backlight is formed on the display surface by the LB, the reflection plate RFS, and the light diffusion plate SPS, and the light is emitted toward the liquid crystal display panel PNL.

The backlight fluorescent tube BL is connected to an inverter circuit board, and serves as a power source for the backlight fluorescent tube BL.

FIG. 16 is an external view of a personal computer for explaining an example of an information processing apparatus equipped with the liquid crystal display device shown in FIG. 15, wherein IV is an inverter power supply for driving a fluorescent tube, CP
U is a host-side central processing unit.

As shown in the figure, COG mounting of the drive IC on the liquid crystal display element PNL, a multilayer flexible substrate as a peripheral circuit for the drain and gate driver on the outer peripheral portion are employed, and a bending mounting is performed on the drain driver circuit. Adopting, and a housing, a polarizing plate according to the present invention,
By adopting a black matrix design, the outer size can be significantly reduced as compared with the conventional case.

<< Embodiment 1 of Static Electricity Protection Circuit >> FIG.
FIG. 1 is a schematic diagram illustrating a configuration of an electrostatic protection circuit according to Embodiment 1 of the present invention. In the above-described in-plane switching mode liquid crystal display device, a configuration example of an electrostatic protection circuit formed on an active matrix substrate of a liquid crystal display element Is shown.

PE indicates a pixel, GL indicates a scanning signal line (gate signal line or horizontal signal line), DL indicates a video signal line (drain signal line or vertical signal line), TFT indicates a thin film transistor, PX indicates a pixel electrode, and CT indicates a counter electrode. , CL are counter electrode connection lines for supplying a signal to each counter electrode CT (that is, also referred to as a counter voltage signal line and a counter electrode wiring), and GTM is an external connection terminal for connecting an external drive electric circuit to the scanning signal line GL. , DTM are external connection terminals for connecting an external drive electric circuit to the video signal line DL, NR is a non-linear resistance element,
CLC electrically connects the common electrode connection lines CL in common, and supplies a common connection line for supplying a common voltage signal. SB denotes each scanning signal line GL and each video signal line DL via a non-linear resistance element NR. A short-circuit line CN1 for short-circuiting is an electrical connection between the counter electrode connection line CL and the common connection line CLC;
N2 is an electrical connection between the common connection line CLC and the short-circuit line SB, TH is a through hole, and OTM is a terminal connected to an external electric circuit.

Each pixel PE on active matrix substrate
As described above, the thin film transistor TFT, the pixel electrode PX, and the counter electrode CT are formed in (1, 1) to (m, n) (see FIG. 4. In FIGS. 1 and 4, the pixel is formed). The arrangement position of the counter electrode connection line CL and the thin film transistor TFT in PE, and the counter electrode CT per pixel
Are different). A predetermined voltage corresponding to the image information
An image is displayed between the pixel electrode PX and the counter electrode CT by changing the optical characteristics of the liquid crystal. Pixel electrode PX
Is connected to the source electrode of the thin film transistor TFT,
The counter electrodes CT are formed parallel to each other so as to face the pixel electrodes PX. The counter electrode CT formed in each pixel PE is electrically connected to a counter electrode connection line CL arranged in parallel with the scanning signal line GL.
L is formed to extend in the vertical direction. The group of counter electrode connection lines CL is electrically connected to a common connection line CLC disposed outside the display area via a connection portion CN1. The common connection line CLC is connected to the terminal OT.
It is connected to an external electric circuit via M. This external electric circuit is a circuit for applying a predetermined common voltage to the counter electrode CT in each pixel PE. An image display is obtained by the difference between the voltage of the counter electrode CT and the voltage of the pixel electrode PX.

Each of the scanning signal lines GL and each of the video signal lines DL are formed by combining a pair of forward and reverse diodes composed of, for example, a two-terminal thin film transistor as in the conventional configuration shown in FIG. Short-circuit line SB via a nonlinear resistance element NR composed of a bidirectional diode
Is electrically connected to This short-circuit line SB is formed in a frame shape (that is, a square shape) outside the display area. Further, the short-circuit line SB is electrically connected to the common connection line CLC via the connection portion CN2.

FIG. 3A is a circuit configuration diagram of a bidirectional diode used as the nonlinear resistance element NR, and FIG. 3B shows a two-terminal operation thin film transistor as a specific configuration example of the bidirectional diode. When the diodes composed of the two two-terminal operation thin film transistors are arranged in parallel in opposite directions to form a nonlinear resistance element having a nonlinear current-voltage characteristic, and when static electricity enters the wiring,
The static electricity flows bidirectionally toward the short-circuit line SB. Of course, an MIM element or the like may be used instead of the TFT diode.

With such a configuration, static electricity generated from entering the scanning signal line GL or the video signal line DL from the outside, or generated in the liquid crystal display element, is reduced by the nonlinear resistance element N.
Discharged through R toward the short-circuit line SB, and the discharged static electricity is absorbed by the common connection line CLC. Since a large number of counter electrodes CT corresponding to the number of pixels PE (m × n) are connected to the common connection line CLC (in the example of FIG. 4, since two counter electrodes CT are provided for each pixel, , M
× n × 2) because the common connection line CLC has a sufficient capacity to absorb static electricity. Therefore, the voltage between the scanning signal line GL and the video signal line DL is reduced, and the above-described destruction due to static electricity is prevented. Further, since a diode is used as the non-linear resistance element NR, leakage of a signal from an external drive circuit to the short-circuit line SB is reduced, and a sufficient protection function against static electricity is provided. Further, such a bidirectional diode can be easily formed in a manufacturing process when a thin film transistor TFT used as a switching element is formed.

For example, the upper, lower, and right sides of the figure constituting the frame-shaped short-circuit line SB are formed by the same process as the scanning signal line GL (and the counter electrode connection line CL and the common connection line CLC). It is formed of the same layer. Also, 1 on the left
The side is formed in the same layer by the same process as the video signal line DL extending in the same direction as the side. The three sides and the one side are electrically connected at two corners through two through holes TH.

In the active matrix substrate having the electrostatic protection circuit shown in FIG. 1, it is possible to inspect the wiring for defects using an array tester. The array tester has, for example, a write-to-hold-to-read cycle, and measures the amount of charge accumulated in the storage capacitor by the integration circuit, and determines the presence or absence of a defect based on the amount. In addition, it is possible to analyze a defect mode based on the dependence of the read charge amount on various voltages and timings. At the time of an array test, a test probe is simultaneously applied to all external connection terminals to operate pixels. Pixel defects are detected based on the quality of the operation state. Therefore, if each of the scanning signal lines and each of the video signal lines are connected by a resistor, the currents are mixed and cannot be detected.
The higher the resistance value of the resistor, the better. The resistance of the bidirectional TFT diode used in the present embodiment is R = 1 × 10
Since the resistance is as high as ⁶ Ω, it can be inspected sufficiently.

<< Embodiment 2 of Electrostatic Protection Circuit >> FIG.
FIG. 4 is a schematic diagram illustrating a configuration of an electrostatic protection circuit according to Embodiment 2 of the present invention.

In the present embodiment, the common connection line CLC connecting the counter electrode CT and one side on the right side of a part of the short-circuit line SB formed in a frame outside the display area are shared. There is a feature in the point. In other words, in the present embodiment, the common electrode connection line CL is electrically connected directly to the short-circuit line SB without providing the common connection line CLC commonly connecting the common electrode connection line CL group shown in FIG. I have. Other configurations are the same as those of the first embodiment. Thus, the number of wires constituting the electrostatic protection circuit can be reduced, and the size of the substrate can be reduced. Moreover, the static electricity protection effect is as high as in the first embodiment.

Although the present invention has been described in detail with reference to the above embodiments, the present invention is not limited to the above embodiments and can be variously modified without departing from the scope of the invention. It is. For example, in the first embodiment shown in FIG. 1, the short-circuit line SB connecting the scanning signal line GL and the video signal line DL via the non-linear resistance element NR is
Although the common electrode is directly connected to the common connection line CLC connecting the respective counter electrode connection lines CL at the connection portion CN2, the short-circuit line SB may be connected to at least one arbitrary counter electrode connection line CL. In the above-described embodiment, an amorphous silicon thin film transistor TFT is used as an active element. However, a polysilicon thin film transistor, a MOS transistor on a silicon wafer, or an MIM (Met
al-Intrinsic-metal) It is also possible to use a two-terminal element such as a diode. The present invention is also applicable to a reflection type liquid crystal display device including at least one of a pair of transparent substrates, a reflection unit, and a polarization unit. Further, the present invention provides a flip-chip type (that is, a chip-on-glass (COG) type) liquid crystal display device in which a video driving IC and a scanning driving IC are directly mounted on a transparent insulating substrate without using TCP parts. (For this, the same applicant, but refer to Japanese Patent Application No. 6-256426, which is a prior application for a module mounting method).

[0124]

As described above, according to the present invention,
In a horizontal electric field type liquid crystal display device, the static electricity protection circuit formed on the active matrix substrate constituting the liquid crystal display element makes it possible to absorb static electricity that has entered from the outside or generated inside the liquid crystal display element. High static electricity protection can be realized.

[Brief description of the drawings]

FIG. 1 is a schematic diagram illustrating a configuration of an electrostatic protection circuit according to a first embodiment of the present invention.

FIG. 2 is a schematic diagram illustrating a configuration of an electrostatic protection circuit according to a second embodiment of the present invention.

FIGS. 3A and 3B are circuit diagrams each showing an example of a bidirectional TFT diode used as a nonlinear resistance element according to the present invention.

FIG. 4 is a plan view of a principal part showing one pixel of a liquid crystal display unit and its periphery in an in-plane switching mode active matrix color liquid crystal display device of the present invention.

FIG. 5 is a diagram showing a relationship among a direction of an applied electric field, a rubbing direction, and a transmission axis of a polarizing plate.

FIG. 6 is a cross-sectional view of the thin film transistor element TFT taken along section line 4-4 in FIG. 4;

FIG. 7 is a cross-sectional view of the storage capacitor Cstg taken along section line 5-5 in FIG. 4;

FIG. 8 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion showing manufacturing processes of processes A to C on the substrate SUB1 side.

FIG. 9 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion showing a manufacturing process of processes D to F on the substrate SUB1 side.

FIG. 10 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion illustrating manufacturing processes of processes G to H on the substrate SUB1 side.

FIG. 11 is a cross-sectional view showing the vicinity of an electrode of one pixel and a cross-sectional view of a peripheral portion of the substrate in an image display area of a liquid crystal display substrate of a lateral electric field type.

FIG. 12 is a plan view illustrating a configuration of a matrix peripheral portion of a display panel.

FIG. 13 is a circuit diagram including a matrix portion and its periphery of the active matrix type color liquid crystal display device of the present invention.

FIG. 14 is a diagram showing driving waveforms of the active matrix type color liquid crystal display device of the present invention.

FIG. 15 is an exploded perspective view of the liquid crystal display module.

FIG. 16 is an external view of a personal computer illustrating an example of an information processing device equipped with a liquid crystal display device according to the present invention.

FIG. 17 is a schematic diagram showing a configuration example of a static electricity protection circuit in a conventional vertical electric field type liquid crystal display element.

[Explanation of symbols]

PE: pixel, GL: scanning signal line, DL: video signal line, T
FT: thin film transistor, PX: pixel electrode, CT: counter electrode, CL: counter electrode connection line, GTM, DTM: external connection terminal, NR: nonlinear resistance element, CLC: common connection line,
SB: short-circuit line, CN1, CN2: connection part, TH: through hole, OTM: terminal connected to an external electric circuit.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yasushi Nakano 3300 Hayano, Mobara City, Chiba Pref.Hitachi, Ltd.Electronic Device Division

Claims (9)

[Claims] 1. A liquid crystal display device comprising two substrates which are arranged to face each other with a liquid crystal layer interposed therebetween and extend in the x direction on a surface of one of the substrates on the liquid crystal layer side, and A scanning signal line group arranged in the direction and a video signal line group insulated from the scanning signal line group and extending in the y direction and arranged in the x direction are formed. A display region is formed by a region where the video signal line group intersects, and a switching element, a pixel electrode, and a counter electrode are respectively formed in a region surrounded by each of the scanning signal lines and each of the video signal lines. A connection line group extending in the x direction and juxtaposed in the y direction and connecting the respective counter electrodes is formed thereon, and is generated substantially parallel to the surface between the pixel electrode and the counter electrode. A liquid crystal display device that changes the light transmittance of the liquid crystal layer by an electric field component A short-circuit line that is arranged outside the display area and electrically connects the scanning signal lines and the video signal lines via non-linear resistance elements, respectively, is formed on the surface; A liquid crystal display device, wherein a line and the connection line are electrically connected. 2. The liquid crystal display device according to claim 1, wherein each of the connection lines is electrically connected to a common connection line, and the common connection line and the short-circuit line are electrically connected. . 3. The liquid crystal display device according to claim 1, wherein said connection line or said short-circuit line is electrically connected to an external electric circuit. 4. A liquid crystal display device comprising two substrates which are arranged to face each other with a liquid crystal layer therebetween and extend in the x direction on a surface of one of the substrates on the liquid crystal layer side, and A scanning signal line group arranged in the direction and a video signal line group insulated from the scanning signal line group and extending in the y direction and arranged in the x direction are formed. A display region is formed by a region where the video signal line group intersects, and a switching element, a pixel electrode, and a counter electrode are respectively formed in a region surrounded by the scanning signal lines and the video signal lines. A connection line group extending in the x-direction and juxtaposed in the y-direction and connecting the respective counter electrodes is formed thereon, and is generated substantially parallel to the surface between the pixel electrode and the counter electrode. A liquid crystal display device that changes the light transmittance of the liquid crystal layer by an electric field component A common connection line that is arranged outside the display region and extends in the y direction, and electrically connects the connection line group; and a common connection line that is arranged outside the display region, and each of the scanning signal lines and each of the A liquid crystal, wherein a short-circuit line for electrically connecting the video signal line via a non-linear resistance element is formed on the surface, and the short-circuit line is electrically connected to the common connection line. Display device. 5. The short-circuit line is formed in a frame shape outside the display area, and the common connection line and a part of the short-circuit line are shared. 5. The liquid crystal display device according to 4. 6. The liquid crystal display device according to claim 4, wherein said common connection line or said short-circuit line is electrically connected to an external electric circuit. 7. The device according to claim 1, wherein each of the counter electrodes extends in the y direction from the connection line extending in the x direction at a predetermined interval in parallel with the pixel electrodes. 5. The liquid crystal display device according to 4. 8. The liquid crystal display device according to claim 1, wherein the short-circuit line is formed in a frame shape outside the display area. 9. The device according to claim 1, wherein the nonlinear resistance element comprises two diodes in a forward direction and a reverse direction.
Or the liquid crystal display device according to 4.