JPH0991322A - Logical drawing processing system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the man-hours and period required to develop a semiconductor device by making efficient the generation of the standard logical drawing and logical expression of the semiconductor device consisting of a digital circuit or the input processing and alteration processing of a DA system, a CAD system, etc., used for the generation. SOLUTION: The DA system, CAD system, etc., used to develop the semiconductor device are provided with a scanner SCN which optically reads an input logical drawing. Their host computer HCOM is given a function which extracts circuit information including logical operators and their connection paths by dividing the logical drawing read by the scanner SCN into blocks and autonomously generates the standard logical drawing and logical expression based on the extracted information and provided with an input data base DB1, an operator data base DB12, a logical drawing data base DB3, and a logical expression data base DB4 which store input data regarding the logical drawing, operator data regarding the logical operators and their connection paths, etc., logical drawing data regarding the standard logical drawing, and logical expression data regarding the logical expression, and a work station WS2 for output and a printer PRT which output the standard logical drawing as an output logical drawing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a logic diagram processing system, and in particular, it is used particularly for making a standard logic diagram according to a description method of a semiconductor device composed of a digital circuit and for producing a logic formula for circuit simulation. It relates to effective technology.

[0002]

2. Description of the Related Art There is a semiconductor device such as a gate array integrated circuit having a digital circuit formed by combining various logic gates as its basic constituent element, and a standard logic diagram according to the description method of such a semiconductor device can be created. DA (Design) used to generate a logical expression for circuit simulation
Automation) system and CAD (Comp
There is a uter Aided Design system.

[0003]

In the conventional DA system, CAD system, etc., the operator reads a logical diagram created by handwriting or a drafting device and inputs the circuit information about the digital circuit of the semiconductor device. This is done by extracting logical operators such as gates, OR gates, or inverters, and then specifying the type, position, connection path, etc., point by point with a mouse or digitizer. However, as the scale of semiconductor devices has increased and the number of constituent elements including the logical operators has increased, the time required for input processing has been increased in the conventional DA system and CAD system that employ the manual input method as described above. In addition, the number of input errors caused by human labor increases, and the number of man-hours and the period required for developing a semiconductor device increase.

An object of the present invention is to increase the efficiency of input processing of a DA system, a CAD system, etc. used for creating or generating a standard logic diagram and a logical expression of a semiconductor device composed of a digital circuit, and man-hours required for developing the semiconductor device. And to reduce the period.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[0006]

The following is a brief description of an outline of a typical invention among the inventions disclosed in the present application. That is, an optical reading device for optically reading a logic diagram is provided in a DA system and a CAD system, etc. used for creating or generating a standard logic diagram and a logical expression of a semiconductor device including a digital circuit, and an arithmetic processing unit thereof. In addition, the logical diagram read by the optical reader is divided into blocks to extract the circuit information including the logical operator and its connection path, and based on this, the standard logical diagram and the function of creating a logical expression are provided. And storage means for storing input data relating to the logical diagram read by the optical reader, operator data relating to the logical operator and its connection path, logical diagram data relating to the standard logical diagram, and logical formula data relating to the logical formula. , And an output device for outputting the standard logic diagram.

According to the above-mentioned means, the circuit information relating to the logical operator of the digital circuit and its connection path can be input efficiently and accurately without human labor, and the corresponding portion of the storage means can be rewritten. As a result, it is possible to easily allow a partial change due to a design change or the like of the semiconductor device. As a result, the input process and the change process of the DA system and the CAD system, which are used for creating or generating the standard logic diagram and the logical expression of the semiconductor device including the digital circuit, are made efficient, and the man-hour and the period required for the development of the semiconductor device are reduced. Can be reduced.

[0008]

1 is a block diagram of an embodiment of a logical diagram processing system (DA system or CAD system) to which the present invention is applied. An outline of the configuration and operation of the logical diagram processing system of this embodiment will be described first with reference to FIG. The logic diagram processing system of this embodiment is used for creating or generating a standard logic diagram and a logical expression in the development and design of a gate array integrated circuit or the like.

In FIG. 1, the logical diagram processing system of this embodiment is a host computer HC which has a medium-sized computer having a relatively large processing capacity as its basic constituent element.
OM (arithmetic processing unit). The host computer HCOM is not particularly limited, but the input workstation W via the local area network LAN.
The S1 and the output workstation WS2 are connected, and the input database DB1, the operator database DB2, the logical diagram database DB3, and the logical expression database DB4, which are storage means, are connected. Further, a scanner SCN (optical reading device) is coupled to the input workstation WS1, and the output workstation WS1 is connected.
A printer PRT (output device) is coupled to 2.

Here, the scanner SCN optically receives an instruction from the operator, optically reads an input logic diagram created by a handwriting or drawing apparatus, and transmits it to the input workstation WS1. Further, the input workstation WS1 controls the reading operation of the scanner SCN, converts the logical diagram information input from the scanner SCN into predetermined input data, and stores it in the input database DB1.

Next, the host computer HCOM executes various arithmetic processes for creating or generating a standard logic diagram and a logical expression based on the input data stored in the input database DB1. In this embodiment, the operation processing by the host computer HCOM is a logical operator extraction processing for dividing the input data read from the input database DB1 into blocks into predetermined units and extracting circuit information including a logical operator and its connection path. Based on the logical operator replacement processing for replacing the extracted logical operator and the like with the corresponding logical symbol and storing it as operator data in the operator database DB2, and the operator data read from the operator database DB2. A logic diagram creation process for creating a standard logic diagram according to a predetermined description method and storing it as logic diagram data in the logic diagram database DB3, and corresponding logic based on operator data read from the operator database DB2. For generating an expression and storing it in the logical expression database DB4 as logical expression data And a physical expression generation processing. The specific contents of these arithmetic processes will be described later in detail.

On the other hand, the output workstation WS2
Receives the operator's instruction and the logical diagram database D
The logic diagram data stored in B3 is read out via the local area network LAN, displayed on the display screen thereof, and output via the printer PRT such as a laser printer to obtain an output logic diagram. Further, the logic formula data stored in the logic formula database DB4 is read out as necessary and used for simulation for evaluating the operation characteristics of the logic circuit.

FIG. 2 shows a processing flow chart of an embodiment of the logical diagram processing system of FIG. Further, FIG. 3 shows a conceptual diagram of an embodiment for explaining the logical diagram input process in the process flow diagram of FIG. 2, and FIGS. 4, 5 and 6 show the process flow diagram of FIG. A conceptual diagram of an embodiment for explaining the logical operator extraction process, the logical operator replacement process, and the logical diagram output process in FIG. Based on these figures, the processing flow of the logical diagram processing system of this embodiment, the specific processing contents of each processing step, and its characteristics will be described.

In FIG. 2, the logic diagram processing system of this embodiment is started by first reading an input logic diagram created by an operator's manual work or a drawing device from the scanner SCN to the input workstation WS1. At this time, in the input logic diagram, as illustrated in FIG. 3, for example, a logic circuit composed of two OR gates and one AND gate is written together with input / output signal names. After being converted into a predetermined electric signal by the scanner SCN, the input workstation W
It is transmitted to S1. Input workstation WS1
Converts the electric signal input from the scanner SCN into predetermined input data, stores it in the input database DB1, and displays it on its display screen. With this, the operator can confirm that the reading of the logic diagram by the scanner SCN is normally performed, and if necessary, the display display screen of the input workstation WS1 is corrected to partially change the read contents. You can also

The input data stored in the input database DB1 is read by the host computer HCOM via the local area network LAN and subjected to the circuit information extraction processing. At this time, the host computer HC
As illustrated in FIG. 4, the OM first divides the input data read from the input database DB1, that is, the input logical diagram into functional blocks, and, for example, three blocks B
1 to B3. Then, from these blocks, OR gates OG1 and OG2 or AND gate AG1
And the internal signals A to G, which are the input / output signals thereof, and their transmission paths, that is, the connection paths between the logical operators. The output terminals OT1 and OT2 and the input terminals IT1 to IT1 of each block are
IT2 is extracted and its coordinates (x1, y1) and (x
2, y2) etc. are identified. As illustrated in FIG. 5, the circuit information is converted into the corresponding logical symbols according to the replacement table and then stored in the operator database DB2.

Next, the host computer HCOM reads the operator data stored in the operator database DB2 and uses a predetermined description method based on the circuit information such as the type of the logical operator and the connection path contained therein. A standard logical diagram according to the standard is autonomously created and stored in the logical diagram database DB3 as logical diagram data. Also, based on these circuit information, a logical expression suitable for the function of the logical circuit is autonomously generated and stored in the logical expression database DB4 as logical expression data.

The logical diagram data stored in the logical diagram database DB3 is read out to the output workstation WS2 via the local area network LAN and displayed on its display screen as shown in FIG. PR consisting of a laser printer, etc.
It is printed out by T and becomes an output logic diagram. Further, the logical expression data stored in the logical expression database DB4 is
If necessary, it is read out to a predetermined output device including the output workstation WS2, and is used for computer simulation or the like for evaluating the operating characteristics of the logic circuit.

As described above, the logical diagram processing system of this embodiment is a scanner SCN for optically reading a logical diagram created by an operator's handwriting or drawing device.
In addition, the host computer HCOM, which is an arithmetic processing unit thereof, divides the logic diagram read by the scanner SCN into blocks and extracts circuit information including a logic operator and its connection path. And a function of autonomously creating or generating a logical expression, input data regarding a read logical diagram, operator data regarding a logical operator and its connection path, logical diagram data regarding a standard logical diagram, and logic regarding a logical formula. An input database DB1, an operator database DB2, a logical diagram database DB3, and a logical expression database DB4, which are storage means for respectively storing expression data.
And a printer PRT which is an output device for outputting the standard logic diagram. As a result, circuit information relating to the logical operators of digital circuits and their connection paths can be input efficiently and accurately without human effort, and
By rewriting the contents held in each database, it is possible to easily partially change the logic diagram accompanying a design change or the like. As a result, the DA system and CA used for creating or generating the standard logic diagram and the logical formula of the gate array integrated circuit.
The input processing of the D system can be made efficient, thereby reducing the man-hours and the period required for developing the gate array integrated circuit.

The effects obtained from the above embodiments are as follows. That is, (1) DA system and C used for creating or generating a standard logic diagram and a logical formula of a semiconductor device including a digital circuit.
An AD system or the like is provided with an optical reading device for optically reading a logical diagram, and the arithmetic processing unit divides the logical diagram read from the optical reading device into blocks, and circuit information including logical operators and their connecting paths. Related to input data related to the logical diagram read from the optical reader, logical operators and their connection paths, etc. while having a function to autonomously create or generate standard logical diagrams and logical expressions based on these By providing a plurality of storage means for respectively storing the operator data, the logic diagram data regarding the standard logic diagram and the logic formula data regarding the logic formula, and the output device for outputting the standard logic diagram, the logic of the digital circuit is provided. The effect that circuit information related to operators and their connection paths can be efficiently and accurately input without human intervention is obtained. That. (2) According to the above item (1), there is an effect that it is possible to easily make a partial change in the logic diagram due to a design change or the like by rewriting the storage means. (3) According to the above items (1) and (2), it is possible to efficiently perform the input process and the change process of the DA system and the CAD system that are used for creating or generating the standard logic diagram and the logical expression of the semiconductor device including the digital circuit. The effect that it can be obtained. (4) According to the above items (1) to (3), it is possible to reduce the man-hours and the period required for developing the semiconductor device.

Although the invention made by the inventor has been specifically described based on the embodiments, the invention is not limited to the above-described embodiments, and can be variously modified without departing from the gist thereof. Needless to say, there is. For example, in FIG. 1, the input workstation WS1 and the output workstation WS2 may share one workstation, or an arbitrary number of workstations may be connected to the local area network LAN. You can Further, an input database DB1, which is a storage means, an operator database DB2,
The logical diagram database DB3 and the logical expression database DB4 can be integrated into one database, and various other databases can be provided as a system. The logic diagram processing system does not require that it be coupled through the local area network LAN. Further, the block configuration of the logical diagram processing system, the function allotment thereof, the type of the input / output device, and the like can take various embodiments.

In FIG. 2, the processing flow of the logic diagram processing system is not restricted by this embodiment. 3 to 6, the logic circuit to be processed by the logic diagram processing system can have any circuit configuration, and the type of the logical operator is not limited by these embodiments. Further, the block dividing method of the logic diagram, the logic symbol, the name of each logic operator, and the like can adopt various embodiments.

In the above description, the DA system or the C system mainly used for the development of the gate array integrated circuit which is the field of application of the invention made by the present inventor was the background.
Although the case where it is applied to the AD system has been described, the present invention is not limited to this, and for example, a similar DA system or CAD used for the development of a microcomputer or the like.
It can also be applied to systems and automatic layout design systems. INDUSTRIAL APPLICABILITY The present invention can be widely applied to at least a system that requires input processing by a logic diagram.

[0023]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows. That is, an optical reading device for optically reading a logic diagram is provided in a DA system and a CAD system, etc. used for creating or generating a standard logic diagram and a logical expression of a semiconductor device including a digital circuit, and an arithmetic processing unit thereof. In addition, the function of dividing the logical diagram read by the optical reader into blocks and extracting the circuit information including the logical operator and its connection path, and autonomously creating or generating the standard logical diagram and the logical expression based on these For storing input data relating to a logical diagram read by an optical reader, operator data relating to a logical operator and its connection path, logical diagram data relating to a standard logical diagram, and logical formula data relating to a logical formula. By providing a plurality of storage means and an output device for outputting the standard logic diagram, the logical operator and the digital circuit can be controlled. The circuit information on the connection path or the like, it is possible efficiently and accurately input without manual, the part changes due to the design change or the like can be easily. As a result, the input process and the change process of the DA system and the CAD system, which are used for creating or generating the standard logic diagram and the logical expression of the semiconductor device including the digital circuit, are made efficient, and the man-hour and the period required for the development of the semiconductor device are reduced. Can be reduced.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of a logical diagram processing system to which the present invention is applied.

FIG. 2 is a processing flow chart showing an embodiment of the logical diagram processing system of FIG.

FIG. 3 is a conceptual diagram showing an embodiment for explaining a logical diagram input process in the process flow chart of FIG.

FIG. 4 is a conceptual diagram showing an embodiment for explaining a logical operator extraction process in the process flow diagram of FIG.

5 is a conceptual diagram showing an example for explaining a logical operator replacement process in the process flow diagram of FIG. 2. FIG.

FIG. 6 is a conceptual diagram showing an embodiment for explaining a logical diagram output process in the process flow diagram of FIG.

[Explanation of symbols]

HCOM ... Host computer, LAN ... Local area network, WS1 ... Input workstation, WS2 ... Output workstation, SCN ...
... Scanner, PRT ... Printer, DB1 ... Input database, DB2 ... Operator database, DB3 ...
Logical diagram database, DB4 ... Logical expression database.
A to G ... Internal signal, B1 to B3 ... Divided block, O
T1-OT2 ... Output terminal, IT1-IT2 ... Input terminal, x1-x2, y1-y2 ... Terminal coordinates.

Claims (4)

[Claims] 1. A logic diagram processing system capable of reading a logic diagram and autonomously extracting circuit information including a logic operator and its connection path. 2. The logic diagram processing system creates a standard logic diagram according to a predetermined description method based on the circuit information,
The logic diagram processing system according to claim 1, wherein the logic diagram processing system is capable of outputting. 3. The logical diagram processing system according to claim 1, wherein the logical diagram processing system is capable of generating a corresponding logical expression based on the circuit information and using it for circuit simulation. Processing system. 4. The logical diagram processing system comprises: an optical reading device for optically reading the logical diagram; and a logical diagram read by the optical reading device is divided into blocks to extract the circuit information and a standard logical diagram and An arithmetic processing unit that autonomously creates or generates a logical expression, input data regarding a logical diagram read by the optical reader, operator data regarding a logical operator and its connection path, logical diagram data regarding a standard logical diagram and logic A plurality of storage means for respectively storing logical expression data relating to an expression, and an output device for outputting the standard logical diagram are provided. Logical diagram processing system.