JPH0964123A - Semiconductor testing device and testing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To check a conductive foreign matter adhering to the tip section of a probe needle electrically. SOLUTION: In a probing section 2, a voltage applying means, a current measuring means and a GND terminal are fitted among a tester 9 from probe needles 6a or to tester 9 itself, the probe needles 6a connected to the voltage applying means and the current measuring means and the probe needles 6a bonded with the GND terminal are set alternately regarding each of a plurality of the probe needles 6a, and the presence of conductive foreign matters can be detected by making a current flow among the probe needles. Accordingly, the current is made to flow among the probe needles 6a for applying voltage and the probe needle 6a for GND and the presence of the conductive foreign matters can be detected electrically by mutually adjoining the probe needles 6a, to which connection to the voltage applying means and the current measuring means is set, and the probe needles 6a, to which connection to GND is set, respectively in a plurality of the probe needles 6a.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the field of semiconductor device manufacturing, and is particularly effective when applied to a probe device for measuring the electrical characteristics of a semiconductor device.

[0002]

2. Description of the Related Art A probe device is used to test the electrical characteristics of a semiconductor device at the stage when a circuit is formed on a semiconductor substrate. In the probe device, an external probe electrode (hereinafter referred to as a probe needle) is brought into contact with an external connection electrode (electrode pad) provided on each integrated circuit formed on a semiconductor substrate, and works in conjunction with a tester. It is a facility for automatically testing integrated circuits by means of a loader unit, an alignment unit, a probing unit, and a control unit. The probe needle is attached to the probe card and is electrically connected to the measuring device at the probe head of the probing unit together with the probe card.

The semiconductor substrate set in the supply loader is conveyed to the alignment section by a conveyor belt or the like,
Positioned. After that, the probe needle is brought into contact with the electrode pad of each integrated circuit after moving to the probing section, and its electrical characteristics are measured by a tester working in conjunction with the probe device. The test of the integrated circuit is started after the probe needle comes into contact with the electrode pad, and as shown in the flowchart of FIG. 6, after the test is started, the test is executed by the preset measurement program. This test is repeated for each integrated circuit on the semiconductor substrate. At the time of contact, as shown in FIG. 7A, the electrode pad 2 made of aluminum, for example.
In order to bring 3 and the probe needle 25 into contact with each other to establish electrical conduction, the probe needle 25 is bited into the electrode pad 23,
The newly formed surface is exposed by scraping off the oxide film 24 on the surface of the electrode pad 23 to achieve electrical conduction. that time,
Conductive foreign matter such as scraped aluminum may adhere to the tip of the probe needle. In particular, when a conductive foreign substance is sandwiched between adjacent probe needles, electrical signals transmitted to the respective probe needles are electrically connected and short-circuited, which makes normal measurement impossible. Further, when a large-capacity electric signal and the ground line are short-circuited, the probe needle may melt, which may lead to a shortened life of the probe card.

As a conventional method for detecting a conductive foreign substance on a probe needle, a warning is issued from the probe device when the measurement result of the semiconductor chip becomes defective a plurality of times continuously by the probe device, and the probe needle Technology that promotes polishing and cleaning of the tip is used.

The probe device is described in, for example, Japanese Patent Application Laid-Open No. 61-13154.

[0006]

However, in the above-mentioned method for detecting the conductive foreign matter of the probe needle, when the measurement result of the integrated circuit becomes defective a plurality of times in succession, the characteristics of the semiconductor chip become defective. It was not possible to distinguish whether there was any or that the conductive foreign matter adhered to the probe needle.

The present inventor diligently studied, paying attention to the fact that there is no method for electrically checking the conductive foreign matter attached to the tip of the probe needle, in addition to the measurement result of the integrated circuit.

Therefore, an object of the present invention is to provide a technique for electrically checking a conductive foreign substance attached to the tip of a probe needle.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

The following is a brief description of an outline of typical inventions disclosed in the present application. That is, a semiconductor provided with a plurality of probe needles for establishing electrical connection with electrode pads of an integrated circuit formed on a semiconductor substrate, and a tester electrically connected to the probe needles for measuring electrical characteristics of the integrated circuit. A test apparatus, wherein the plurality of probe needles are provided with a connection to a voltage applying means and a current measuring means, respectively.
Those for which a connection to D has been set are adjacent to each other.

[0011]

A plurality of probe needles, which are respectively connected to the voltage applying means and the current measuring means, and adjacent to each other, are connected to each other so that a probe needle for voltage application is provided. The presence / absence of conductive foreign matter can be electrically detected by passing an electric current between the probe needle for GND and the probe needle for GND. Further, since it is possible to check the presence or absence of the conductive foreign matter during the test of each integrated circuit, it is possible to improve the yield and extend the life of the measuring jig without lowering the throughput.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram of a probe device. The probe device 1 mainly includes a probing unit 2, a loader unit 3, and an alignment unit 4. In the probing unit 2, in order to test the integrated circuit in the semiconductor substrate, movement of the semiconductor substrate in the Z / Y axis direction and contact between the electrode pad in the integrated circuit and the probe needle are automatically performed for all the chips. . In the loader unit 3, the semiconductor substrate in the storage jig is transported to the probing unit and the semiconductor substrate for which the probe test has been completed is stored in the storage jig. The alignment unit 4 performs pre-alignment for detecting the orientation flat of the semiconductor substrate and determining the direction thereof, and fine alignment for performing parallel alignment of the semiconductor substrate for probing with higher positional accuracy. FIG. 2 shows a cross-sectional view of the probing section 2. The probing unit 2 mounts an aligned semiconductor substrate, and conducts electricity between the wafer chuck 7 movable in the X, Y, Z and θ directions and the electrode pads of the integrated circuit formed on the semiconductor substrate 5. The probe card 6 is provided with a plurality of probe needles 6a, a tester 9 for measuring electrical characteristics of the integrated circuit, and a tester measuring system 13 for electrically connecting the probe needles 6a.

In the present invention, in the probing section 2,
Between the probe needle 6a and the tester 9, or on the tester 9 itself, a voltage applying unit and a current measuring unit and a GND terminal are provided, and each of the plurality of probe needles 6a is connected to the voltage applying unit and the current measuring unit and the GND. It is configured such that the presence or absence of the conductive foreign matter can be detected by alternately setting the one connected to the terminal and passing a current between the probe needles. FIG. 3 shows the connection relationship between the voltage applying / current measuring means and the GND terminal and the plurality of probe needles 6a. The voltage applying / current measuring unit 15 and the GND terminal 16 which are composed of the voltage applying means and the current measuring means are provided in the probe card 6.
And the tester 9 or between the tester 9 itself. The probe needle 6a, the voltage application / current measurement unit 15 and the GND terminal 16 are connected to the relay switch 1
The probe needles 6a can be electrically connected / disconnected by means of 7, and each of the probe needles 6a is provided with a voltage application / current measurement unit 1
5 or the GND terminal 16 is set. Thus, the relay switch 17 can be turned off when measuring the integrated circuit, and the relay switch 17 can be connected when detecting a foreign substance. The connection / disconnection control of the relay switch 17 is performed by, for example, the tester 9
Is performed by the control means provided in. In this case, one of the adjacent probe needles is connected to the voltage applying / current measuring unit 15 side and the other is connected to the GND terminal 16 side,
Each probe needle 6a is alternately connected to the voltage application / current measurement unit 15 and the GND terminal 16.

FIG. 4 is an explanatory diagram of a method for detecting the presence or absence of conductive foreign matter. A voltage source 19 is connected to one of the adjacent probe needles 6a via an ammeter 18, and the other is grounded. The detection of the conductive foreign matter is performed by passing a current from the voltage source 19. That is, when nothing is present between the adjacent probe needles 6a, no current flows, and the ammeter shows 0, indicating that there is no abnormality. When the conductive foreign substance 21 is sandwiched between the adjacent probe needles 6a, a current flows from one probe needle to the other probe needle through the conductive foreign substance 21, so that the ammeter operates and the adjacent probe needles 6a It is shown that the conductive foreign material 21 is sandwiched between them. Thus, the presence / absence of the conductive foreign matter can be electrically checked in a state where the probe needle is not in contact with the electrode pad, so that the presence / absence of the conductive foreign matter can be checked during the test of each semiconductor chip.

In setting the probe needle shown in FIG. 3,
The probe needles 6a, a to h, are alternately connected to those connected to the voltage application / current measurement unit 15 and those connected to the GND terminal 16. For example, the probe needle 6
When a conductive foreign substance is sandwiched between a and a of a, a current flows from a to b, so that the conductive foreign substance can be detected. Also, b-c
When a conductive foreign substance is sandwiched between them, a current flows from c to b, so that the conductive foreign substance can be detected. That is, with such an arrangement, it is possible to detect even if the conductive foreign matter is sandwiched between any probe needles.

Next, a method of testing a semiconductor device, which incorporates the check of the presence or absence of conductive foreign matter according to the present invention, will be described.
FIG. 5 is a diagram showing a processing flow of a probe test incorporating a check for the presence or absence of conductive foreign matter according to the present invention. First,
The test is started before the probe needle contacts the electrode pad of the target integrated circuit, and the probe needle contacts the electrode pad of the target integrated circuit until the wafer chuck 7 moves and the probe needle contacts the electrode pad of the target integrated circuit. Because not
Here, the first probe needle short-circuit check program is executed. In this program, the probe needle, the voltage application / current measuring unit, and the GND terminal are controlled to be connected by a relay switch in order to inspect the presence or absence of the conductive foreign matter between the probe needles by the above-described method. When the relay switch is connected and a current flows between the probe needles, it is determined that there is a conductive foreign substance, and the test is interrupted. The detected conductive foreign matter is removed by suction, needle tip polishing, or the like. Then start the test again. If no current flows between the probe needles, it is determined that there is no conductive foreign matter, the probe needle is disconnected from the voltage application / current measurement unit and the GND terminal by a relay switch, and the probe needle contacts the electrode pad. Then, the normal measurement program is executed. After the measurement is completed, the probe needle is not in contact with the electrode pad while the electrode pad of the integrated circuit to be measured next moves to the probe needle, so that the next probe needle short-circuit check program is executed. The probe test is performed by repeating this series of processes. According to this method, it is possible to check the presence or absence of conductive foreign matter during the test of each integrated circuit formed on the semiconductor substrate.
It is possible to improve the yield and extend the life of the measurement jig without lowering the throughput.

The effects of the present invention will be described below.

(1) A voltage applying / current measuring means and a GND terminal are provided between the probe card and the tester or in the tester, and the plurality of probe needles are respectively applied with voltage.
Since the one connected to the current measuring means and the one connected to the GND terminal are adjacent to each other, it is possible to electrically check the presence or absence of the conductive foreign matter while the probe needle is not in contact with the electrode pad. The presence or absence of conductive foreign matter can be checked during the test of each semiconductor chip. Therefore, without reducing throughput,
It is possible to improve the yield and extend the life of the measuring jig.

(2) Measurement of an integrated circuit by connecting a plurality of probe needles to a voltage applying means and a current measuring means, and connecting to GND using a switch capable of controlling connection / disconnection. It can be controlled so that the switch is sometimes turned off and the switch is connected when detecting a foreign substance.

(3) Since the plurality of probe needles are alternately arranged with connection to the voltage applying means and connection to the current measuring means and connection to GND, respectively. Even if the foreign matter is caught between any probe needles, it can be detected.

(4) A process for starting the test and detecting the presence / absence of contact of the probe needle with the electrode pad, and a process of supplying a current between the probe needles when the probe needle does not contact the electrode pad By doing so, it is possible to electrically check the presence / absence of conductive foreign matter while the probe needle is not in contact with the electrode pad, so it is possible to check the presence / absence of conductive foreign matter during the test of each semiconductor chip. . Therefore, the yield can be improved and the life of the measuring jig can be extended without lowering the throughput.

(5) A current is passed between the probe needles, and when there is a current flow, the test is interrupted so that the conductive foreign matter detected immediately is removed by suction, needle tip polishing, or the like. You can then start the test again. Therefore, the yield can be improved and the life of the measuring jig can be extended without lowering the throughput.

The invention made by the inventor of the present invention has been specifically described based on the embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say. For example, in the above embodiment, the relay switch is used to connect each probe needle to the voltage applying unit and the current measuring unit, or to connect to the GND terminal.
An FET such as an S transistor may be used as a connection switch. Further, by interlocking with the probe needle short-circuit check program and the needle tip automatic polishing mechanism of the above-mentioned example, the test is interrupted when a conductive foreign substance is detected, and the needle tip automatic polishing mechanism is operated, thereby the conductivity of the present invention is improved. It is possible to fully automatically perform a semiconductor device test that incorporates a check for the presence or absence of foreign matter. Therefore, the throughput of the test for measuring the electrical characteristics of the semiconductor device is significantly improved.

[0024]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

That is, a plurality of probe needles are connected to the voltage applying means and the current measuring means, respectively, and the probe needles to which the connection is connected to the GND are arranged adjacent to each other, whereby a probe for voltage application is provided. It is possible to electrically detect the presence or absence of the conductive foreign matter by passing an electric current between the needle and the probe needle for GND. Also, since it is possible to check the presence of conductive foreign matter during the test of each integrated circuit,
The yield can be improved and the life of the measurement jig can be extended without lowering the throughput.

[0026]

[Brief description of drawings]

FIG. 1 is a schematic view of a probe device.

FIG. 2 is a cross-sectional view of a probing portion of a probe device.

FIG. 3 is a diagram showing a connection relationship between a voltage application / current measuring means and a GND terminal provided in the semiconductor test apparatus of the present invention and a plurality of probe needles.

FIG. 4 is an explanatory diagram of a method for detecting the presence or absence of a conductive foreign matter according to the present invention.

FIG. 5 is a diagram showing a processing flow of a probe test incorporating a check for the presence or absence of a conductive foreign matter of the present invention.

FIG. 6 is a diagram showing a processing flow of a conventional probe test.

FIG. 7A is a diagram showing a contact state of a probe needle with an electrode pad, and FIG. 7B is a diagram showing a state in which a conductive foreign substance is sandwiched between probe needles.

[Explanation of symbols] 1 ... probe device, 2 ... probing part, 3 ... loader part, 4 ... alignment part, 5 ... semiconductor substrate,
6 ... Probe card, 6a ... Probe needle, 7 ... Wafer chuck, 8 ... Alignment optical system, 9 ... Tester, 10, 11 ... Storage jig, 12 ... Transfer system, 13 ...
… Tester measurement system, 14 …… Wafer chuck movement trajectory, 1
5 ... Voltage application / current measuring unit, 16 ... GND terminal, 17 ... Relay switch, 18 ... Ammeter, 19 ...
… Voltage source, 20 …… GND, 21 …… Conductive foreign matter, 22
…… Semiconductor substrate, 23 …… Electrode pad, 24 …… Oxide film, 25 …… Probe needle

Claims (6)

[Claims] 1. A plurality of probe needles for establishing electrical continuity with electrode pads of an integrated circuit formed on a semiconductor substrate, and a tester electrically connected to the probe needles for measuring electrical characteristics of the integrated circuit. A semiconductor testing apparatus provided with the probe needles, wherein the plurality of probe needles are connected to the voltage applying means and the current measuring means and adjacent to each other, and are connected to the GND. Semiconductor test equipment characterized by. 2. The connection between the plurality of probe needles, the voltage applying means and the current measuring means, and the connection with the GND are performed using a switch capable of controlling connection / disconnection. The semiconductor test apparatus according to claim 1. 3. The plurality of probe needles, wherein the plurality of probe needles are alternately arranged with connection to voltage applying means and current measuring means and connection to GND, respectively. The semiconductor test apparatus according to claim 1 or 2, wherein 4. A plurality of probe needles for establishing electrical continuity with electrode pads of an integrated circuit formed on a semiconductor substrate, and a tester electrically connected to the probe needles for measuring electrical characteristics of the integrated circuit. A method for testing a semiconductor device used, comprising:
A process of starting a test to detect the presence or absence of contact of the probe needle with the electrode pad; and a process of passing a current between the probe needles when there is no contact of the probe needle with the electrode pad A method for testing a semiconductor device, comprising: 5. The method of testing a semiconductor device according to claim 4, further comprising: a process of passing a current between the probe needles and interrupting the test when a current flows. 6. The tester is provided with a mechanism for automatically polishing the tip of the probe needle, and is provided with a process for activating the mechanism after the process for interrupting the test. The method for testing a semiconductor device according to claim 5.