JPH0946745A - Pager display system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily read a message without detaching a pager fixed to a belt by inverting the top and bottom of the message in response to a specification and displaying it. SOLUTION: Left and right are inverted by outputting the pattern of the message in the reverse order, the top and the bottom are inverted by reversing the bit order of display data, and thus top and bottom inverted display is realized. Whether or not the top and bottom of the message is inverted is set by writing '0' or '1' to a display direction flag from a CPU or the like for controlling the pager. An address generator capable of switching up count and down count is used so as to output the character code of the message in the reverse order. A counter for character pattern generation capable of switching the up count and the down count is used so as to reversely output the left and right of a character pattern.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pager display system for displaying a message on a pager.

[0002]

2. Description of the Related Art Recently, pagers have generally become widespread, and not only conventional pagers for displaying only numbers but also pagers for displaying English characters, katakana, etc. have appeared.

Until now, many display devices were located on the top surface of the pager body so that the message could be easily viewed when carrying, but the use of English letters and katakana made it necessary to enlarge the display device. The number of pagers that have an indicator on the side of the pager has increased.

FIG. 7 shows an example of the configuration of the display system in the pager of FIG. 6 (a). In FIG. 7, 71
Is a display, 72 is a display address signal generator of the display, 7
3 is a character pattern generation table, 74 is a display data register, 75 is a character pattern generation counter, 76 is a message memory, and 77 is an address generator.

The operation of the above arrangement will be described below. The message received by the pager is
It is stored in the message memory 76. This message is stored character by character as data such as JIS code.

This data is converted into a dot pattern by the character pattern generating table 73, and the data is sent to the display 71 through the display data register 74,
A message is displayed. The operation will be described in more detail below.

The display 71 is a 14-character one-line display, and one character is represented by 7 × 6 dots. Display contents are controlled by 84 display address signals and 7 data lines. The display address signal input to the display 71 is b
Signal lines 0 to b83 are sequentially activated, and only one signal line is activated at the same time.

Each display address signal corresponds to a vertical column of the dot matrix on the display. The seven data lines correspond to the horizontal rows of the dot matrix.
The 7 × 84 dot is located at the intersection of the display address signal and the data line, and is turned on when both the corresponding display address signal and the data line are active, and is turned off when both are inactive or only one is active.

The seven data lines are the display data register 74.
, And the data line corresponding to the bit in which 1 is stored becomes active. Further, the data line corresponding to the bit in which 0 is stored becomes inactive. A desired pattern can be displayed by sequentially activating b0 to b83 one by one and sequentially writing the data corresponding to each vertical column in the display data register 74.

FIG. 7 shows a state in which b0 is active, and corresponding data '0111110' is written in the display data register 74.

The display address signal generator 72 has b0 to b
The display address signals up to 83 are sequentially activated, and the display address signals are switched in response to the reference clock.

FIG. 9 shows an example of the circuit. When the initial signal is input, only b0 becomes active, and the other display address signals become non-active. The active display address signals b1 and b2 are sequentially shifted according to the clock. The initial signal is input at the next timing when b83 becomes active, and b
0 returns to the active state. As a result, the display address signal is generated.

The character pattern generation table 73 is a JIS
It receives a character code such as a code and generates a dot pattern of the corresponding character.

FIG. 8 shows the contents of the character pattern generation table 73. The data related to one character consists of 8 words. The upper 8 bits of the address are the JIS code and'C 'is represented by 01000011. A character consists of 8 words, and each word has a dot pattern when the character is divided vertically. The lower 3 bits represent each word.

The word corresponding to 000 represents the dot pattern in the leftmost column of the character pattern, and 001 represents the dot pattern on the right of the 000 pattern. In this example, 1
Characters are expressed in 6 columns. One of the columns (101) is a column showing a space between characters. The remaining two columns (110, 1
11) is not used. The upper 8 digits are the output code from the message memory, and the lower 3 bits are output from the character pattern generating counter 75. The output data of the character pattern generation table 73 is written in the display data register 74.

The character pattern generating counter 75 is a hexadecimal counter. Signals 0 to 5 are generated according to the clock. This signal is a character pattern generation table 73.
And is used to generate 6 columns of one-character pattern sequentially from the left dot pattern. The character pattern generating counter 75 generates a carry signal when returning from 5 to 0, and the signal is sent to the address generator 77 in the message memory.

The message memory 76 is a memory in which received messages are stored. The message is stored as code data such as JIS code. The address generator 77 is for outputting the code data in the message memory to the character pattern generation table one by one, from the memory address where the code of the first character is stored to the address of the last character code. It occurs sequentially.
This address is updated by inputting a clock when the carry signal of the character pattern generating counter 75 is active.

As described above, the display address is shifted by one every clock, and the corresponding dot pattern is output from the character pattern generation table and written in the display data register 74. Then, every 6 clocks, one character code is output from the message memory. Display of a pattern of 14 characters per screen is completed in 84 clocks.

[0019]

However, in the above-described conventional structure, when the pager is carried on the belt and fixed to the belt by a clip or the like, the pager looks into the message from above. ), It seems to be upside down, and the message is difficult to read as it is, and there was a drawback that you had to remove it once and read it.

The present invention is intended to solve such conventional problems, and an object thereof is to make it possible to easily read a message without removing the pager fixed to the belt.

[0021]

In order to achieve the above object, the present invention displays a message by reversing the top and bottom according to a designation. In other words, it has a display direction flag indicating whether or not the display is upside down, reverses the order of the columns input to the display data register, and further reverses the bit order of the display data.

Further, the present invention has a display direction flag indicating whether or not the upside-down display is performed, reverses the generation order of the display address, and further reverses the bit order of the display data.

[0023]

The present invention makes it possible to display the message by reversing the top and bottom by the above-mentioned constitutions, and to easily read the message without removing the pager fixed to the belt.

[0024]

【Example】

Embodiment 1 Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a pager in which a message is displayed upside down. FIG. 1A shows an example in which the top and bottom are inverted and displayed, and FIG. 1B shows the appearance when the pager is looked into from above. By enabling such display, the message can be easily read even when the pager is fixed to the belt.

FIG. 2 shows a concrete example for realizing the display method of FIG. In FIG. 2, reference numeral 21 is a display direction flag indicating whether or not the upside down display is performed, 22 is a bit order invertor for reversing the bit order of the display data output from the character pattern generating table 73, and 23 is an up count and down count. A counter for character pattern generation whose count can be switched,
An address generator 24 is capable of switching between up-counting and down-counting.

In this embodiment, the upside-down display is realized by outputting the message pattern in the reverse order to reverse the left and right, and further by reversing the bit order of the display data to reverse the upper and lower sides. Whether the message is turned upside down is set by writing 0 or 1 in the display direction flag from the CPU or the like which controls the pager. Here, when the value is 0, it is assumed that the display is reversed.

In order to output the message patterns in reverse order, it is necessary to generate the character codes of the message in reverse order and to output the left and right of each character pattern in reverse. In order to output the character code of the message in reverse order, the address generator 24 capable of switching between up-counting and down-counting is used. The address generator 24 is the address generator 77 used in the conventional example, to which a down-counting function is added. When the display direction flag 21 is 1, it works as an up count and outputs addresses in a normal order, and when the display direction flag 21 is 0, it works as a down count and outputs addresses in reverse order.

This circuit has, for example, a configuration such as TTL 74169 which is generally used, and at the time of an up-counting operation, it first counts after preloading the top address of a message. In the down count operation, the address indicating the last character of the message is first preloaded and then the count is performed. In this embodiment, it is assumed that the message has the same number of characters as the maximum number of displayed characters for simplification. When the maximum number of characters to be displayed is W, generally, when counting down, counting is performed after preloading the address indicating the Wth character. In this way, when the display direction flag 21 is 0, the message character codes are output to the character pattern generating table 73 in reverse order.

In order to output the left and right character patterns in reverse, a character pattern generating counter 23 capable of switching between up-counting and down-counting is used. This character pattern generating counter is a character pattern generating counter 75 used in the conventional example with a down-counting function added. When the display direction flag is 1, it outputs a signal for acting as up-count to generate the character patterns in the normal order, and when the display direction flag is 0, it acts as down-count and outputs a signal for generating the character patterns in the reverse order. Output. That is, the signals from 5 to 0 are sequentially generated in synchronization with the clock. When the character pattern generation counter 23 returns from 0 to 5, a carry signal is generated, and the signal is sent to the address generator 24.

The bit sequence inversion unit 22 is for inverting the bit sequence of the dot pattern output from the character pattern generation table 73. When the display direction flag is 1, it is not reversed, and when it is 0, it is reversed. FIG. 3 shows an example of the circuit configuration of the bit forward inverter 22.

Data lines of the bit pattern from the table are represented by i0 to i6, and output data lines of the bit forward inverter 22 are represented by o0 to o6. The operation will be described by taking a circuit for outputting o0 as an example. i for the circuit that outputs o0
0 and i6 are input, and up is used as a signal line for selecting it.
There is a / down * signal line. This signal line has the value of the display direction register, and when it is 1, it is not inverted, and when it is 0, it is instructed to be inverted. When the up / down * signal is 1, the signal i0 is directly output to o0. The same applies to the other circuits, and when the up / down * signal is 1, the input signal is output to the output data line directly opposed to each other in the figure. In other words, it is output without inverting anything.

When the up / down * signal is 0, i
The signal of 6 is output to o0. Other circuits are similar, up
When the / down * signal is 0, the input signal is output to the output data lines diagonally shown in the figure. In other words, the image is output with the left and right reversed. Here, the number of data lines is seven, but this number depends on the data output to the display.
If the number of data lines is odd, the central data line outputs the same input signal directly in both inversion and non-inversion as shown in the figure.
Although no special circuit is required, it can be easily inferred that a circuit similar to the others is required in the case of an even number.

By the individual operations described above, the upside down display and the non-upside down display can be realized. That is, when the display direction flag is 1, the same operation as that shown in the conventional example is shown, when the display direction flag is 0, the character code of the message is generated in the reverse order, and the pattern of each character is generated in the reverse order. By inverting the bit order of those data, upside down display is possible.

(Embodiment 2) FIG. 4 is a second specific example for realizing the display method of FIG. In FIG. 4, reference numeral 41 is a display address signal generator. Display address signal generator 41
When the display direction flag 21 is 1, the display address signals are activated in the positive order from b0 to b83, and when the display direction flag 21 is 0, the display address signals are directed from b83 to b0. Then, they are activated in reverse order.

In the present embodiment, the upside down display is realized by changing the generation order of the character patterns as shown in the first embodiment and outputting them in the left-right reverse order when displaying on the display. is there. Note that reversing the bit order of 7-bit dot data is the same as in the first embodiment.

FIG. 5 shows a concrete example of the display address signal generator 41. Reference numeral 51 is a bit forward inverter.
5 is the same as the display address signal generator of FIG. 9 shown in the conventional example except that there is a bit forward inverter 51. That is, every time a clock is input, one signal is activated in order from b0 ′ to b83 ′. The bit forward inverter 51 has a circuit configuration similar to that of the bit forward inverter shown in FIG. That is, when the up / down * signal is 1, b
Signals 0'to b83 'directly face each other b0 to b
It is output to the signal of 83. When the up / down * signal is 0, the signals b0 ′ to b83 ′ are output to the diagonal signals b83 to b0, so that one signal is activated in order from b83 to b83.

That is, when the display direction flag is 1, non-upside down display is performed by the same operation as in the conventional example, and when the display direction flag 0 is 0, character codes are sequentially generated in the same manner as in the conventional example, and the character pattern generation table is displayed. To similarly generate character pattern data. The bit order of the pattern is inverted and written in the display data register, and the display address given to the display at that time is generated by the display address signal generator 41 in the left-right reverse order (that is, from b83 to b0 in order). (By generating), upside down display is realized.

In this example, a 7 × 84 dot matrix display is shown as an example, but the present invention is not limited to this dot configuration. In this example, the icon indicating the reception status is not mentioned, but the same icon as in non-upside down display may be used in the upside down display, or the icon for the upside down display may be used. . These are generally in the easily conceivable range.

It can be easily inferred that the same method can be used when a display device such as a 7-segment display is used in addition to the dot matrix.

In addition to the message, a time stamp of receiving the message may be displayed together in another segment. In this case as well, it is easily inferred that the upside-down display can be performed using the same method.

In this example, the character pattern generator is shared between the upside down display and the non-upside down display, and the pattern is reversed in the reverse order by the character pattern generation counter and the bit order inversion device. In the pattern generator, the same effect can be obtained by using a pattern in which the left and right sides or the top and bottom sides of the characters are reversed and switching by using the display direction flag. It can be easily inferred that it is similar to having a counter or a bit-order generator.

Even if the system of this example is configured by software or the like, it is obvious that it is the same as this example. In this example, we have only one message for the sake of simplification, and we assumed a message with the same number of characters that can be displayed. However, even if there are multiple messages, the number of characters in the message is more or less than the number of characters that can be displayed. Also, it is obvious that this method can be realized by using the method of this embodiment as a core and by combining the conventional pager display methods.

In this example, a pager having a 1-line display is assumed, but it is clear that a pager having a plurality of lines can be dealt with by reversing the generation order of the pager lines. Is.

Further, it is obvious that the scrolling of messages can be realized by using the method of this embodiment as the core and adjusting the scrolling of the conventional pager.
Further, when the message is not stored as the character code but the display pattern is stored as it is, the character pattern generation table of the present embodiment is not necessary at the time of display, but the character code received at the time of receiving the message must be converted to the pattern. Is required, and the character pattern generation table is used at that time. That is, the difference is whether to refer to the character pattern generation table at the time of display or to refer to the character pattern generation table at the time of receiving a message, and it can be easily inferred that it is within the scope of the present invention when storing in a pattern. The circuit configuration shown in this embodiment is an example,
The use of this circuit is not limited.

[0045]

By displaying the message upside down, it is possible to easily read the message without removing the pager fixed to the belt or the like.

[Brief description of drawings]

FIG. 1 is a pager display diagram in the case of upside down display according to the present invention.

FIG. 2 is a conceptual diagram showing a configuration of a pager display system in the first embodiment of the present invention.

FIG. 3 is a conceptual diagram showing the configuration of a bit forward inverter in the first embodiment of the present invention.

FIG. 4 is a conceptual diagram showing a configuration of a pager display system in a second embodiment of the present invention.

FIG. 5 is a conceptual diagram showing a configuration of a display address signal generator according to a second embodiment of the present invention.

FIG. 6 is a diagram showing a display example of a conventional pager.

FIG. 7 is a conceptual diagram showing a configuration of a conventional pager.

FIG. 8 is a conceptual diagram of a character pattern generation table.

FIG. 9 is a conceptual diagram showing a configuration of a display address signal generator of a conventional pager.

[Explanation of symbols]

 21 Display Direction Flag 22 Bit Forward Inverter 23 Character Pattern Generation Counter 24 Address Generator 41 Display Address Signal Generator 51 Bit Forward Inverter 71 Display 72 Display Address Signal Generator 73 Character Pattern Generation Table 74 Display Data Register 75 Character pattern generation counter 76 Message memory 77 Address generator

Claims (4)

[Claims] 1. A display character code is generated in reverse order, individual character patterns thereof are generated in reverse order, the bit order of the character pattern is reversed, and the pattern is displayed in a normal order on a display of a pager. Depending on the pager display method of upside down display. 2. A display character code is generated in a normal order, individual character patterns thereof are generated in a normal order, the bit order of these character patterns is reversed, and the pattern is displayed in reverse order on a display of a pager. Depending on the pager display method of upside down display. 3. The pager display method according to claim 1, further comprising a display direction flag indicating whether or not to display the message in the upside down display, and enabling the upside down display to be selected. 4. The pager display method according to claim 2, further comprising a display direction flag indicating whether or not to display the message in the upside down display, and enabling the upside down display to be selected.