JPH09304206A - Semiconductor pressure transducer - Google Patents

Semiconductor pressure transducer

Info

Publication number
JPH09304206A
JPH09304206A JP11895596A JP11895596A JPH09304206A JP H09304206 A JPH09304206 A JP H09304206A JP 11895596 A JP11895596 A JP 11895596A JP 11895596 A JP11895596 A JP 11895596A JP H09304206 A JPH09304206 A JP H09304206A
Authority
JP
Japan
Prior art keywords
semiconductor chip
diaphragm
pedestal
semiconductor
stress
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11895596A
Other languages
Japanese (ja)
Other versions
JP3359493B2 (en
Inventor
Masayuki Yoneda
雅之 米田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Azbil Corp
Original Assignee
Azbil Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Azbil Corp filed Critical Azbil Corp
Priority to JP11895596A priority Critical patent/JP3359493B2/en
Publication of JPH09304206A publication Critical patent/JPH09304206A/en
Application granted granted Critical
Publication of JP3359493B2 publication Critical patent/JP3359493B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor pressure transducer which minimizes a zero shaft and its irregularity due to a temperature and to a static pressure. SOLUTION: A square diaphragm 3 is formed in the center of a square semiconductor chip 2 so as to be tilted at about 45 deg. with reference to the semiconductor chip 2. The semiconductor chip 2 is anodically bonded to a pedestal 4. The whole rear of a thick part 2a at the semiconductor chip 2 is not bonded to the pedestal 4, every corner part is separated from the pedestal 4 by forming a step part 10, and a non-bonded part 13 is formed. The size of the non-bonded part 13 is formed in such a way that a stress σr, in the direction of diagonal lines of the semiconductor chip 2 (a direction perpendicular to sides of the diaphragm), which is generated in diffusion resistances 6a to 6d is equal to a stress σθ in a direction perpendicular to the diagonal lines of the chip (a direction parallel to the sides of the diaphragm).

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、差圧あるいは圧力
を検出する半導体圧力変換器に関し、特に多角形の半導
体チップに多角形のダイアフラムをその対角線が半導体
チップの対角線と直交するように形成した半導体圧力変
換器に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor pressure transducer for detecting a differential pressure or a pressure, and more particularly to a polygonal semiconductor chip having a polygonal diaphragm formed so that its diagonal line is orthogonal to the diagonal line of the semiconductor chip. The present invention relates to a semiconductor pressure converter.

【0002】[0002]

【従来の技術】従来、差圧あるいは圧力を検出する半導
体圧力変換器としては、Si(シリコン)半導体ダイア
フラムを利用したものが知られている。このSiダイア
フラム型半導体圧力変換器は、半導体結晶からなる基板
の表面に不純物の拡散もしくはイオン打ち込み技術によ
りピエゾ抵抗領域として作用するゲージ(拡散抵抗)を
形成すると共に、Alの蒸着等によりリードを形成し、
裏面の一部をエッチングによって除去することにより厚
さ20μm〜60μm程度の薄肉部、すなわちダイアフ
ラムを形成して構成したものである。差圧や液面高さを
測定するときにはダイアフラムの表裏面に高圧側と低圧
側の圧力がそれぞれ加えられ、その差圧に応じてダイア
フラム内に生じる応力が圧力により変化するので、拡散
抵抗の抵抗値がダイアフラム内に生じる応力により変化
し、この時の抵抗変化に伴う出力電圧を検出し、差圧ま
たは圧力を測定するものである。
2. Description of the Related Art Conventionally, as a semiconductor pressure converter for detecting a differential pressure or pressure, one using a Si (silicon) semiconductor diaphragm is known. This Si diaphragm type semiconductor pressure transducer forms a gauge (diffusion resistance) acting as a piezoresistive region on the surface of a substrate made of a semiconductor crystal by an impurity diffusion or ion implantation technique, and also forms a lead by vapor deposition of Al or the like. Then
By removing a part of the back surface by etching, a thin portion having a thickness of about 20 μm to 60 μm, that is, a diaphragm is formed. When measuring the differential pressure or liquid level, the high pressure side and the low pressure side are applied to the front and back sides of the diaphragm respectively, and the stress generated in the diaphragm changes depending on the pressure difference, so the resistance of the diffusion resistance The value changes due to the stress generated in the diaphragm, the output voltage accompanying the resistance change at this time is detected, and the differential pressure or the pressure is measured.

【0003】半導体チップとしては、もともと円形のダ
イアフラムを有する円形のチップが一般的であったが、
最近では結晶ウエハを切断することにより複数の正方形
のチップを容易に得ることができることから円形のダイ
アフラムを有する正方形のもの(例:特開昭59−11
4874号公報)や、正方形のダイアフラムを有する正
方形のチップが一般的になりつつある。特に、ダイアフ
ラムの形状としては、正方形の場合、チップの裏面側に
正方形の凹陥部をエッチングする際、サイドエッチが起
こらないため寸法制御が容易で、小型化が可能な異方性
エッチングを行うことができる。
As a semiconductor chip, a circular chip having a circular diaphragm was originally generally used.
Recently, it is possible to easily obtain a plurality of square chips by cutting a crystal wafer, and therefore, a square one having a circular diaphragm (eg, JP-A-59-11).
No. 4874) and a square chip having a square diaphragm are becoming common. In particular, when the shape of the diaphragm is square, side etching does not occur when etching the square recessed portion on the back surface side of the chip, so dimension control is easy, and anisotropic etching that can be downsized should be performed. You can

【0004】図10および図11は半導体圧力変換器の
従来例を示す平面図および断面図である。この半導体圧
力変換器1は、正方形の半導体チップ2の中央に正方形
のダイアフラム3をその対角線a,aが半導体チップの
対角線b,bと直交するように形成し、半導体チップ2
を台座4上に陽極接合している。このため、ダイアフラ
ム3は、半導体チップ2に対して45°傾いて形成され
ている。半導体チップ2は、結晶面方位が(100)面
のp型単結晶Siからなり、エッチングによるダイアフ
ラム3の形成により裏面側に凹陥部5が形成され、外周
部が厚肉部2aを形成し台座4に接合されている。
10 and 11 are a plan view and a sectional view showing a conventional example of a semiconductor pressure converter. In this semiconductor pressure converter 1, a square diaphragm 3 is formed in the center of a square semiconductor chip 2 so that its diagonal lines a, a are orthogonal to the diagonal lines b, b of the semiconductor chip.
Is anodically bonded to the base 4. For this reason, the diaphragm 3 is formed with an inclination of 45 ° with respect to the semiconductor chip 2. The semiconductor chip 2 is made of p-type single crystal Si having a crystal plane orientation of (100) plane, a recess 5 is formed on the back surface side by the formation of the diaphragm 3 by etching, and a peripheral portion forms a thick portion 2a to form a pedestal. It is joined to 4.

【0005】ダイアフラム3の表面の縁部付近には、ピ
エゾ領域として作用し差圧または圧力を検出する4つの
拡散抵抗6a〜6dが前記半導体チップ2の対角線b,
b上に位置して形成されている。また、4つの拡散抵抗
6a〜6dは、半導体チップ2の結晶面方位(100)
においてピエゾ抵抗係数が最大となる<110>の結晶
軸方向と平行に形成される。このような拡散抵抗6a〜
6dは、拡散またはイオン打ち込み法によって形成さ
れ、ホイールストーンブリッジに結線されることでダイ
アフラム3の表裏面に加えられた低圧および高圧側圧力
P1 ,P2 の差圧信号を差動的に出力する。このときの
抵抗変化率は、次式によって表される。 ΔR/R=π44(σr−σθ)/2 ・・・・・(1) ただし、π44はピエゾ抵抗係数、σrはダイアフラムの
辺に垂直な応力、σθはダイアフラムの辺に平行な応力
である。
In the vicinity of the edge of the surface of the diaphragm 3, four diffusion resistors 6a to 6d, which act as a piezo region and detect a differential pressure or pressure, are provided on the diagonal line b of the semiconductor chip 2.
It is formed on b. Further, the four diffusion resistors 6a to 6d have the crystal plane orientation (100) of the semiconductor chip 2.
In parallel with the <110> crystal axis direction where the piezoresistive coefficient is maximum in. Such diffused resistors 6a-
6d is formed by a diffusion or ion implantation method and is connected to a wheelstone bridge to differentially output a differential pressure signal of the low pressure and high pressure side pressures P1 and P2 applied to the front and back surfaces of the diaphragm 3. The resistance change rate at this time is represented by the following equation. ΔR / R = π 44 (σr−σθ) / 2 (1) where π 44 is the piezoresistance coefficient, σr is the stress perpendicular to the side of the diaphragm, and σθ is the stress parallel to the side of the diaphragm. is there.

【0006】台座4は、半導体チップ2と熱膨張係数が
近似したパイレックスガラス、セラミックス等によって
形成され、中央には前記半導体チップ2の裏面側に形成
された凹陥部5を介してダイアフラム3の裏面側に測定
すべき低圧側の圧力P1 を導く貫通孔7が形成されてい
る。
The pedestal 4 is formed of Pyrex glass, ceramics, or the like having a thermal expansion coefficient similar to that of the semiconductor chip 2, and the back surface of the diaphragm 3 is provided in the center with a recess 5 formed on the back surface side of the semiconductor chip 2. A through hole 7 is formed on the side for guiding the low pressure side pressure P1 to be measured.

【0007】[0007]

【発明が解決しようとする課題】上記した従来の半導体
圧力変換器1において、半導体チップ2の材料はシリコ
ンで、台座4は熱膨張の影響を考慮しパイレックスガラ
ス、セラミックス等が使用されている。しかしながら、
ダイアフラム3の両面にかかる圧力P1 ,P2 の差が零
であっても温度や静圧が変化した場合、材料の相違およ
び形状により上記(1)式におけるσr−σθが零にな
らず出力を発生させるため、ゼロ点がシフトするという
問題があった。特に、半導体チップ2の形状について
は、円形のダイアフラムを有する円形のチップの場合は
半導体チップの軸線に関して対称性を有するため問題な
いが、正方形の場合は軸対称性が失われるため、温度変
化または静圧によりσr≠σθとなり、抵抗値変化が起
こる。したがって、ゼロシフトが発生し、差圧を高い精
度で検出することができず、信号を電子的に補償する手
段を講じる必要がある。
In the above-mentioned conventional semiconductor pressure converter 1, the material of the semiconductor chip 2 is silicon, and the pedestal 4 is made of Pyrex glass, ceramics or the like in consideration of the influence of thermal expansion. However,
Even if the difference between the pressures P1 and P2 applied to both sides of the diaphragm 3 is zero, if the temperature or static pressure changes, σr-σθ in the above equation (1) does not become zero and an output is generated due to the difference in material and shape. Therefore, there is a problem that the zero point shifts. In particular, regarding the shape of the semiconductor chip 2, in the case of a circular chip having a circular diaphragm, there is no problem because it has symmetry with respect to the axis of the semiconductor chip, but in the case of a square, the axial symmetry is lost, so there is a change in temperature or Due to static pressure, σr ≠ σθ, and the resistance value changes. Therefore, zero shift occurs, the differential pressure cannot be detected with high accuracy, and it is necessary to take measures to electronically compensate the signal.

【0008】本発明は上記した従来の問題点を解決する
ためになされたもので、その目的とするところは、温度
や静圧によるゼロシフトとそのばらつきを最小にし、良
好な温度特性の半導体圧力変換器を提供することにあ
る。
The present invention has been made to solve the above-mentioned conventional problems, and an object thereof is to minimize the zero shift and its variation due to temperature or static pressure, and to convert the semiconductor pressure with good temperature characteristics. To provide a container.

【0009】[0009]

【課題を解決するための手段】上記目的を解決するため
に本発明は、多角形の半導体チップの中央に多角形のダ
イアフラムを半導体チップに対し略45°傾けて形成
し、前記ダイアフラムの縁部付近で前記半導体チップの
対角線上に拡散抵抗を設け、前記半導体チップの厚肉部
を台座に接合した半導体圧力変換器において、前記拡散
抵抗に生じる半導体チップの対角線方向の応力と前記対
角線に垂直な方向の応力が等しくなるように、前記半導
体チップの角部と前記台座との間に非接合部を設けたこ
とを特徴とする。また、本発明は、半導体チップと台座
の少なくとも一方に非接合部を形成する段差部を設けた
ことを特徴とする。
In order to solve the above-mentioned problems, the present invention forms a polygonal diaphragm in the center of a polygonal semiconductor chip with an inclination of about 45 ° with respect to the semiconductor chip, and forms an edge portion of the diaphragm. A diffusion resistance is provided on a diagonal line of the semiconductor chip in the vicinity, and in a semiconductor pressure converter in which a thick portion of the semiconductor chip is joined to a pedestal, a stress in a diagonal direction of the semiconductor chip generated in the diffusion resistance and a perpendicular to the diagonal line. It is characterized in that a non-bonding portion is provided between the corner portion of the semiconductor chip and the pedestal so that the stress in the directions becomes equal. Further, the present invention is characterized in that a step portion that forms a non-bonded portion is provided on at least one of the semiconductor chip and the pedestal.

【0010】多角形のダイアフラムを有する多角形の半
導体チップにおいては、半導体チップの軸線に関して軸
対称性を示さないため、台座を半導体チップの裏面全体
に接合した場合、拡散抵抗を形成した位置における応力
は、ダイアフラムの中心方向に向かう応力σrがこれと
垂直な方向の応力σθより大きく、σr>σθとなる。
台座と半導体チップとの接合部を少なくしていくと、逆
にダイアフラムの中心方向に対して垂直な方向の応力σ
θが大きくなり、σr<σθとなる。そこで、半導体チ
ップと台座との間に非接合部を設け、非接合部の長さと
接合部の長さとの比を最適化するとσr=σθとなり、
抵抗値変化率は理論上零となる。
Since a polygonal semiconductor chip having a polygonal diaphragm does not exhibit axial symmetry with respect to the axis of the semiconductor chip, when the pedestal is bonded to the entire back surface of the semiconductor chip, stress at the position where the diffusion resistance is formed is generated. Indicates that the stress σr toward the center of the diaphragm is larger than the stress σθ in the direction perpendicular thereto, and σr> σθ.
When the number of joints between the pedestal and the semiconductor chip is reduced, conversely, the stress σ in the direction perpendicular to the center direction of the diaphragm is
θ increases, and σr <σθ. Therefore, if a non-bonding part is provided between the semiconductor chip and the pedestal and the ratio of the length of the non-bonding part and the length of the bonding part is optimized, σr = σθ
The resistance change rate is theoretically zero.

【0011】[0011]

【発明の実施の形態】以下、本発明を図面に示す実施の
形態に基づいて詳細に説明する。図1は本発明に係る半
導体圧力変換器の一実施の形態を示す平面図、図2は図
1のII−II線断面図である。なお、従来技術の欄で示し
た構成部材等と同一のものについては同一符号をもって
示し、その説明を適宜省略する。これらの図において、
正方形の半導体チップ2は、略45°傾いて形成された
正方形のダイアフラム3を有し、厚肉部2aが台座4上
に陽極接合されている。この場合、厚肉部2aの裏面全
体が台座4に接合されるのではなく、各角部が段差部1
0の形成によって台座4から離間されることにより非接
合部13を形成している。この段差部10、言い換えれ
ば非接合部13の大きさは、拡散抵抗6a〜6dに生じ
る半導体チップの対角線方向(ダイアフラムの辺に垂直
な方向)の応力σrと前記対角線に垂直な方向(ダイア
フラムの辺に平行な方向)の応力σθが等しくなるよう
に形成されている。言い換えれば、非接合部13の長さ
Aと接合部13Aの長さBとの比A/Bを最適化するこ
とにより、σr=σθとしている。その他の構成は上記
した従来の半導体圧力変換器と同一である。
BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below in detail based on the embodiments shown in the drawings. 1 is a plan view showing an embodiment of a semiconductor pressure converter according to the present invention, and FIG. 2 is a sectional view taken along line II-II of FIG. The same components as those shown in the section of the prior art are denoted by the same reference numerals, and the description thereof will be omitted as appropriate. In these figures,
The square semiconductor chip 2 has a square diaphragm 3 formed at an angle of approximately 45 °, and the thick portion 2 a is anodically bonded onto the pedestal 4. In this case, the entire back surface of the thick portion 2a is not joined to the pedestal 4, but each corner portion is formed by the step portion 1
By forming 0, the non-bonded portion 13 is formed by being separated from the pedestal 4. The size of the step portion 10, that is, the size of the non-joint portion 13 is determined by the stress σr generated in the diffusion resistors 6a to 6d in the diagonal direction of the semiconductor chip (direction perpendicular to the side of the diaphragm) and the direction perpendicular to the diagonal line (diaphragm It is formed so that the stress σθ in the direction parallel to the side) becomes equal. In other words, σr = σθ is set by optimizing the ratio A / B of the length A of the non-bonded portion 13 and the length B of the bonded portion 13A. Other configurations are the same as those of the conventional semiconductor pressure converter described above.

【0012】半導体チップ2と台座4の接合面はダイア
フラム3の変形に関係し、正方形の半導体チップ2に対
し正方形のダイアフラム3を互いに対角線が直交するよ
うに45°傾けて形成した場合、半導体チップ2の接合
面のうち対角線方向の接合面の長さが長く、そのため厚
肉部2aの裏面全体を接合するとダイアフラム3の辺に
垂直な応力σrがダイアフラム3の辺に平行な応力σθ
より大きくなる。
The joint surface between the semiconductor chip 2 and the pedestal 4 is related to the deformation of the diaphragm 3, and when the square diaphragm 3 is inclined 45 ° so that the diagonal lines are orthogonal to each other with respect to the square semiconductor chip 2, the semiconductor chip is formed. Of the two bonding surfaces, the length of the diagonal bonding surface is long. Therefore, when the entire back surface of the thick portion 2a is bonded, the stress σr perpendicular to the side of the diaphragm 3 is parallel to the side of the diaphragm 3 and the stress σθ.
Get bigger.

【0013】そこで、段差部10の形成によって非接合
部13を設け、半導体チップ2の対角線方向の接合面の
長さを小さくしていくと、ダイアフラム3の辺に垂直な
応力σrが徐々に小さくなり、ダイアフラム3の辺に平
行な応力σθが大きくなる。したがって、段差部10を
最適な大きさに形成すると、ダイアフラム3の辺に垂直
な応力σrとダイアフラム3の辺に平行な応力σθを等
しくすることができる。その結果、抵抗変化率が零とな
り、温度、静圧等による出力のゼロシフトを小さくする
ことができる。
Therefore, when the non-joint portion 13 is provided by forming the step portion 10 and the length of the diagonal joint surface of the semiconductor chip 2 is reduced, the stress σr perpendicular to the side of the diaphragm 3 gradually decreases. Therefore, the stress σθ parallel to the side of the diaphragm 3 increases. Therefore, when the step portion 10 is formed to have an optimum size, the stress σr perpendicular to the side of the diaphragm 3 and the stress σθ parallel to the side of the diaphragm 3 can be equalized. As a result, the rate of resistance change becomes zero, and the zero shift of the output due to temperature, static pressure, etc. can be reduced.

【0014】図3は本発明の他の実施の形態を示す平面
図、図4は図3のIV−IV線断面図である。この実施
の形態においては、円筒体からなる台座4の上面外周部
に環状の段差部14を形成し、半導体チップ2の裏面角
部を台座4から離間させることにより非接合部13とし
ている。このような構造においても、非接合部13を設
けているので、σr−σθを零にすることができ、ゼロ
シフトをなくすことができる。
FIG. 3 is a plan view showing another embodiment of the present invention, and FIG. 4 is a sectional view taken along the line IV-IV of FIG. In this embodiment, an annular step portion 14 is formed on the outer peripheral surface of the upper surface of the pedestal 4 made of a cylindrical body, and the back surface corner portion of the semiconductor chip 2 is separated from the pedestal 4 to form the non-bonded portion 13. Even in such a structure, since the non-bonding portion 13 is provided, σr−σθ can be made zero, and zero shift can be eliminated.

【0015】図5は本発明のさらに他の実施の形態を示
す平面図、図6は図5のVI−VI線断面図である。こ
の実施の形態においては、ダイアフラム3に1つの拡散
抵抗6を形成し、この拡散抵抗6側の裏面角部を段差部
10の形成によって非接合部13としている。拡散抵抗
6は、外部の抵抗と接続されてホイールストン・ブリッ
ジ回路を形成している。このような構造においても、上
記した実施の形態と同様にσr−σθを零にすることが
でき、ゼロシフトをなくすことができる。
FIG. 5 is a plan view showing still another embodiment of the present invention, and FIG. 6 is a sectional view taken along line VI-VI of FIG. In this embodiment, one diffusion resistance 6 is formed on the diaphragm 3, and the corner portion of the back surface on the diffusion resistance 6 side is formed as the non-bonding portion 13 by forming the step portion 10. The diffused resistor 6 is connected to an external resistor to form a wheelstone bridge circuit. Also in such a structure, σr−σθ can be set to zero as in the above-described embodiment, and zero shift can be eliminated.

【0016】図7は本発明のさらに他の実施の形態を示
す平面図、図8は図7のVIII−VIII線断面図である。こ
の実施の形態においては、2つの拡散抵抗6a,6cを
ダイアフラム3の隣合う2つの辺の近傍部に形成し、こ
れらの拡散抵抗6a,6c側の裏面角部を段差部10の
形成によって非接合部13としている。2つの拡散抵抗
6a,6cは、回路構成が容易なハーフホイールストン
・ブリッジ回路を形成する。このような構造において
も、拡散抵抗6a,6cに対向する2つの角部の裏面側
を段差部10の形成によって非接合部13としているの
で、上記した実施の形態と同様な効果が得られる。
FIG. 7 is a plan view showing still another embodiment of the present invention, and FIG. 8 is a sectional view taken along line VIII-VIII of FIG. In this embodiment, two diffused resistors 6a and 6c are formed in the vicinity of two adjacent sides of the diaphragm 3, and the back surface corners on the side of these diffused resistors 6a and 6c are not formed by forming the step portion 10. The joint 13 is formed. The two diffused resistors 6a and 6c form a half-wheelstone bridge circuit whose circuit configuration is easy. Even in such a structure, since the back surface sides of the two corner portions facing the diffused resistors 6a and 6c are formed as the non-joint portion 13 by forming the step portion 10, the same effect as that of the above-described embodiment can be obtained.

【0017】[0017]

【実施例】本発明の効果の確認のため実施した実験の結
果を図9に示す。実験に用いた半導体圧力変換器はシリ
コン製の正方形の半導体チップにパイレレックスガラス
からなる角柱体の台座を陽極接合によって接合したもの
で、三種類の寸法について確認を行なった。図9の縦軸
は応力(σr−σθ)、横軸は対角線上の非接合部Aと
接合部B(図1参照)の長さの比(A/B)で、三種類
の曲線はいずれもσr−σθ=0を横切っており、A,
Bの数値によりゼロシフトをなくすことができることが
明かである。
EXAMPLE The result of the experiment conducted to confirm the effect of the present invention is shown in FIG. The semiconductor pressure transducer used in the experiment was a square semiconductor chip made of silicon, to which a pedestal of a prismatic body made of Pyrex glass was bonded by anodic bonding, and three types of dimensions were confirmed. The vertical axis of FIG. 9 is the stress (σr−σθ), the horizontal axis is the ratio (A / B) of the lengths of the non-bonded portion A and the bonded portion B (see FIG. 1) on the diagonal line, and the three types of curves are Also crosses σr−σθ = 0, and A,
It is clear that the value of B can eliminate the zero shift.

【0018】なお、本発明は上記した実施の形態に限定
されるものではなく、半導体圧力変換器の各部の形状、
構造等を適宜変形、変更することが可能で、例えば台座
4を円柱体に形成したが、正方形の半導体チップ2と同
一の角柱体に形成してもよい。その場合、非接合部13
を構成する段差部14は、台座4の上面のみに形成して
もよく、角部の高さ方向全長に形成して八角形としても
よい。また、正方形の半導体チップ2も二枚のシリコン
プレートから構成されるものでもよく、前記シリコンプ
レートの接合部に適用されて効果が発揮される。さら
に、上記した実施の形態および実施例においてはいずれ
も正方形の半導体チップに正方形のダイアフラムを形成
した例を示したが、本発明はこれに特定されるものでは
なく、八角形の半導体チップに正方形のダイアフラムを
形成したり、あるいは正方形の半導体チップに八角形の
ダイアフラムを形成してもよい。
The present invention is not limited to the above embodiment, but the shape of each part of the semiconductor pressure transducer,
The structure and the like can be appropriately modified and changed. For example, the pedestal 4 is formed in a cylindrical body, but it may be formed in the same prismatic body as the square semiconductor chip 2. In that case, the non-bonded portion 13
The stepped portion 14 constituting the above may be formed only on the upper surface of the pedestal 4, or may be formed in the entire length in the height direction of the corner portion to form an octagon. Further, the square semiconductor chip 2 may also be composed of two silicon plates, and the effect is exerted by being applied to the joint portion of the silicon plates. Further, in each of the above-described embodiments and examples, an example in which a square diaphragm is formed on a square semiconductor chip is shown, but the present invention is not limited to this, and an octagonal semiconductor chip has a square shape. The diaphragm may be formed, or an octagonal diaphragm may be formed on a square semiconductor chip.

【0019】[0019]

【発明の効果】以上説明したように本発明に係る半導体
圧力変換器は、多角形の半導体チップの中央に多角形の
ダイアフラムを半導体チップに対し略45°傾けて形成
し、前記ダイアフラムの縁部付近で前記半導体チップの
対角線上に拡散抵抗を設け、前記半導体チップの厚肉部
を台座に接合した半導体圧力変換器において、前記拡散
抵抗に生じる半導体チップの対角線方向の応力と前記対
角線に垂直な方向の応力が等しくなるように、前記半導
体チップの角部と前記台座との間に非接合部を設けたの
で、温度や静圧によるゼロシフトが生じず、温度特性の
良好な半導体圧力変換器を提供することができる。ま
た、ダイアフラムを正方形に形成したので、段差部を形
成する時の寸法制御が容易で、異方性エッチングを行う
ことができるため、小型化が可能である。
As described above, in the semiconductor pressure transducer according to the present invention, a polygonal diaphragm is formed in the center of the polygonal semiconductor chip with an inclination of about 45 ° with respect to the semiconductor chip, and the edge portion of the diaphragm is formed. A diffusion resistance is provided on a diagonal line of the semiconductor chip in the vicinity, and in a semiconductor pressure converter in which a thick portion of the semiconductor chip is joined to a pedestal, a stress in a diagonal direction of the semiconductor chip generated in the diffusion resistance and a perpendicular to the diagonal line. Since a non-joint portion is provided between the corner portion of the semiconductor chip and the pedestal so that the stress in the directions becomes equal, zero shift due to temperature or static pressure does not occur, and a semiconductor pressure converter with good temperature characteristics is provided. Can be provided. Further, since the diaphragm is formed in a square shape, it is possible to easily control the dimensions when forming the step portion and perform anisotropic etching, so that the size can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明に係る半導体圧力変換器の一実施の形
態を示す平面図である。
FIG. 1 is a plan view showing an embodiment of a semiconductor pressure converter according to the present invention.

【図2】 図1のII−II線断面図である。FIG. 2 is a sectional view taken along line II-II of FIG.

【図3】 本発明の他の実施の形態を示す平面図であ
る。
FIG. 3 is a plan view showing another embodiment of the present invention.

【図4】 図3のIV−IV線断面図である。4 is a sectional view taken along line IV-IV of FIG.

【図5】 本発明のさらに他の実施の形態を示す平面図
である。
FIG. 5 is a plan view showing still another embodiment of the present invention.

【図6】 図5のVI−VI線断面図である。6 is a sectional view taken along line VI-VI of FIG.

【図7】 本発明のさらに他の実施の形態を示す平面図
である。
FIG. 7 is a plan view showing still another embodiment of the present invention.

【図8】 図7のVIII−VIII線断面図である。8 is a sectional view taken along line VIII-VIII in FIG.

【図9】 非接合部と接合部の比と辺に垂直な応力と辺
に平行な応力の差の関係を示すグラフである。
FIG. 9 is a graph showing the relationship between the ratio of the non-bonded portion to the bonded portion, the difference between the stress perpendicular to the side and the stress parallel to the side.

【図10】 半導体圧力変換器の従来例を示す平面図で
ある。
FIG. 10 is a plan view showing a conventional example of a semiconductor pressure converter.

【図11】 同変換器の断面図である。FIG. 11 is a cross-sectional view of the converter.

【符号の説明】[Explanation of symbols]

1…半導体圧力変換器、2…半導体チップ、3…ダイア
フラム、4…基台、5…凹陥部、6,6a〜6d…拡散
抵抗、10…段差部、13…非接合部、14…段差部。
DESCRIPTION OF SYMBOLS 1 ... Semiconductor pressure converter, 2 ... Semiconductor chip, 3 ... Diaphragm, 4 ... Base, 5 ... Recessed part, 6, 6a-6d ... Diffusion resistance, 10 ... Step part, 13 ... Non-joint part, 14 ... Step part .

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 多角形の半導体チップの中央に多角形の
ダイアフラムを半導体チップに対し略45°傾けて形成
し、前記ダイアフラムの縁部付近で前記半導体チップの
対角線上に拡散抵抗を設け、前記半導体チップの厚肉部
を台座に接合した半導体圧力変換器において、前記拡散
抵抗に生じる半導体チップの対角線方向の応力と前記対
角線に垂直な方向の応力が等しくなるように前記半導体
チップの角部と前記台座との間に非接合部を設けたこと
を特徴とする半導体圧力変換器。
1. A polygonal diaphragm is formed at a center of a polygonal semiconductor chip with an inclination of about 45 ° with respect to the semiconductor chip, and a diffusion resistance is provided on a diagonal line of the semiconductor chip near an edge of the diaphragm. In a semiconductor pressure converter in which a thick portion of a semiconductor chip is joined to a pedestal, the diagonal portion of the semiconductor chip and the corner portion of the semiconductor chip are equalized so that the stress in the diagonal direction of the semiconductor chip generated in the diffusion resistance is equal to the stress in the direction perpendicular to the diagonal line. A semiconductor pressure converter, wherein a non-bonding portion is provided between the base and the pedestal.
【請求項2】 請求項1記載の半導体圧力変換器におい
て、半導体チップと台座の少なくとも一方に非接合部を
形成する段差部を設けたことを特徴とする半導体圧力変
換器。
2. The semiconductor pressure converter according to claim 1, wherein a stepped portion that forms a non-bonded portion is provided on at least one of the semiconductor chip and the pedestal.
JP11895596A 1996-05-14 1996-05-14 Semiconductor pressure transducer Expired - Lifetime JP3359493B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11895596A JP3359493B2 (en) 1996-05-14 1996-05-14 Semiconductor pressure transducer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11895596A JP3359493B2 (en) 1996-05-14 1996-05-14 Semiconductor pressure transducer

Publications (2)

Publication Number Publication Date
JPH09304206A true JPH09304206A (en) 1997-11-28
JP3359493B2 JP3359493B2 (en) 2002-12-24

Family

ID=14749413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11895596A Expired - Lifetime JP3359493B2 (en) 1996-05-14 1996-05-14 Semiconductor pressure transducer

Country Status (1)

Country Link
JP (1) JP3359493B2 (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002107253A (en) * 2000-09-28 2002-04-10 Kyocera Corp Package for pressure detector
JP2005351901A (en) * 2004-06-11 2005-12-22 Samsung Electronics Co Ltd Combined sensor and its manufacturing method
KR100741520B1 (en) * 2003-03-07 2007-07-20 가부시키가이샤 덴소 Semiconductor pressure sensor having diaphragm
JP2009167067A (en) * 2008-01-18 2009-07-30 Yamatake Corp Anodic bonding method for semiconductor sensor, anodic bonding device and semiconductor sensor
US8042400B2 (en) 2008-10-07 2011-10-25 Yamatake Corporation Pressure sensor
JP2011220935A (en) * 2010-04-13 2011-11-04 Yamatake Corp Pressure sensor
CN102252798A (en) * 2010-04-13 2011-11-23 株式会社山武 Pressure sensor
US8161820B2 (en) 2008-10-07 2012-04-24 Yamatake Corporation Pressure sensor
US9021885B2 (en) 2012-03-14 2015-05-05 Azbil Corporation Pressure sensor chip
JP2017223643A (en) * 2016-06-14 2017-12-21 株式会社デンソー Pressure sensor
WO2017217150A1 (en) * 2016-06-14 2017-12-21 株式会社デンソー Pressure sensor
US11499882B2 (en) 2019-10-09 2022-11-15 Azbil Corporation Pressure sensor

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002107253A (en) * 2000-09-28 2002-04-10 Kyocera Corp Package for pressure detector
KR100741520B1 (en) * 2003-03-07 2007-07-20 가부시키가이샤 덴소 Semiconductor pressure sensor having diaphragm
JP2005351901A (en) * 2004-06-11 2005-12-22 Samsung Electronics Co Ltd Combined sensor and its manufacturing method
JP2009167067A (en) * 2008-01-18 2009-07-30 Yamatake Corp Anodic bonding method for semiconductor sensor, anodic bonding device and semiconductor sensor
US8042400B2 (en) 2008-10-07 2011-10-25 Yamatake Corporation Pressure sensor
US8161820B2 (en) 2008-10-07 2012-04-24 Yamatake Corporation Pressure sensor
CN102252798A (en) * 2010-04-13 2011-11-23 株式会社山武 Pressure sensor
CN102252789A (en) * 2010-04-13 2011-11-23 株式会社山武 Pressure sensor
JP2011220935A (en) * 2010-04-13 2011-11-04 Yamatake Corp Pressure sensor
US8522619B2 (en) 2010-04-13 2013-09-03 Azbil Corporation Pressure sensor
US8671765B2 (en) 2010-04-13 2014-03-18 Azbil Corporation Pressure sensor having a diaphragm
US9021885B2 (en) 2012-03-14 2015-05-05 Azbil Corporation Pressure sensor chip
JP2017223643A (en) * 2016-06-14 2017-12-21 株式会社デンソー Pressure sensor
WO2017217150A1 (en) * 2016-06-14 2017-12-21 株式会社デンソー Pressure sensor
US11499882B2 (en) 2019-10-09 2022-11-15 Azbil Corporation Pressure sensor

Also Published As

Publication number Publication date
JP3359493B2 (en) 2002-12-24

Similar Documents

Publication Publication Date Title
US6006607A (en) Piezoresistive pressure sensor with sculpted diaphragm
US6595065B2 (en) Pressure detecting apparatus with metallic diaphragm
JP5286153B2 (en) Manufacturing method of pressure sensor
JPH09304206A (en) Semiconductor pressure transducer
JP2000105164A (en) Pressure sensor
JPH04130276A (en) Semiconductor acceleration sensor
CN101713692A (en) Pressure sensor
JP3895937B2 (en) Differential pressure / pressure sensor
JPH05196525A (en) Pressure sensor, composite sensor using the same, and its manufacture
JP2694593B2 (en) Semiconductor pressure sensor
JP3433570B2 (en) Semiconductor acceleration sensor
JP2864700B2 (en) Semiconductor pressure sensor and method of manufacturing the same
US11879800B2 (en) MEMS strain gauge pressure sensor with mechanical symmetries
JPH10239345A (en) Semiconductor sensor
JP3084616B2 (en) Diffusion type pressure transducer
US20230341281A1 (en) Semiconductor pressure sensor
JPH06213746A (en) Semiconductor pressure sensor
JPH07234242A (en) Semiconductor acceleration sensor and its manufacture
JP3071932B2 (en) Semiconductor pressure sensor
JP2980440B2 (en) Semiconductor pressure sensor and method of manufacturing the same
JPH0254137A (en) Semiconductor pressure sensor
JP3120388B2 (en) Semiconductor pressure transducer
JPH0536993A (en) Semiconductor pressure detector
JPH0758347A (en) Semiconductor pressure sensor and its manufacture
JPH0344530A (en) Complex sensor

Legal Events

Date Code Title Description
FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20071011

Year of fee payment: 5

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081011

Year of fee payment: 6

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091011

Year of fee payment: 7

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091011

Year of fee payment: 7

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101011

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101011

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111011

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121011

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131011

Year of fee payment: 11

EXPY Cancellation because of completion of term