JPH09283930A - Structure and manufacture of multilayer printed-wiring board - Google Patents

Structure and manufacture of multilayer printed-wiring board

Info

Publication number
JPH09283930A
JPH09283930A JP9071996A JP9071996A JPH09283930A JP H09283930 A JPH09283930 A JP H09283930A JP 9071996 A JP9071996 A JP 9071996A JP 9071996 A JP9071996 A JP 9071996A JP H09283930 A JPH09283930 A JP H09283930A
Authority
JP
Japan
Prior art keywords
copper
clad laminate
wiring board
plating
multilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9071996A
Other languages
Japanese (ja)
Inventor
勉 ▲高▼橋
Tsutomu Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP9071996A priority Critical patent/JPH09283930A/en
Publication of JPH09283930A publication Critical patent/JPH09283930A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a multilayer printed-wiring board in which the influence of emitted noise and of crosstalk noise is eliminated and which acts as a high- speed signal transmission line by a method wherein a coaxial circuit of a strip structure in which a signal circuit conductor is covered completely with a grounding circuit is formed on the multilayer printed-wiring board. SOLUTION: A multilayer printed-wiring board is constituted of a filmlike bonding base material 3 constituted in such a way that copper-clad laminated boards 1 in which grounding circuit conductors 15 are formed and a filmlike copper-clad laminated board 2 on which grounding conductors 22 and signal circuit conductors 23 are formed are laminated and of a hole 41 for a through hole. Thereby, a coaxial circuit of a strip structure in which the signal circuit conductors 23 are covered completely with the grounding circuit conductors 15 can be formed, and it is possible to obtain the multilayer printed-wiring board in which the influence of a radiant noise and of a cross talk noise is eliminated and which acts as a high-speed signal transmission line.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、多層プリント配線
板の構造及び製造方法に関する。
TECHNICAL FIELD The present invention relates to a structure and a manufacturing method of a multilayer printed wiring board.

【0002】[0002]

【従来の技術】多層プリント配線板の構造には多種のも
のがあり、以下に従来例を述べる。
2. Description of the Related Art There are various structures of multilayer printed wiring boards, and a conventional example will be described below.

【0003】(1)多層プリント配線の表層に信号配線
構造を有するマイクロストリップ構造、又、多層プリン
ト配線板の電源層、アース層に挟まれた内層に信号配線
構造を有するストリップ構造。
(1) A microstrip structure having a signal wiring structure on the surface layer of the multilayer printed wiring, or a strip structure having a signal wiring structure on the inner layer sandwiched between the power supply layer and the ground layer of the multilayer printed wiring board.

【0004】(2)装置の機番(例えば1機番〜4機
番)の切替えのため、プリント配線板上にジャンパーの
追加などを行う構造。
(2) A structure in which a jumper or the like is added on the printed wiring board in order to switch the device number (for example, 1 to 4) of the device.

【0005】(3)ドリリングにより穴開けし、電解銅
めっきを行うことにより形成する多層プリント配線板の
内層バイヤホール(IVH)構造があった。
(3) There was an inner layer via hole (IVH) structure of a multilayer printed wiring board formed by drilling holes and electrolytic copper plating.

【0006】[0006]

【発明が解決しようとする課題】[Problems to be Solved by the Invention]

(1)従来例(1)のマイクロストリップ構造の場合、
信号配線から電磁波として空中に放射され、他の装置の
誤動作を誘発する放射ノイズ及びプリント配線板の配線
パターン間の距離が近く、信号速度が早くなる程、隣接
パターンのクロストークノイズ量(漏話)が大きくな
り、最悪の場合誤動作してしまう。
(1) In the case of the microstrip structure of the conventional example (1),
The amount of crosstalk noise (crosstalk) that is emitted from the signal wiring in the air as electromagnetic waves and induces the malfunction of other devices, and the distance between the wiring patterns on the printed wiring board is short and the signal speed is high, the adjacent pattern Becomes large and, in the worst case, malfunctions.

【0007】又、ストリップ構造では、前記クロストー
クの影響が避けられなかった。
Further, in the strip structure, the influence of the crosstalk is unavoidable.

【0008】(2)従来例(2)の構成では、ジャンパ
ーを行うためスルーホールを機番毎に1ケ所設ける必要
があった。又、そのジャンパーを半田付けで行う等の不
具合があった。
(2) In the configuration of the conventional example (2), it is necessary to provide one through hole for each machine number in order to perform the jumper. Further, there is a problem that the jumper is soldered.

【0009】(3)従来例(3)の方法では、ドリリン
グに時間を要し生産性を悪化させるという問題があっ
た。
(3) The method of the conventional example (3) has a problem that it takes time for drilling and productivity is deteriorated.

【0010】[0010]

【課題を解決するための手段】[Means for Solving the Problems]

(1)信号回路導体が完全にアース回路で覆われたスト
リップ構造の同軸回路を多層プリント配線板上に形成す
る。
(1) A strip-structured coaxial circuit in which a signal circuit conductor is completely covered with an earth circuit is formed on a multilayer printed wiring board.

【0011】(2)同一スルーホール位置に複数の分離
したスルーホールを形成し、所望のスルーホールに接点
を設けた短絡ピンを挿入することにより、装置機番等の
設定を可能とする。
(2) By forming a plurality of separated through-holes at the same through-hole position and inserting a short-circuit pin having a contact at a desired through-hole, the device number and the like can be set.

【0012】(3)内層間の層間接続用のバイヤホール
を穴加工せずに、銅めっき及びエッチングにより形成す
ることにより、層間の接続を可能にする。以上により上
記問題を解決する。
(3) The interlayer connection is made possible by forming a via hole for interlayer connection between inner layers by copper plating and etching without drilling. The above problem is solved by the above.

【0013】[0013]

【発明の実施の形態】図1は本発明の第1の実施形態の
多層プリント配線板の構造図であって、アース回路導体
15を形成した銅張積層板1と、アース回路導体22と
信号回路導体23を形成したフィルム状銅張積層板2
と、前記銅張積層板1と前記フィルム状銅張積層板2を
積層構成を行うフィルム状接着基材3と、スルーホール
用穴41から構成される。
FIG. 1 is a structural diagram of a multilayer printed wiring board according to a first embodiment of the present invention, in which a copper clad laminate 1 having a ground circuit conductor 15 formed thereon, a ground circuit conductor 22 and a signal. Film-shaped copper clad laminate 2 having circuit conductor 23 formed
And a film-shaped adhesive substrate 3 for laminating the copper-clad laminate 1 and the film-shaped copper-clad laminate 2, and a through-hole hole 41.

【0014】図2、図3は本発明の第2の実施形態の多
層プリント配線板の製造方法を示す断面図であって、以
下に説明する。
2 and 3 are sectional views showing a method for manufacturing a multilayer printed wiring board according to a second embodiment of the present invention, which will be described below.

【0015】まず、銅張積層板1(ガラス布基材エポキ
シ樹脂)にエッチングレジスト11を塗布し、露光・現
像・エッチング・剥離の工程により、スルーホール用穴
部の導体逃げ部12を形成する。
First, an etching resist 11 is applied to a copper clad laminate 1 (glass cloth base epoxy resin), and a conductor escape portion 12 of a through hole is formed by the steps of exposure, development, etching and peeling. .

【0016】次に、めっきレジスト13を塗布し、露光
・現像を行い、必要なパターンにのみめっきを行うパタ
ーンめっき法によりめっきレジスト剥離部に銅めっき1
4を施す。めっきの最終工程に短時間高電流めっきを施
し、めっきの表面に粒状の銅めっきを施したアース回路
導体15を形成する。これを必要数製造する。
Next, the plating resist 13 is applied, exposed and developed, and the plating resist stripped portion is plated with copper 1 by a pattern plating method of plating only a required pattern.
Apply 4. In the final step of plating, high-current plating is applied for a short time to form the ground circuit conductor 15 in which the surface of the plating is plated with granular copper. This is manufactured in the required number.

【0017】この工程と平行して、Bステージ状態(完
全に硬化が完了していない状態、即ち半硬化状態をい
う)のフィルム状銅張積層板2にエッチングレジスト2
1を塗布し、露光・現像・エッチング・剥離の工程を行
いアース回路導体22及び信号回路導体23を形成す
る。
In parallel with this step, the etching resist 2 is formed on the film-like copper-clad laminate 2 in the B stage state (a state in which the curing is not completely completed, that is, a semi-cured state).
1 is applied, and the steps of exposure, development, etching, and peeling are performed to form the ground circuit conductor 22 and the signal circuit conductor 23.

【0018】次に、アース回路導体15を形成した前記
銅張積層板1と、アース回路導体22及び信号回路導体
23を形成したフィルム状銅張積層板2を、仮積層を行
い一体化し、位置ずれ等を検査する。
Next, the copper-clad laminate 1 having the ground circuit conductor 15 formed thereon and the film-shaped copper-clad laminate 2 having the earth circuit conductor 22 and the signal circuit conductor 23 formed thereon are temporarily laminated and integrated, Check for misalignment.

【0019】次に、前記銅張積層板1と前記フィルム状
銅張積層板2の仮積層品とBステージ状フィルム状接着
基材3にて本積層用構成を行い、最終積層40を行い一
体化し、同軸構造の回路導体が形成される。
Next, the temporary lamination product of the copper clad laminate 1 and the film-shaped copper clad laminate 2 and the B-stage film adhesive base material 3 are used for final lamination, and final lamination 40 is performed to integrate them. And a circuit conductor having a coaxial structure is formed.

【0020】最後にスルーホール用穴開け41を行い、
パネル全体にめっきを行うパネルめっき法によりスルー
ホールめっき42を行い、エッチングレジスト43を塗
布し、露光・現像・エッチング・剥離の工程を径て表層
の回路を形成して多層プリント配線板が完成する。
Finally, a through hole drilling 41 is performed,
Through-hole plating 42 is performed by a panel plating method for plating the entire panel, an etching resist 43 is applied, and a surface circuit is formed by exposing, developing, etching, and peeling steps to complete a multilayer printed wiring board. .

【0021】図4は本発明の第3の実施形態を示す透視
図であって、図2のアース回路導体部15,22にスル
ーホール51を適切なピッチ(例えば、信号導体回路の
周囲のアース回路間のピッチで設ける)で形成したもの
であり、より確実な同軸構造の多層プリント配線板を得
ることができる。
FIG. 4 is a perspective view showing a third embodiment of the present invention, in which the through holes 51 are formed in the ground circuit conductor portions 15 and 22 of FIG. 2 at an appropriate pitch (for example, ground around the signal conductor circuit). (Provided at a pitch between the circuits), a more reliable coaxial printed wiring board can be obtained.

【0022】以上により信号回路導体が完全にアース回
路導体で覆われたストリップ構造の同軸回路が形成され
る。
As described above, a coaxial circuit having a strip structure in which the signal circuit conductor is completely covered with the ground circuit conductor is formed.

【0023】従って、本発明による多層プリント配線板
を高速信号伝送路として使用する場合に適用できる。
又、低レベル信号の近傍に高レベル信号が存在するよう
な回路を多層プリント配線板にて構成する場合などにも
適用できる。
Therefore, it can be applied when the multilayer printed wiring board according to the present invention is used as a high-speed signal transmission line.
It can also be applied to a case where a circuit in which a high level signal exists near a low level signal is composed of a multilayer printed wiring board.

【0024】図5は本発明の第4の実施形態の多層プリ
ント配線板の構造図であって、スルーホール104とラ
ンド105を形成した銅張積層板10と、前記ランド1
05の径と同等の径の穴開け201を形成したノンフロ
ータイププリプレグ20とから構成される。このプリプ
レグとは、ガラス布にエポキシ樹脂を含浸させ半硬化状
態にしたものをいう。
FIG. 5 is a structural view of a multilayer printed wiring board according to a fourth embodiment of the present invention, in which a copper clad laminate 10 having through holes 104 and lands 105 and the lands 1 are formed.
The non-flow type prepreg 20 is formed with a hole 201 having a diameter equal to the diameter of 05. The prepreg is a glass cloth impregnated with an epoxy resin to be semi-cured.

【0025】図6は本発明の第5の実施形態の多層プリ
ント配線板の製造方法を示す断面図であって、以下に説
明する。
FIG. 6 is a sectional view showing a method for manufacturing a multilayer printed wiring board according to the fifth embodiment of the present invention, which will be described below.

【0026】まず、銅張積層板10に穴開け101を行
い、パネルめっき法にてスルーホールめっき102を施
し、エッチングレジスト103を塗布し、露光・現像・
エッチング・剥離の工程を行いスルーホール104及び
ランド105を形成、これを必要数製造する。
First, the copper clad laminate 10 is perforated 101, through-hole plating 102 is applied by a panel plating method, an etching resist 103 is applied, and exposure / development /
The through hole 104 and the land 105 are formed by performing the etching / peeling process, and a required number of these are manufactured.

【0027】この工程と平行して、ノンフロータイププ
リプレグ20に銅張積層板10のランド105の径と同
等の径の穴開け201を形成する。その後スルーホール
104を形成した前記銅張積層板10と、穴開け201
を形成した前記ノンフロータイププリプレグ20を仮積
層30を行う。
In parallel with this step, a perforation 201 having a diameter equal to the diameter of the land 105 of the copper clad laminate 10 is formed in the non-flow type prepreg 20. After that, the copper clad laminate 10 having the through holes 104 formed therein and the perforations 201 are formed.
The non-flow type prepreg 20 on which the above is formed is temporarily laminated 30.

【0028】銅張積層板10のスルーホール104とノ
ンフロータイププリプレグ20の穴開け201の穴位置
を確認し、仮積層品30を必要数重ね合わせ本積層40
を行い一体化し、同一穴位置に分離したスルーホール1
04が形成された多層プリント配線板が完成する。
The positions of the through holes 104 of the copper clad laminate 10 and the holes 201 of the non-flow type prepreg 20 are confirmed, and the required number of temporary laminates 30 are superposed and the main lamination 40 is formed.
Through hole 1 integrated and separated into the same hole position
A multilayer printed wiring board on which 04 is formed is completed.

【0029】この時、仮積層時の積層プレス条件は80
℃・10kg/cm2 の条件で数分とする。又、本積層
時の積層プレス条件は170℃・20kg/cm2 の条
件で60分〜120分とする。
At this time, the lamination press condition at the time of temporary lamination is 80
It is several minutes under the condition of ° C and 10 kg / cm 2 . The lamination press condition during the main lamination is set to 170 ° C. and 20 kg / cm 2 for 60 minutes to 120 minutes.

【0030】図7は本実施形態の積層時に用いられるピ
ラミネーション時の鏡板に治具ピン用穴の配置を示す図
で、鏡板の中央部に治具ピン用穴60を設けたことによ
り、スルーホール104の位置ずれが最小限に押さえる
ことが可能になる。
FIG. 7 is a view showing the arrangement of jig pin holes in the mirror plate used for lamination in this embodiment during the lamination, and the jig pin hole 60 is provided in the central portion of the mirror plate, so that the through hole is formed. It is possible to minimize the positional deviation of the holes 104.

【0031】図8は短絡ピン50の使用例を示す図で、
ばね構造の接点部501を有する金属製短絡ピン50を
多層プリント配線板40の所望のスルーホール104に
挿入することにより導通が図られる。
FIG. 8 is a diagram showing an example of using the short-circuit pin 50.
Conduction is achieved by inserting the metal short-circuit pin 50 having the contact portion 501 of the spring structure into the desired through hole 104 of the multilayer printed wiring board 40.

【0032】以上のように本実施形態によれば、同一ス
ルーホール位置に複数の分離したスルーホールが存在す
るので、そこに接続したい層数分だけの接点を短絡ピン
に設け、それを挿入することにより、必要な機番を設定
することが可能となる。
As described above, according to the present embodiment, since a plurality of separated through holes are present at the same through hole position, contacts corresponding to the number of layers to be connected to the short-circuit pins are provided and inserted. This makes it possible to set the required machine number.

【0033】従って、装置の機番の設定(例えば0系、
1系)を多層プリント配線板で行う場合に適用される。
Therefore, the machine number of the device is set (for example, 0 system,
It is applied when the 1-system) is performed on a multilayer printed wiring board.

【0034】図9は本発明の第6の実施形態の多層プリ
ント配線板の構造図であって、信号回路73及びバイヤ
ホール用ランド74の内層回路を形成した銅張積層板7
0と、前記ランド74に対応する部分に前記ランド74
と同一径の導体ランド82を形成したフィルム状銅張板
80と、前記銅張積層板70と前記フィルム状銅張板8
0を積層構成を行うフィルム状接着基材3から構成され
る。
FIG. 9 is a structural view of a multilayer printed wiring board according to a sixth embodiment of the present invention, in which a copper clad laminate 7 in which an inner layer circuit of a signal circuit 73 and a via hole land 74 is formed.
0 and the land 74 at a portion corresponding to the land 74.
A film-shaped copper clad plate 80 on which a conductor land 82 having the same diameter as the above, the copper clad laminate 70 and the film-shaped copper clad plate 8
0 is composed of a film-like adhesive base material 3 having a laminated structure.

【0035】図10は本発明の第7の実施形態の多層プ
リント配線板の製造方法を示す断面図であって、以下に
説明する。
FIG. 10 is a sectional view showing a method for manufacturing a multilayer printed wiring board according to the seventh embodiment of the present invention, which will be described below.

【0036】まず、銅張積層板70にエッチングレジス
ト72を塗布し、露光・現像・エッチング・剥離の工程
により、内層回路(信号回路73、バイヤホール用ラン
ド74)を形成する。
First, an etching resist 72 is applied to the copper clad laminate 70, and an inner layer circuit (signal circuit 73, via hole land 74) is formed by the steps of exposure, development, etching, and peeling.

【0037】次に、めっきレジスト75を塗布し、露光
・現像を行いバイヤホール用ランド74にランド径より
0.2mm程度小さい径の電解めっき76を施し、銅め
っきの最終工程に高電流めっきを短時間施し粒子の荒い
銅めっき77を施す。以上の工程で内層回路を必要数量
製造する。
Next, a plating resist 75 is applied, exposed and developed to perform electrolytic plating 76 having a diameter of about 0.2 mm smaller than the land diameter on the land 74 for the via hole, and high current plating is performed in the final step of copper plating. It is applied for a short time and copper plating 77 having coarse particles is applied. The required number of inner layer circuits are manufactured through the above steps.

【0038】この工程と平行して、フィルム状銅張板8
0にエッチングレジスト81を塗布し、露光・現像・エ
ッチング・剥離の工程により、銅張積層板70のバイヤ
ホール用ランド74に対応する部分にバイヤホール用ラ
ンド74と同一径の導体(ランド82)を形成する。
In parallel with this step, the film-shaped copper clad plate 8
0 is coated with an etching resist 81, and a conductor (land 82) having the same diameter as the via hole land 74 is applied to a portion corresponding to the via hole land 74 of the copper clad laminate 70 by the steps of exposure, development, etching, and peeling. To form.

【0039】次に、回路形成しバイヤホール用ランド7
4にめっきを施した銅張積層板70とランド82を形成
したBステージ状態のフィルム状銅張板80を仮積層9
0(100℃、10kg/cm2 で数分)し、位置ずれ
を検査する。
Next, a circuit-formed land 7 for a via hole is formed.
The copper clad laminate 70 plated with 4 and the film-like copper clad plate 80 in the B stage having the lands 82 are temporarily laminated 9
0 (100 ° C., 10 kg / cm 2 for several minutes), and inspect for positional deviation.

【0040】その後、仮積層品90に対応する回路形成
しバイヤホール用ランド74にめっきを施した銅張積層
板70とBステージ状態のフィルム状接着基材3にて本
積層用の構成を行い、本積層(170℃、20kg/c
2 で60分〜120分)を実施し、本積層品41が得
られ、多層プリント配線板が完成する。
After that, the circuit for the temporary laminated product 90 is formed and the copper clad laminated plate 70 having the land 74 for the via hole plated and the film-like adhesive base material 3 in the B stage form the structure for main lamination. , Main lamination (170 ℃, 20kg / c
m 2 for 60 minutes to 120 minutes) to obtain the multilayer product 41, and the multilayer printed wiring board is completed.

【0041】以上のように、Bステージ状のフィルム状
銅張板とBステージ状のフィルム接着基材を、回路構成
しバイヤホール用ランドにめっきを施した銅張積層板の
間に構成し、積層プレスを行うことにより、層間の接続
が達成される。
As described above, the B-staged film-shaped copper clad plate and the B-staged film-bonded base material are formed between the circuit-formed copper-clad laminated plate on which the land for the via hole is plated. By performing the, connection between layers is achieved.

【0042】[0042]

【発明の効果】以上説明したように本発明によれば、下
記に示す効果を得ることができる。
As described above, according to the present invention, the following effects can be obtained.

【0043】(1)信号回路導体が完全にアース回路導
体で覆われたストリップ構造の同軸回路が形成でき、放
射ノイズ、クロストークノイズの影響が無い、高速信号
伝送線路としての多層プリント配線板が得られる。
(1) A multilayer printed wiring board as a high-speed signal transmission line which can form a strip-structured coaxial circuit in which the signal circuit conductor is completely covered with the ground circuit conductor and is free from the effects of radiation noise and crosstalk noise. can get.

【0044】(2)同一スルーホール位置に複数の分離
したスルーホールが形成されているので、そこに接続し
たい層数分だけ接点を短絡ピンに設け、それを挿入する
ことにより、必要な機番を設定することが可能となる。
(2) Since a plurality of separated through-holes are formed at the same through-hole position, the short-circuit pins are provided with contacts corresponding to the number of layers to be connected, and the short-circuit pins are inserted to obtain the required machine number. Can be set.

【0045】(3)Bステージ状のフィルム状銅張板と
Bステージ状のフィルム接着基材を、回路形成しバイヤ
ホール用ランドにめっきを施した銅張積層板の間に構成
し、積層プレスを行うことにより、層間の接続が可能と
なる。
(3) A B-staged film-shaped copper clad plate and a B-staged film-bonded base material are formed between copper-clad laminated plates on which circuits are formed and plated on the via holes lands, and a lamination press is performed. This makes it possible to connect the layers.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施形態の多層プリント配線板
の構造図
FIG. 1 is a structural diagram of a multilayer printed wiring board according to a first embodiment of the present invention.

【図2】本発明の第2の実施形態の多層プリント配線の
製造方法を示す断面図(その1)
FIG. 2 is a sectional view (1) showing a method for manufacturing a multilayer printed wiring according to a second embodiment of the present invention.

【図3】本発明の第2の実施形態の多層プリント配線板
の製造方法を示す断面図(その2)
FIG. 3 is a sectional view (No. 2) showing the method for manufacturing the multilayer printed wiring board according to the second embodiment of the present invention.

【図4】本発明の第3の実施形態を示す透視図FIG. 4 is a perspective view showing a third embodiment of the present invention.

【図5】本発明の第4の実施形態の多層プリント配線板
の構造図
FIG. 5 is a structural diagram of a multilayer printed wiring board according to a fourth embodiment of the present invention.

【図6】本発明の第5の実施形態の多層プリント配線板
の製造方法を示す断面図
FIG. 6 is a sectional view showing a method for manufacturing a multilayer printed wiring board according to a fifth embodiment of the present invention.

【図7】治具ピン用穴の配置図[Fig. 7] Layout plan of holes for jig pins

【図8】短絡ピンの使用例を示す図FIG. 8 is a diagram showing a usage example of the short-circuit pin.

【図9】本発明の第6の実施形態の多層プリント配線板
の構造図
FIG. 9 is a structural diagram of a multilayer printed wiring board according to a sixth embodiment of the present invention.

【図10】本発明の第7の実施形態の多層プリント配線
板の製造方法を示す断面図
FIG. 10 is a sectional view showing a method of manufacturing a multilayer printed wiring board according to a seventh embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1,10,70 銅張積層板 2 フィルム状銅張積層板 3 フィルム状接着基材 12 導体逃げ部 15,22 アース回路導体 20 ノンフロータイププリプレグ 23 信号回路導体 41 スルーホール用穴 50 短絡ピン 501 接点部 51,104 スルーホール 60 治具ピン用穴 73 信号回路 74,82,105 ランド 80 フィルム状銅張板 201 穴開け 1,10,70 Copper-clad laminate 2 Film-like copper-clad laminate 3 Film-like adhesive base material 12 Conductor relief part 15,22 Earth circuit conductor 20 Non-flow type prepreg 23 Signal circuit conductor 41 Through hole 50 Short-circuit pin 501 Contact point 51, 104 Through hole 60 Jig pin hole 73 Signal circuit 74, 82, 105 Land 80 Film copper clad plate 201 Drilling

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 アース回路導体が形成された銅張積層板
と、アース回路導体と信号回路導体が形成されたフィル
ム状銅張積層板と、前記銅張積層板と前記フィルム状銅
張積層板を積層構成するフィルム接着基材と、スルーホ
ール用穴とから成り、多層プリント配線板上に同軸回路
構造を形成したことを特徴とする多層プリント配線板の
構造。
1. A copper clad laminate having an earth circuit conductor formed thereon, a film-shaped copper clad laminate having an earth circuit conductor and a signal circuit conductor formed thereon, the copper clad laminate and the film-like copper clad laminate. A structure of a multilayer printed wiring board, comprising a film adhesive base material having a laminated structure and holes for through holes, wherein a coaxial circuit structure is formed on the multilayer printed wiring board.
【請求項2】 銅張積層板にエッチングレジストを塗布
し、露光・現像・エッチング・剥離の工程によりスルー
ホール用穴部の導体逃げ部を形成し、 次に、めっきレジストを塗布し、露光・現像を行い、パ
ターンめっき法によりめっきレジスト剥離部に銅めっき
を施し、めっきの最終工程に短時間高電流めっきを施
し、めっき表面に粒状の銅めっきを施したアース回路導
体を形成し、 この工程と平行して、半硬化状態のフィルム状銅張積層
板にエッチングレジストを塗布し、露光・現像・エッチ
ング・剥離の工程を行い、アース回路導体及び信号回路
導体を形成し、 次に、アース回路導体を形成した前記銅張積層板と、ア
ース回路導体及び信号回路導体を形成した前記フィルム
状銅張積層板を、仮積層を行い一体化し、位置ずれ等を
検査し、 次に、前記銅張積層板と前記フィルム状銅張積層板の仮
積層品とBステージ状フィルム状接着基材にて本積層用
構成を行い、最終積層を行い一体化し、同軸構造の回路
導体を形成し、 最後にスルーホール用穴開けを行い、パネルめっき法に
よりスルーホールめっきを行い、エッチングレジストを
塗布し、露光・現像・エッチング・剥離の工程を経て表
層の回路を形成して多層プリント配線板を完成させるこ
とを特徴とする多層プリント配線板の製造方法。
2. A copper clad laminate is coated with an etching resist to form conductor escape portions of through-hole holes by the steps of exposure, development, etching, and peeling. Next, a plating resist is coated and exposed. After development, copper plating is applied to the plating resist stripped portion by the pattern plating method, high current plating is applied for a short time in the final step of plating, and a ground circuit conductor with granular copper plating on the plating surface is formed. In parallel with this, an etching resist is applied to the film-like copper clad laminate in the semi-cured state, and the steps of exposure, development, etching and peeling are performed to form the ground circuit conductor and signal circuit conductor, and then the ground circuit. The copper-clad laminate having a conductor formed thereon and the film-shaped copper-clad laminate having an earth circuit conductor and a signal circuit conductor formed are temporarily laminated and integrated, and the positional deviation and the like are inspected. Next, a temporary laminate of the copper-clad laminate, the film-like copper-clad laminate, and a B-stage film-like adhesive base material is used for final lamination, and final lamination is performed to integrate the circuit conductor with a coaxial structure. Finally, through holes for through holes are formed, through holes are plated by the panel plating method, etching resist is applied, and the surface circuit is formed through the steps of exposure, development, etching, and peeling, and multilayer printing is performed. A method for manufacturing a multilayer printed wiring board, which comprises completing the wiring board.
【請求項3】 アース回路導体にスルーホールを適切な
ピッチで形成したことを特徴とする請求項2に記載の多
層プリント配線板の製造方法。
3. The method for manufacturing a multilayer printed wiring board according to claim 2, wherein through holes are formed in the ground circuit conductor at an appropriate pitch.
【請求項4】 スルーホールとランドが形成された銅張
積層板と、前記ランドの径と同等の穴開けが形成された
ノンフロータイププリプレグから成り、多層プリント配
線板の分離した前記スルーホールの所望の個所に、接点
部を有する短絡ピンを挿入し、装置機番等の設定を可能
としたことを特徴とする多層プリント配線板の構造。
4. A copper clad laminate having a through hole and a land formed therein and a non-flow type prepreg having a hole equivalent to the diameter of the land formed therein. A multilayer printed wiring board structure characterized in that a short-circuit pin having a contact portion is inserted at a desired position to enable setting of a device number and the like.
【請求項5】 銅張積層板に穴開けを行い、パネルめっ
き法にてスルーホールめっきを施し、エッチングレジス
トを塗布し、露光・現像・エッチング・剥離の工程を行
いスルーホール及びランドを形成し、 この工程と平行して、ノンフロータイププリプレグに銅
張積層板のランドの径と同等の径の穴開けを形成し、そ
の後スルーホールを形成した前記銅張積層板と穴開けを
形成した前記ノンフロータイププリプレグを仮積層し、 銅張積層板のスルーホールとノンフロータイププリプレ
グの穴開けの穴位置を確認し、仮積層品を必要数重ね合
わせ本積層を行い一体化し、同一穴位置に分離したスル
ーホールが形成された多層プリント配線板を完成させる
ことを特徴とする多層プリント配線板の製造方法。
5. A copper clad laminate is perforated, through-hole plating is performed by a panel plating method, an etching resist is applied, and exposure, development, etching, and peeling steps are performed to form through-holes and lands. In parallel with this step, a non-flow type prepreg is formed with a hole having a diameter equal to the diameter of the land of the copper-clad laminate, and then a hole is formed with the copper-clad laminate with through holes. Temporarily stack the non-flow type prepregs, check the through holes of the copper clad laminate and the hole positions of the non-flow type prepregs, stack the necessary number of temporary laminates, and then perform main lamination to integrate them and place them in the same hole position. A method of manufacturing a multilayer printed wiring board, comprising: completing a multilayer printed wiring board having separated through holes.
【請求項6】 信号回路とバイヤホール用ランドを有す
る内層回路が形成された銅張積層板と、前記バイヤホー
ル用ランドに対応する部分にバイヤホール用ランドと同
一径の導体ランドが形成されたフィルム状銅張板と、前
記銅張積層板と前記フィルム状銅張板を積層構成するフ
ィルム接着基材から成り、内層間の接続を可能としたこ
とを特徴とする多層プリント配線板の構造。
6. A copper clad laminate in which an inner layer circuit having a signal circuit and a land for a via hole is formed, and a conductor land having the same diameter as the land for the via hole is formed in a portion corresponding to the land for the via hole. A structure of a multilayer printed wiring board, comprising a film-shaped copper clad board, a film adhesive base material for laminating the copper clad laminate and the film-shaped copper clad board, and enabling connection between inner layers.
【請求項7】 銅張積層板にエッチングレジストを塗布
し、露光・現像・エッチング・剥離の工程により、信号
回路、バイヤホール用ランドの内層回路を形成し、 次に、めっきレジストを塗布し、露光・現像を行いバイ
ヤホール用ランドに電解めっきを施し、銅めっきの最終
工程に高電流めっきを短時間施し、粒子の荒い銅めっき
を施し、以上の工程で内層回路を必要数量製造し、 この工程と平行して、フィルム状銅張板にエッチングレ
ジストを塗布し、露光・現像・エッチング・剥離の工程
により、銅張積層板のバイヤホール用ランドに対応する
部分にバイヤホール用ランドと同一径のランドを形成
し、 次に、回路形成しバイヤホール用ランドにめっきを施し
た銅張積層板とランドを形成した半硬化状態のフィルム
状銅張板を仮積層し、位置ずれを検査し、 その後、仮積層品に対応する回路形成しバイヤホール用
ランドにめっきを施した銅張積層板と半硬化状態のフィ
ルム状接着基材にて本積層用の構成を行い、多層プリン
ト配線板を完成させることを特徴とする多層プリント配
線の製造方法。
7. A copper clad laminate is coated with an etching resist to form a signal circuit and an inner layer circuit of a via hole land by the steps of exposure, development, etching and peeling, and then a plating resist is coated, After exposure / development, electrolytic plating is applied to the land for via holes, high current plating is applied for a short time in the final step of copper plating, copper plating with rough particles is applied, and the required number of inner layer circuits are manufactured in the above steps. In parallel with the process, an etching resist is applied to the film-shaped copper clad board, and the same diameter as the via hole land is applied to the part corresponding to the via hole land of the copper clad laminate by the process of exposure, development, etching and peeling. , And then the circuit-formed copper-clad laminate with the via-hole lands plated and the semi-cured film-like copper-clad laminate with the lands formed are temporarily laminated. After inspecting the misalignment, after that, a circuit corresponding to the temporary laminated product is formed and a copper clad laminated plate plated on the land for the via hole and a film-like adhesive base material in a semi-cured state are configured for main lamination, A method for manufacturing a multilayer printed wiring, which comprises completing a multilayer printed wiring board.
JP9071996A 1996-04-12 1996-04-12 Structure and manufacture of multilayer printed-wiring board Pending JPH09283930A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9071996A JPH09283930A (en) 1996-04-12 1996-04-12 Structure and manufacture of multilayer printed-wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9071996A JPH09283930A (en) 1996-04-12 1996-04-12 Structure and manufacture of multilayer printed-wiring board

Publications (1)

Publication Number Publication Date
JPH09283930A true JPH09283930A (en) 1997-10-31

Family

ID=14006364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9071996A Pending JPH09283930A (en) 1996-04-12 1996-04-12 Structure and manufacture of multilayer printed-wiring board

Country Status (1)

Country Link
JP (1) JPH09283930A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6396264B1 (en) 1999-09-29 2002-05-28 Nec Corporation Triplate striplines used in a high-frequency circuit and a shielded-loop magnetic field detector

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6396264B1 (en) 1999-09-29 2002-05-28 Nec Corporation Triplate striplines used in a high-frequency circuit and a shielded-loop magnetic field detector

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