JPH09247685A - Information processor and method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an information processor by which a minimum value and an address storing the minimum value are detected at a high speed from plural arithmetic results stored in a memory, and to provide the method therefor. SOLUTION: An information processing unit is provided with a memory 2 storing plural arithmetic results, a pointer 1 giving an address to the memory 2, a 1st register 4 storing a minimum value, a 2nd register 5 storing the address storing the minimum value, and a comparator 3 comparing an output of the 1st register 4 with an output of the memory 2. Thus, comparison, condition discrimination, revision of minimum value, and storage of an address in which the minimum value is stored are conducted in one step.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and method for detecting a minimum pattern matching result and a motion vector at that time from a pattern matching result group stored in a memory in a microprocessor or the like.

The present invention also relates to an apparatus and method for detecting a minimum value (maximum value) and an address storing the minimum value (maximum value) from a plurality of arithmetic results stored in a memory in a microprocessor or the like. .

[0003]

2. Description of the Related Art In recent years, in order to perform an image codec represented by MPEG, a microprocessor is required to have high function and high speed processing. In particular, motion vector detection in an image codec requires a huge amount of calculation.

In motion vector detection, for example, the position of the previous image is shifted to perform pattern matching with the current image, and the position where this pattern matching is minimized, that is, the motion vector is obtained. As a method of pattern matching, the sum of absolute values of differences is often used, and many patents have been filed for efficiently performing this calculation (for example, Japanese Patent Laid-Open No. 4-49418).

However, in order to obtain the motion vector that minimizes the pattern matching, the minimum value is further detected from the pattern matching result group stored in the memory by the above calculation, and the minimum value is detected from the address where the minimum value is stored. It is necessary to find the corresponding motion vector. If this is performed by a microprocessor or the like, it is necessary to repeat the steps of comparison, condition determination, change of the minimum value, and storage of the address where the minimum value was stored.

One of the effective means for efficiently performing the above operation is to provide a comparison instruction for controlling the execution of the next instruction so that the comparison and the condition judgment are performed in one step to speed up the processing. There is a way. An example of the above-mentioned conventional method is, for example, Japanese Patent Publication No. 7-69795, although its purpose is different.

[0007]

However, the above-mentioned conventional method requires three steps of comparison and condition determination, change of the minimum value, and storage of the address in which the minimum value is stored, and this processing is further performed. Since it is repeated, there is a problem that a huge amount of calculation is required.

Therefore, an object of the present invention is to provide an information processing apparatus and method for performing comparison, condition determination, change of the minimum value, and saving of the address where the minimum value was stored in one step.

[0009]

In order to solve the above problems, an information processing apparatus and method according to the present invention relates to claim 1, and a memory for storing a plurality of operation results and an address are output to the memory. A pointer, a first storage means for holding a value output from the memory at an address given by the pointer when the write signal output from the comparison means, which will be described later, is active; and a value of the pointer when the write signal is active. Comparing the value output from the first storage means with the second storage means for storing the value, and when the value output from the memory is smaller, the active write signal is stored in the first storage means. And a comparison means for outputting to the second storage means.

According to claim 2, the control means described later outputs a memory for storing a plurality of operation results, a pointer for outputting an address to the memory, and a value output by the memory at the address given by the pointer. First storage means for holding when the second write signal is active, second storage means for storing the value of the pointer when the second write signal is active, the first storage means and the Controls the first write signal by comparing the value output from the memory and controlling the first write signal by outputting a first write signal active to the control means described later when the value output from the memory is smaller. And then the second
And a control means for outputting the write signal of 1 to the first storage means and the second storage means.

According to claim 3, the calculation result and the minimum value are compared, and when the calculation result is smaller than the minimum value, the minimum value is replaced with the calculation result, and the calculation result is stored. It is a method to save the address.

In relation to claim 4, selecting the minimum value detection or the maximum value detection, comparing the calculation result and the minimum value (maximum value),
When the calculation result is smaller (larger) than the minimum value (maximum value), the minimum value (maximum value) is replaced with the calculation result, and the address where the calculation result is stored is saved. is there.

According to the first and the third aspects of the present invention, the pattern matching result stored in the memory is compared with the minimum value, and the pattern matching result is smaller than the minimum value. In addition, since the minimum value is replaced with the pattern matching result and the address where the pattern matching result is stored is saved, the comparison, the condition judgment, the change of the minimum value, and the minimum value are stored in one step. The saved address will be saved.

According to the second and fourth aspects, a plurality of calculation results stored in the memory are compared with the minimum value (maximum value),
When the data is smaller (larger) than the minimum value (maximum value), the minimum value (maximum value) is replaced with the data result, and the address where the data is stored is saved. Then, the comparison, the condition judgment, the change of the minimum value (maximum value) and the saving of the address where the minimum value (maximum value) is stored are performed.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION

(Embodiment 1) Hereinafter, an information processing apparatus according to a first embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an information processing apparatus according to the first embodiment of the present invention. In FIG. 1, reference numeral 1 is a pointer that gives an address to the memory 2, and outputs an address 6. Reference numeral 2 is a memory for storing a pattern matching result group, which inputs the address 6 and outputs the second data 8.
Reference numeral 3 is a comparator that serves as means for comparing the minimum value with the pattern matching result, and inputs the first data 7 and the second data 8 and outputs the comparison result signal 9. A first register 4 serves as a means for holding the minimum value, and inputs the second data 8 and the comparison result signal 9 and outputs the first data 7. Reference numeral 5 is a second register which serves as means for storing the address in which the minimum value is stored, and inputs the comparison result signal 9 and the address 6.

Reference numeral 6 denotes an address given to the memory 2, which is outputted from the pointer 1 and inputted to the memory 2 and the second register 5. Reference numeral 7 is first data, which is output from the first register 4 and input to the comparator 3. The second data 8 is output from the memory 2 and input to the comparator 3. 9
Is a comparison result signal, which is output from the comparator 3 and input to the first register 4 and the second register 5.

The operation of the information processing apparatus configured as described above will be described below with reference to FIG.

The pointer 1 outputs the address 6. The memory 2 outputs the data 8 having the address 6 as the address. The comparator 3 compares the first data 7 and the second data 8 and sets the comparison result signal 9 to 1 when the second data 8 is smaller. If the comparison result signal 9 is 1, the first
Register 4 latches the second data 8 and the second register 5 latches the address 6.

As described above, according to the present embodiment, the memory 2 for storing the pattern matching result group, and the memory 2
, A first register 4 serving as a first storage means for holding the minimum value, and a second register 5 serving as a second storage means for storing the address where the minimum value was stored. And a comparator 3 that serves as a means for comparing the minimum value and the pattern matching result, the pattern matching result and the minimum value are compared, and when the pattern matching result is smaller, the minimum value is determined as the pattern matching result. It is possible to replace and also save the stored address of the minimum value.

(Second Embodiment) An information processing apparatus according to a second embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram of an information processing apparatus according to the second embodiment of the present invention. The difference from FIG. 1 is that, as means for controlling the comparison result, the comparison result signal 9 and the minimum value selection signal 12 are input, and the write signal 11 is output.
The NOR gate 10 is provided, and the comparison result signal 9 which is the input to the first register 4 and the second register 5 is changed to the write signal 11.

In FIG. 2, those having the same functions as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

The operation of the information processing apparatus configured as described above will be described below with reference to FIG.

The pointer 1 outputs the address 6. The memory 2 outputs the data 8 having the address 6 as the address.
The comparator 3 compares the first data 7 and the second data 8 and sets the comparison result signal 9 to 1 when the second data 8 is smaller. The XNOR gate 10 sets the write signal 11 to 1 when the minimum value selection signal 12 is 1 and the comparison result signal 9 is 1, or when the minimum value selection signal 12 is 0 and the comparison result signal 9 is 0. When the write signal 11 is 1, the first register 4 latches the data 8 and the second register 5 latches the address 6.

As described above, according to the present embodiment, the memory 2 for storing the pattern matching result group, and the memory 2
, A first register 4 serving as a first storage means for holding the minimum value, and a second register 5 serving as a second storage means for storing the address where the minimum value was stored. When the minimum value selection signal 12 is 1, the pattern matching result and the minimum value are provided by including the comparator 3, which is a means for comparing the minimum value and the pattern matching result, and the XNOR gate 10, which is a means for controlling the comparison result. Compare the values and if the pattern matching result is smaller, replace the minimum value with the pattern matching result,
In addition, the minimum address can be stored.

Furthermore, according to the present embodiment, the minimum value has been described above, but when the minimum value selection signal 12 is 0, the pattern matching result and the maximum value are compared, and when the pattern matching result is larger. In addition, the maximum value can be replaced with the pattern matching result, and the address of the maximum value can be stored. As described above, by providing the XNOR 10 as means for controlling the comparison result, in addition to detecting the minimum value and the address where the minimum value is stored, the maximum value and the address where the maximum value is stored are detected. You can also do it.

The comparator 3, the first register 4,
Obviously, by providing two sets of the second register 5 and the XNOR gate 10, it is possible to simultaneously detect the minimum value and the maximum value and the address where the minimum value and the maximum value are stored.

[0029]

As described above, according to the present invention, according to claim 1, a memory for storing a plurality of operation results, a pointer for outputting an address to the memory, and an address given to the memory by the pointer are provided. First storage means for holding the output value when the write signal output from the comparison means described later is active, second storage means for storing the value of the pointer when the write signal is active, and the first storage means. Comparing means for outputting a value output from the memory to the first storing means and the second storing means when the value output from the memory is smaller. By providing and, in one step comparison, condition judgment, change of minimum value,
The address in which the minimum value was stored can be saved.

According to a second aspect, a memory for storing a plurality of operation results, a pointer for outputting an address to the memory, and a value output by the memory at an address given by the pointer are output by the control means described later. A first storage unit that holds the second write signal when the second write signal is active, a second storage unit that stores the value of the pointer when the second write signal is active, and the first storage unit. The value output from the memory is compared, and when the value output from the memory is smaller, a comparison unit that outputs an active first write signal to the control unit described later, and the first write signal Control and the second of the above
By providing control means for outputting the write signal of the above to the first storage means and the second storage means, comparison, condition judgment, change of minimum value (maximum value), and minimum value (maximum value) are performed in one step. The address where (value) was stored can be saved.

According to the third aspect, the calculation result is compared with the minimum value, and when the calculation result is smaller than the minimum value, the minimum value is replaced with the calculation result, and the calculation result is stored. According to the method of saving the existing address, the comparison, the condition determination, the change of the minimum value, and the saving of the address storing the minimum value can be performed in one step.

According to the fourth aspect, the minimum value detection or the maximum value detection is selected, the calculation result and the minimum value (maximum value) are compared,
When the calculation result is smaller (larger) than the minimum value (maximum value), the minimum value (maximum value) is replaced with the calculation result, and the address where the calculation result is stored is saved. In one step, comparison, condition determination, change of the minimum value (maximum value), and saving of the address where the minimum value (maximum value) is stored can be performed.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an information processing apparatus according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of an information processing device according to a second embodiment of the present invention.

[Explanation of symbols]

 1 pointer 2 memory 3 comparator 4 first register 5 second register 6 address 7 first data 8 second data 9 comparison result signal 10 XNOR gate 11 write signal 12 minimum value selection signal

Claims (4)

[Claims] 1. A memory that stores a plurality of operation results, a pointer that outputs an address to the memory, and a write signal that a value output from the memory at an address given by the pointer is output by a comparison unit, which will be described later, is active. Comparing the value output from the memory with the first storage unit that holds the value of the pointer when the write signal is active; An information processing apparatus comprising: a comparison unit that outputs an active write signal to the first storage unit and the second storage unit when a value output from the memory is smaller. 2. The information processing apparatus according to claim 1, further comprising control means for controlling the write signal output from the comparison means. 3. An information processing method for detecting a minimum value and an address where the minimum value was stored from a plurality of calculation results stored in a memory, comparing the calculation result and the minimum value, An information processing method for replacing the minimum value with the calculation result when the calculation result is smaller, and further storing the address where the calculation result was stored. 4. An information processing method for detecting an address storing a minimum value (maximum value) and a minimum value (maximum value) from a plurality of calculation results stored in a memory, wherein the minimum value detection or the maximum value is detected. Select detection or not, and the calculation result and minimum value (maximum value)
When the calculation result is smaller (larger) than the minimum value (maximum value), the minimum value (maximum value) is replaced with the calculation result, and the address where the calculation result is stored is changed to Information processing method to save.