JPH09237894A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, where in an impurity layer can be formed within an adequate range in a channel section of the semiconductor device. SOLUTION: A pad oxide film 12 is formed on a silicon substrate 11, and an amorphous silicon film is provided as a buffer layer onto the pad oxide film 12. BF2 ions are implanted as an impurity species into the amorphous silicon film. Thereafter, an oxide masking layer is locally formed on the amorphous silicon film, and the silicon substrate 11 is subjected to a field oxidation treatment. By this setup, a field oxide film 21 is formed on the silicon substrate 11, and B injected into the amorphous silicon film is diffused into a surface region of the silicon substrate 11 surrounded with the field oxide film 21 for the formation of an impurity layer 22.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art Conventionally, in a general MOS transistor manufacturing process, after forming a field oxide film on the main surface of a silicon substrate, the main surface of the silicon substrate surrounded by the field oxide film is doped with impurities. MO after completion
By adjusting the impurity concentration in the channel part of the S-type transistor, the threshold value of the transistor is adjusted.

The steps from the formation of the field oxide film to the ion implantation for the channel portion doping in the conventional method for manufacturing an NMOS transistor will be described below with reference to FIGS.
This will be described with reference to FIG. First, as shown in FIG.
After forming the pad oxide film 62 on the main surface of the P-type silicon substrate 61, the silicon nitride film 63 is formed on the pad oxide film 62. Next, as shown in FIG. 6B, the silicon nitride film 63 is patterned.

Then, as shown in FIG. 6C, the silicon substrate 61 is thermally oxidized to form the field oxide film 6.
4 is formed. After that, as shown in FIG. 6D, the silicon nitride film 63 on the pad oxide film 62 is removed.

After that, as shown in FIG.
As shown in (E), P-type impurities, such as BF ₂ or B, are ion-implanted through the pad oxide film 62 ′. As a result, the main surface of the silicon substrate 61 surrounded by the field oxide film 64 is doped with the impurities 65.

With the miniaturization of semiconductor devices, the impurity regions formed in the semiconductor substrate tend to become shallower. Therefore, in order to form a shallow pn junction, heavier ions are used as impurities. Specifically, in the formation of the impurity diffusion layer, there is a tendency that phosphorus (P) is transferred as an N-type impurity to arsenic (As) and boron (B) is transferred as a P-type impurity from boron fluoride (BF ₂ ). is there. On the other hand, boron (B) or boron fluoride (BF ₂ ) is used for adjusting the threshold value.

[0007]

As described above, when heavy ions are used for the ion implantation in order to make the depth of the pn junction shallow, damage to the semiconductor substrate due to the ion implantation becomes large. When annealing is applied to recover damage, impurity ions diffuse in the semiconductor substrate,
The impurity layer becomes deeper and also diffuses below the edge of the field oxide.

Correspondingly, for example, a thick buffer layer (for example, a film thickness of 40 nm) (for example, a silicon oxide film)
Has been attempted to implant light ions through the buffer layer and the pad oxide film, but light ions easily diffuse in the semiconductor substrate, and a shallow impurity layer is preferable. Difficult to form.

In the ion implantation method using the above buffer layer, when heavy ions are used instead of light ions, the heavy ions have a so-called Gaussian distribution as shown in FIG. The impurity concentration in the near portion is low, and the impurity concentration becomes maximum at a constant depth D. When annealing treatment is applied to a semiconductor substrate into which heavy ions are implanted,
As shown in FIG. 7 (B), the ions can diffuse in all directions, so that not only the ions are closer to the surface than the depth D, but also
It also diffuses into a region deeper than the depth D. As a result,
The impurity distribution after annealing is as shown in FIG.
Although the concentration is highest on the surface of the semiconductor substrate, the distribution expands in the depth direction. Therefore, in order to form an optimum impurity layer for doping the channel portion on the main surface of the semiconductor substrate,
It is necessary to repeat the trial manufacture such as selecting an appropriate implantation energy and adjusting the thickness of the buffer layer to determine the optimum conditions for ion implantation.

The present invention has been made in view of the above points, and provides a method of manufacturing a semiconductor device in which an impurity layer can be formed in an appropriate range in a channel portion of a semiconductor substrate.

[0011]

According to the present invention, there is provided a step of forming an oxide film on a semiconductor substrate, a step of providing a buffer layer on the oxide film, a step of ion-implanting impurity ions into the buffer layer, and the buffer layer. Forming a field oxide film on the semiconductor substrate by subjecting the semiconductor substrate to thermal oxidation treatment, and forming the oxide masking layer on the buffer layer; Provided is a method of manufacturing a semiconductor device, which comprises a step of diffusing into a main surface of the semiconductor substrate in a region surrounded by the field oxide film.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a method for manufacturing a semiconductor device of the present invention will be described below with reference to the drawings.

Reference numeral 11 in FIG. 1A is a silicon substrate.
A pad oxide film 12 is formed on the surface of the silicon substrate 11. Specifically, the silicon substrate 11 is oxidized in an oxidizing furnace at 900 ° C. in a 0 ₂ atmosphere to form a pad oxide film 12 with a film thickness of 10 nm on the surface of the silicon substrate 11.

Next, a buffer layer is formed on the pad oxide film 12. In this example, the buffer layer is as shown in FIG.
As shown in FIG.
A film thickness of 24 nm is formed at low temperature by low pressure CVD using disilane gas (Si ₂ H ₆ ) as a source gas.

Next, impurity ions are ion-implanted into this buffer layer. For example, as shown in FIG. 1B, BF ₂ is added to the amorphous silicon film 13 at 10 Ke.
Ion implantation is performed under the conditions of V and 5 × 10 ¹⁵ / cm ² .

An oxidation masking layer for selective oxidation is formed on the impurity-doped buffer layer. For example, as shown in FIG. 1C, the amorphous silicon film 1
3 on the surface of, for example, SiH ₄ and ammonia (N
A silicon nitride film 14 having a thickness of 140 nm is formed by low pressure CVD at 790 ° C. using a mixed gas of H ₃ ).
In this CVD process, the amorphous silicon film 13 is crystallized to become the polysilicon film 15.

After that, a resist pattern having an opening for exposing only the element isolation region is formed on the silicon nitride film 14 according to a normal photolithography technique, and then a CHF ₃ / CF ₄ / H ₂ mixed gas is used. The silicon nitride film 14 is etched by the above-mentioned reactive ion etching (RIE) to remove the oxide masking layer 1 as shown in FIG.
4 'is formed. The resist is H at 140 ° C, for example
Remove with ₂ SO ₄ / H ₂ O ₂ .

Next, a resist pattern for ion implantation for element isolation regions is formed on the surface of the polysilicon film 15 including the oxide masking layer 14 ', and boron (B) is added to the silicon substrate 11 at, for example, 30 KeV, 3 KeV. × 10 ¹³ /
Ions are implanted under the condition of cm ² . Since the ion-implanted boron is easily incorporated into the silicon oxide film, the silicon substrate 11 may be subjected to high-temperature annealing treatment to push the boron into the silicon substrate 11 before performing the field oxidation.

Next, so-called field oxidation treatment is performed to form a field oxide film 21 as shown in FIG. At the same time, the polysilicon films 14 to B as the buffer layer are introduced into the main surface of the silicon substrate 11 in the region surrounded by the field oxide film 21 through the pad oxide film 12. As a result, the impurity layer 22 is formed. An impurity layer 23 doped with boron (B) is formed below the field oxide film 21 by ion implantation for the element isolation region described above.

More specifically, the field oxidation is generally carried out at 900 to 1000 ° C. under H ₂ / O ₂ atmosphere for several hours. In this field oxidation, the impurities doped in the buffer layer diffuse in the pad oxide film 12 and reach the silicon substrate 11. The diffusion coefficient D of B in the silicon oxide film when B is used for ion implantation as an impurity or BF ₂ is used as an impurity species is expressed by the following equations (1) and (2).

[0021]

[Equation 1] According to the above formula (1), when BF ₂ is used as the impurity species, it takes about 13 minutes at 1000 ° C. (1273 K) and 900 ° C. for boron (B) to pass through the silicon oxide film having a film thickness of 10 nm.
It takes about 202 minutes. Therefore, it is obvious that the impurities doped in the buffer layer diffuse into the pad oxide film 12, pass through the pad oxide film 12, and are introduced into the lower silicon substrate 11 by the general field oxidation treatment as described above. . Therefore, the impurity doping from the buffer layer to the silicon substrate 11 can be achieved simultaneously with the formation of the field oxide film 21 without changing the conditions of the conventional field oxidation process.

Further, the polysilicon film 15 as a buffer layer located below both ends of the oxide masking layer 14 '.
Are oxidized during the field oxidation described above to form so-called bird's beaks.

Boron (B) has the property of being easily incorporated into the silicon oxide film, and also has the above formulas (1) and (2).
As can be seen from the figure, since the diffusion in the silicon oxide film is slow, it is doped in the polysilicon film 15 located in the region not covered with the oxide masking film 14 'and under both ends of the oxide masking layer 14'. The impurities that are present are taken into the silicon oxide before reaching the silicon substrate 11. Therefore, due to the field oxidation under the same conditions as the conventional one, boron (B) is doped only in the main surface of the silicon substrate 11 in the region surrounded by the field oxide film 21, and the lower side of the edge of the field oxide film 21 is doped. It can be prevented from appearing in the silicon substrate 11.

In the above-mentioned ion implantation for forming the impurity layer 22 for the element formation region, since boron (B) is easily taken into the silicon oxide film, the silicon substrate 11 is heated to a high temperature before the field oxidation. By performing annealing, the boron taken in the pad oxide film 12 can be extruded into the silicon substrate 11. However,
At this time, it is necessary to consider the high temperature annealing conditions.
That is, it is preferable to set the condition that B previously ion-implanted into the amorphous silicon film 13 is diffused during the high temperature annealing and the B is not exuded from the pad oxide film 12 to the silicon substrate as described above. This high temperature annealing condition can be obtained from the above equation (1) in the case of BF ₂ , for example. Specifically, the impurity species is BF ₂
In the case of, in order to pass through the pad oxide film of 10 nm in thickness,
About 13 minutes at 1000 ℃ (1273K), about 2 at 900 ℃
Since it takes 02 minutes, it is preferable to perform the annealing treatment for less than 13 minutes when the annealing temperature is 1000 ° C. and for less than 220 minutes when the annealing temperature is 900 ° C.

Thereafter, as shown in FIG. 2B, the polysilicon film 15 and the oxide masking film 14 'remaining on the pad oxide film 12 are removed. Then, the gate electrode 31, the low-concentration impurity region n ⁻ , the spacer oxide film 32, and the high-concentration impurity region n are formed by a conventional method.
By forming ^+, the NMOS transistor 30 shown in FIG. 3 is formed.

FIG. 4 is a sectional view showing an NMOS transistor in which a channel portion is doped with impurities by a conventional method. In the NMOS transistor 40, the impurity concentration is added at the edge of the field oxide film 21 by the impurity layer 42 for the element isolation region and the impurity layer 43 for the channel portion doping, and an excessive high concentration impurity layer p ⁺⁺ is formed. It is formed. In this excess high-concentration impurity layer p ⁺⁺ , the junction breakdown voltage of the pn junction is lowered, and breakdown easily occurs at the edge of the field oxide film 21.

On the other hand, in the NMOS transistor 30 obtained in the above-described embodiment, the impurity (B) for the element isolation region diffuses to the silicon substrate 11 below the edge of the field oxide film 21. The impurity (BF ₂ ) doped for the channel portion is hardly diffused below the edge of the field oxide film 21. As a result, in the NMOS transistor 30, an undesired increase in the impurity concentration below the edge of the field oxide film 21 is suppressed, and breakdown at the edge of the field oxide film 21 can be prevented.

Further, in the method of manufacturing the semiconductor device of the present embodiment, the impurities doped in the polysilicon film 15 as the buffer layer are field-oxidized from the buffer layer through the pad oxide film 12 together with the formation of the field oxide film 21. The main surface of the silicon substrate 11 in the region surrounded by the film 21 is doped. Therefore, as shown in FIG. 5, it is possible to obtain an impurity distribution in which the impurity concentration on the surface of the silicon substrate 11 is the highest and the impurity concentration decreases as the depth increases. As a result, the impurity layer 22 having a desired impurity distribution can be easily formed without performing the annealing treatment. Therefore, according to the method for manufacturing the semiconductor device of the present embodiment, the impurities for the relatively thin channel portion are formed. It is possible to easily manufacture a MOS type transistor having the layer 22.

In the embodiment of the method for manufacturing a semiconductor device of the present invention described above, an example in which the amorphous silicon film 13 is formed as the buffer layer on the pad oxide film 12 has been described. It is possible to use polysilicon.

[0030]

As described above, according to the method of manufacturing the semiconductor device of the present invention, the buffer layer is provided on the pad oxide film, and the impurity ions are ion-implanted into the buffer layer. Then, a field oxide film is formed on the semiconductor substrate by selectively subjecting the semiconductor substrate to a thermal oxidation process, and the impurity ions ion-implanted into the buffer layer are removed from the semiconductor in a region surrounded by the field oxide film. Diffuse on the main surface of the substrate. As a result, the impurity layer for the channel can be formed within an appropriate range without damaging the semiconductor substrate due to the ion implantation. As a result,
It is possible to manufacture a fine semiconductor device with a high yield.

[Brief description of drawings]

1A to 1D are cross-sectional views showing respective steps of an embodiment of a method for manufacturing a semiconductor device of the present invention.

2A and 2B are cross-sectional views showing respective steps of an embodiment of the method for manufacturing a semiconductor device of the present invention.

FIG. 3 is a cross-sectional view showing a semiconductor device obtained by an embodiment of the semiconductor device manufacturing method of the present invention.

FIG. 4 is a cross-sectional view showing a semiconductor device obtained by a conventional method for manufacturing a semiconductor device.

FIG. 5 is a characteristic diagram showing an impurity distribution in a silicon substrate in an embodiment of a method for manufacturing a semiconductor device of the present invention.

6A to 6E are cross-sectional views showing respective steps of a conventional method for manufacturing a semiconductor device.

FIG. 7A is a characteristic diagram showing an impurity distribution after ion implantation in a conventional semiconductor device manufacturing method, and FIG. 7B is a characteristic diagram showing an impurity distribution after annealing.

[Explanation of symbols]

11 ... Silicon substrate, 12 ... Pad oxide film, 13 ... Amorphous silicon film, 14 ... Silicon nitride film, 14 '...
Oxide masking layer, 15 ... Polysilicon film, 21 ... Field oxide film, 22 ... Impurity layer, 23 ... Impurity layer.

Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location H01L 29/78 301R

Claims (1)

[Claims] 1. A step of forming an oxide film on a semiconductor substrate, a step of providing a buffer layer on the oxide film, a step of implanting impurity ions into the buffer layer, and a step of partially forming an oxide masking layer on the buffer layer. Forming a field oxide film on the semiconductor substrate by subjecting the semiconductor substrate to a thermal oxidation process, and enclosing the impurity ions ion-implanted in the buffer layer with the field oxide film. A method of manufacturing a semiconductor device, comprising a step of diffusing into the main surface of the semiconductor substrate in a region.