JPH09232884A - Amplifier circuit - Google Patents

Amplifier circuit

Info

Publication number
JPH09232884A
JPH09232884A JP6014096A JP6014096A JPH09232884A JP H09232884 A JPH09232884 A JP H09232884A JP 6014096 A JP6014096 A JP 6014096A JP 6014096 A JP6014096 A JP 6014096A JP H09232884 A JPH09232884 A JP H09232884A
Authority
JP
Japan
Prior art keywords
stage
circuit
active load
amplifier circuit
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6014096A
Other languages
Japanese (ja)
Inventor
Koichi Mori
晃一 森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Onkyo Corp
Original Assignee
Onkyo Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Onkyo Corp filed Critical Onkyo Corp
Priority to JP6014096A priority Critical patent/JPH09232884A/en
Publication of JPH09232884A publication Critical patent/JPH09232884A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To improve the common mode rejection ratio(CMRR) with a simple configuration by detecting a common emitter current of a 1st stage differential amplifier circuit and controlling an active load of a 2nd stage with its detection output. SOLUTION: The circuit is provided with a differential amplifier input stage 1 consisting of transistors(TRs) Q1, Q2. A common emitter circuit configures a current detection means 2 consisting of a series circuit of resistors RE1, RE2 and a voltage across the resistor RE2 is given to an active load 4 of a 2nd stage amplifier section. Then the 2nd stage amplifier element 3 consisting of a TR Q3 is driven by one side output (in this case, the Tr Q1) of the differential amplifier input stage 1. Moreover, an active load 4 consisting of a TR Q4 is connected to the TR Q3 and a voltage across the resistor RE2 of the current detection means 2 is given to the active load 4.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、電子機器の分野に
於ける増幅器の増幅回路に関し、特に差動入力部を有す
る低周波増幅回路の同相成分除去比を高くすることがで
きる増幅回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplifier amplifier circuit in the field of electronic equipment, and more particularly to an amplifier circuit capable of increasing a common mode component removal ratio of a low frequency amplifier circuit having a differential input section.

【0002】[0002]

【従来の技術】従来、低周波信号増幅回路に於ては、直
流安定度の高さと負帰還のかけ易さから図3に示すトラ
ンジスタQ1及びトランジスタQ2からなる差動増幅回
路が入力回路として広く用いられている。この差動増幅
回路を入力回路として使用した直流増幅回路の最も簡単
な事例を図4に示す。この回路例では前記トランジスタ
Q1及びトランジスタQ2からなる差動増幅回路の共通
エミッタ電流源を抵抗REで構成し、2つの差動出力の
うち一方のトランジスタQ1からのみ出力を取り出し
て、2段目の増幅素子トランジスタQ3の入力としてい
る。この2段目の能動負荷はトランジスタQ4による定
電流回路となっている。
2. Description of the Related Art Conventionally, in a low frequency signal amplifying circuit, a differential amplifying circuit composed of a transistor Q1 and a transistor Q2 shown in FIG. 3 is widely used as an input circuit because of high DC stability and ease of applying negative feedback. It is used. FIG. 4 shows the simplest case of a DC amplifier circuit using this differential amplifier circuit as an input circuit. In this circuit example, the common emitter current source of the differential amplifier circuit composed of the transistor Q1 and the transistor Q2 is constituted by a resistor RE, and only one transistor Q1 of the two differential outputs takes out the output and the second stage It is used as the input of the amplification element transistor Q3. The active load in the second stage is a constant current circuit formed by the transistor Q4.

【0003】差動増幅回路に於いては、2つの入力電圧
の差に比例して電圧が2つの出力間に生じるように動作
するので、両出力の差電圧を出力として取り出すときに
大きな同相成分除去比(以下CMRRと略称する)が得
られるが、図4の回路では片側のみを使用しているため
本来の同相成分除去効果は期待できない。CMRRを大
きくするには共通エミッタ回路の抵抗REを大きくする
必要があるが、抵抗REは初段の動作電流を決定するた
め余り大きくすることは現実的ではない。従って、高い
CMRRを確保するには図5に示すように初段差動増幅
回路の共通エミッタ回路をトランジスタQ7を使用した
定電流源とするか、図6に示すように差動増幅回路の2
つの出力を使用してトランジスタQ5を使用した差動2
段増幅回路とするなどの手段が採用されている。尚、ト
ランジスタQ4、トランジスタQ6は能動負荷である。
Since the differential amplifier circuit operates so that a voltage is generated between two outputs in proportion to the difference between two input voltages, a large common-mode component is produced when the difference voltage between both outputs is taken out as an output. Although a removal ratio (hereinafter abbreviated as CMRR) can be obtained, the original in-phase component removal effect cannot be expected because the circuit of FIG. 4 uses only one side. To increase the CMRR, it is necessary to increase the resistance RE of the common emitter circuit, but it is not realistic to increase the resistance RE because it determines the operating current of the first stage. Therefore, in order to secure a high CMRR, as shown in FIG. 5, the common emitter circuit of the first stage differential amplifier circuit should be a constant current source using the transistor Q7, or as shown in FIG.
Differential using transistor Q5 with two outputs
A means such as a stage amplifier circuit is adopted. The transistors Q4 and Q6 are active loads.

【0004】[0004]

【発明が解決しようとする課題】前記した従来例のうち
図4に示す回路は、構成は簡単であるが実測によるとC
MRRは40db程度と低い欠点があり、図5並びに図
6による回路ではCMRRは改善されるが、いずれの場
合も回路が複雑となり部品点数も増加するという解決す
べき課題があった。
Among the above-mentioned conventional examples, the circuit shown in FIG. 4 has a simple structure, but C
The MRR has a low defect of about 40 db, and the CMRR is improved in the circuits shown in FIGS. 5 and 6, but in both cases, there is a problem to be solved that the circuit becomes complicated and the number of parts increases.

【0005】そこで、本発明は、入力部に差動増幅回路
を用いた低周波増幅回路において、初段差動増幅回路の
共通エミッタ電流を検出し、当該検出出力により2段目
の能動負荷を制御することで、簡単な構成でありながら
CMRRが改善された増幅回路を提供する事を目的とす
る。
Therefore, the present invention detects a common emitter current of a first stage differential amplifier circuit in a low frequency amplifier circuit using a differential amplifier circuit in an input section and controls an active load of the second stage by the detected output. By doing so, it is an object to provide an amplifier circuit having an improved CMRR with a simple structure.

【0006】[0006]

【課題を解決するための手段】該目的を達成するための
本発明にいう増幅回路を、その実施態様を示す図1並び
に他の変形例を示す図2により、夫々の図面及び従来例
に於ける共通の部品に使用した符号を用いて説明する
と、第1発明は、差動増幅入力段1と、当該差動増幅入
力段1の共通エミッタ回路に接続されている電流検出手
段2と、前記差動増幅入力段1の2つの増幅出力のうち
一方のみを取り出して増幅する2段目増幅素子3と、前
記電流検出手段2の検出出力によって制御される2段目
能動負荷4とからなることを特徴とする増幅回路であ
る。
An amplifier circuit according to the present invention for achieving the above object is shown in each drawing and the conventional example with reference to FIG. 1 showing an embodiment and FIG. 2 showing another modification. Describing with reference to the reference numerals used for the common parts, the first aspect of the present invention is directed to a differential amplification input stage 1, a current detection means 2 connected to a common emitter circuit of the differential amplification input stage 1, and The differential amplification input stage 1 comprises a second stage amplifying element 3 for extracting and amplifying only one of the two amplified outputs, and a second stage active load 4 controlled by the detection output of the current detecting means 2. Is an amplifier circuit.

【0007】第2発明は、上記第1発明に於いて、前記
電流検出手段2が抵抗RE1 と抵抗RE2 との直列回路から
なり、抵抗RE2 の両端の電圧を検出出力とすることを特
徴とする増幅回路である。
A second invention is characterized in that, in the first invention, the current detecting means 2 is composed of a series circuit of a resistor RE1 and a resistor RE2, and a voltage across the resistor RE2 is used as a detection output. It is an amplifier circuit.

【0008】[0008]

【発明の実施の形態】本発明の増幅回路の実施の形態に
ついて、図1に基づいて説明する。図1の構成は、本発
明の実施態様の基本である第1実施例である。1は、ト
ランジスタQ1及びトランジスタQ2からなる差動増幅入力
段である。
BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of an amplifier circuit of the present invention will be described with reference to FIG. The configuration of FIG. 1 is a first example which is the basis of the embodiment of the present invention. Reference numeral 1 is a differential amplification input stage including a transistor Q1 and a transistor Q2.

【0009】当該差動増幅入力段1の共通エミッタ回路
は、抵抗RE1 と抵抗RE2 との直列回路から成る電流検出
手段2を構成し、当該抵抗RE2 の両端の電圧を、後述す
る2段目増幅部の能動負荷4の入力としている。
The common emitter circuit of the differential amplification input stage 1 constitutes a current detecting means 2 which is composed of a series circuit of a resistor RE1 and a resistor RE2, and a voltage across the resistor RE2 is amplified by a second stage which will be described later. It is used as the input of the active load 4 of the section.

【0010】3は、トランジスタQ3からなる2段目増幅
素子で、前記差動増幅入力段1の一方(図ではトランジ
スタQ1の側)の出力によってドライブされる。当該トラ
ンジスタQ3のコレクタにはトランジスタQ4からなる能動
負荷4が接続され、当該能動負荷4には前述のごとく前
記電流検出手段2の抵抗RE2の両端の電圧が入力され
る。
Reference numeral 3 denotes a second-stage amplifying element composed of a transistor Q3, which is driven by the output of one of the differential amplification input stages 1 (transistor Q1 side in the figure). An active load 4 composed of a transistor Q4 is connected to the collector of the transistor Q3, and the voltage across the resistor RE2 of the current detecting means 2 is input to the active load 4 as described above.

【0011】上記第1実施例の動作を図1により簡単に
説明すると、同図1並びに前述した従来例を示す図4も
参照して、2つの差動トランジスタQ1、トランジスタQ2
を流れる電流を夫々I1,I2とすると、これらは直流成分
Ic、同相成分ΔIc、差動成分ΔIdを用いて下記のように
表すことができる。
The operation of the first embodiment will be briefly described with reference to FIG. 1. Referring to FIG. 1 and FIG. 4 showing the above-mentioned conventional example, two differential transistors Q1 and Q2 are provided.
Let I1 and I2 be the currents flowing in
It can be expressed as follows using Ic, in-phase component ΔIc, and differential component ΔId.

【0012】 I1=Ic+ΔIc+ΔId …(1) I2=Ic+ΔIc−ΔId …(2) また、2段目の電流I3は、 I3=(RLI1−VBE1)/R3=RL(Ic+ΔIc+ΔId)/R3−VBE1/R3…(3) であるから、能動負荷に流れる電流をI4とすると出力電
流Ioは、 Io=RL(Ic+ΔIc)/R3+RLΔId/R3−VBE1/R3−I4 …(4) となる。ここで、初段のエミッタ回路に流れる電流は、
I1+I2=2(Ic+ΔIc)であるから、これを検出してI4
を制御し、 I4=RL(Ic+ΔIc)/R3 …(5) となる様に設定すれば、出力に現れる同相成分をキャン
セルする事ができる。
I1 = Ic + ΔIc + ΔId (1) I2 = Ic + ΔIc−ΔId (2) Further, the second stage current I3 is I3 = (RLI1-VBE1) / R3 = RL (Ic + ΔIc + ΔId) / R3-VBE1 / R3 ... Therefore, assuming that the current flowing through the active load is I4, the output current Io is Io = RL (Ic + ΔIc) / R3 + RLΔId / R3-VBE1 / R3-I4 (4). Here, the current flowing in the first stage emitter circuit is
Since I1 + I2 = 2 (Ic + ΔIc), this is detected and I4
By controlling and setting I4 = RL (Ic + ΔIc) / R3 (5), the in-phase component appearing in the output can be canceled.

【0013】ここで、上記式(3)に戻り、又図1に於
て、抵抗R3,R4,RL,RE2 の夫々の抵抗値を、 R3=R4,RL=2RE2 …(6) となるように選ぶと、 I3=(RLI1−VBE1)/R3={RL(Ic+ΔIc+ΔId)−VBE1}/R3…(7) I4={2RE2 (Ic+ΔIc)−VBE2}/R4 …(8) であるから、 Io=I3−I4 =(RL/R3−2RE2 /R4)(Ic+ΔIc)+RLΔId/R3−VBE1/R3 +VBE2/R4 …(9) ここで、 VBE1≒VBE2 …(10) とすると、前記式(6)の抵抗値の条件から、 Io≒RLΔId/R3 …(11) となり、出力は差動成分のみとなって同相成分は現れな
い。
Now, returning to the above equation (3), the resistance values of the resistors R3, R4, RL, RE2 in FIG. 1 are set to R3 = R4, RL = 2RE2 (6). If I3 = (RLI1−VBE1) / R3 = {RL (Ic + ΔIc + ΔId) −VBE1} / R3 ... (7) I4 = {2RE2 (Ic + ΔIc) −VBE2} / R4 ... (8), Io = I3-I4 = (RL / R3-2RE2 / R4) (Ic + ΔIc) + RLΔId / R3-VBE1 / R3 + VBE2 / R4 (9) where, VBE1≈VBE2 (10), the resistance of the above formula (6) From the condition of the value, Io≈RLΔId / R3 (11), and the output is only the differential component and the in-phase component does not appear.

【0014】[0014]

【実施例】以上本発明の増幅回路の基本的な構成、並び
に作用を前記実施の態様の欄に於いて第1実施例として
詳述したが、図2に示す回路は第1実施例の変形で、初
段にFETQ1′,FETQ2′を使用し、前記第1実施例で述
べた条件に基づいて各定数を決定した事例である。この
事例についてCMRRを実測した結果、20KHzまで
の帯域で約70dbが得られ、ほぼ同じ定数からなる図
4に示す従来例の回路に比べて約30db向上してい
る。更に、図2の回路に於いて、抵抗値を細かくトリミ
ングすることにより、CMRRを約100db近くまで
向上し得ることが実験により確認されている。尚、参考
までに、本実施例より部品数が多く且つ構成も複雑な図
5、図6に示した従来例についてCMRRの実測値を記
載すれば、図5の従来例では約85db、図6の従来例
では約108dbの値を示している。
The basic configuration and operation of the amplifier circuit of the present invention have been described in detail as the first embodiment in the section of the above-mentioned embodiment, but the circuit shown in FIG. 2 is a modification of the first embodiment. In this case, FETQ1 'and FETQ2' are used in the first stage, and each constant is determined based on the conditions described in the first embodiment. As a result of actually measuring the CMRR in this case, about 70 dB is obtained in the band up to 20 KHz, which is improved by about 30 dB compared with the circuit of the conventional example shown in FIG. Further, in the circuit of FIG. 2, it has been confirmed by experiments that the CMRR can be improved to about 100 db by finely trimming the resistance value. For reference, if the actual measurement value of CMRR is described for the conventional example shown in FIGS. 5 and 6 in which the number of parts is larger and the configuration is more complicated than that of the present embodiment, the conventional example of FIG. In the conventional example, the value is about 108 db.

【0015】以上本発明の代表的と思われる実施例につ
いて説明したが、本発明は必ずしもこれらの実施例構造
のみに限定されるものではなく、本発明にいう前記の構
成要件を備え、かつ、本発明にいう目的を達成し、以下
にいう効果を有する範囲内において適宜改変して実施す
ることができるものである。
Although the embodiments which are considered to be representative of the present invention have been described above, the present invention is not necessarily limited to only the structures of the embodiments, but has the above-mentioned constitutional requirements according to the present invention, and The present invention achieves the object of the present invention and can be appropriately modified and implemented within the range having the following effects.

【0016】[0016]

【発明の効果】以上の説明から既に明らかなように、本
発明にいう増幅回路は、差動入力部を有する増幅器の同
相成分除去比を高くすることができる。特に高い同相成
分除去比を得るに際して最も簡単な従来例と比較して改
善に伴う部品の追加は殆ど必要はない。従って、部品代
を上昇させずに性能向上を得ることができる。
As apparent from the above description, the amplifier circuit according to the present invention can increase the common-mode component removal ratio of the amplifier having the differential input section. In order to obtain a particularly high in-phase component removal ratio, it is almost unnecessary to add a component accompanying the improvement as compared with the simplest conventional example. Therefore, the performance can be improved without increasing the cost of parts.

【0017】部品数を増加する必要がないことは部品管
理、製造工数などの生産経費の面で有利である。以上で
明らかな如く、本発明の増幅回路は、初段入力部のエミ
ッタ電流を検出し、検出出力により2段目増幅部の能動
負荷を制御することにより簡単な回路構成で同相成分除
去比を高くする事ができ、経費を掛ける事なく増幅器の
性能を向上し得るという効果を期待することができるの
である。
The fact that it is not necessary to increase the number of parts is advantageous in terms of production costs such as part management and manufacturing man-hours. As is clear from the above, the amplifier circuit of the present invention detects the emitter current of the first-stage input section and controls the active load of the second-stage amplifier section by the detected output, thereby increasing the common-mode component removal ratio with a simple circuit configuration. Therefore, it is possible to expect an effect that the performance of the amplifier can be improved without cost.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1実施例の構成を説明する回路図で
ある。
FIG. 1 is a circuit diagram illustrating a configuration of a first embodiment of the present invention.

【図2】第1実施例の変形例の回路図である。FIG. 2 is a circuit diagram of a modified example of the first embodiment.

【図3】従来例の入力部の回路図である。FIG. 3 is a circuit diagram of an input unit of a conventional example.

【図4】最も基本的な従来例の回路図である。FIG. 4 is a most basic circuit diagram of a conventional example.

【図5】他の従来例の回路図である。FIG. 5 is a circuit diagram of another conventional example.

【図6】更に改良された従来例の回路図である。FIG. 6 is a circuit diagram of a further improved conventional example.

【符号の説明】[Explanation of symbols]

1 差動増幅入力段 2 エミッタ回路の電流検出手段 3 2段目増幅素子 4 2段目能動負荷 1 differential amplification input stage 2 current detection means of emitter circuit 3 second stage amplification element 4 second stage active load

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 差動増幅入力段(1)と、当該差動増幅入
力段(1)の共通エミッタ回路に接続されている電流検出
手段(2)と、前記差動増幅入力段(1)の2つの増幅出力の
うち一方のみを取り出して増幅する2段目増幅素子(3)
と、前記電流検出手段(2)の検出出力によって制御され
る2段目能動負荷(4)とからなることを特徴とする増幅
回路。
1. A differential amplification input stage (1), a current detection means (2) connected to a common emitter circuit of the differential amplification input stage (1), and the differential amplification input stage (1). Second-stage amplification element (3) that extracts and amplifies only one of the two amplified outputs of
And an second stage active load (4) controlled by the detection output of the current detecting means (2).
【請求項2】 前記電流検出手段(2)が抵抗RE1と抵抗RE
2との直列回路からなり、抵抗RE2の両端の電圧を検出出
力とすることを特徴とする請求項1記載の増幅回路。
2. The current detecting means (2) comprises a resistor RE1 and a resistor RE.
2. The amplifier circuit according to claim 1, wherein the amplifier circuit comprises a series circuit of 2 and the voltage across the resistor RE2 is used as a detection output.
JP6014096A 1996-02-21 1996-02-21 Amplifier circuit Pending JPH09232884A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6014096A JPH09232884A (en) 1996-02-21 1996-02-21 Amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6014096A JPH09232884A (en) 1996-02-21 1996-02-21 Amplifier circuit

Publications (1)

Publication Number Publication Date
JPH09232884A true JPH09232884A (en) 1997-09-05

Family

ID=13133545

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6014096A Pending JPH09232884A (en) 1996-02-21 1996-02-21 Amplifier circuit

Country Status (1)

Country Link
JP (1) JPH09232884A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1261129A1 (en) * 2001-05-25 2002-11-27 Agilent Technologies, Inc. (a Delaware corporation) Amplifier apparatus for an output stage of a laser driver circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1261129A1 (en) * 2001-05-25 2002-11-27 Agilent Technologies, Inc. (a Delaware corporation) Amplifier apparatus for an output stage of a laser driver circuit
US6650183B2 (en) 2001-05-25 2003-11-18 Agilent Technologies, Inc. Amplifier apparatus for an output stage of a laser driver circuit

Similar Documents

Publication Publication Date Title
JP3088262B2 (en) Low distortion differential amplifier circuit
US4509101A (en) Protection circuit for switching power amplifier
JPH10150330A (en) Dc offset cancellation circuit and differential amplifier circuit using the same
US7298211B2 (en) Power amplifying apparatus
JPH04227104A (en) Amplifier circuit
US4101842A (en) Differential amplifier
US4283683A (en) Audio bridge circuit
JPH09232884A (en) Amplifier circuit
US6734720B2 (en) Operational amplifier in which the idle current of its output push-pull transistors is substantially zero
JP2000022451A (en) Signal processing circuit device
JPH0529845A (en) Current mirror circuit
US20040140854A1 (en) Amplifier arrangement, circuit and method with improved common mode rejection ratio
JPS5827539Y2 (en) audio amplifier
KR830001980B1 (en) Power amplification circuit
JPH11271367A (en) Circuit for detecting electric field intensity
JPH0317512Y2 (en)
JP2712310B2 (en) Current mirror circuit
JP3085203B2 (en) Preamplifier
JP2000174565A (en) Power amplifier ic and audio system
JP3036925B2 (en) Differential amplifier circuit
JPH04343506A (en) Amplifier circuit
JP2000236383A (en) Power supply system for electrostatic microphone, its amplifier circuit and telephone terminal using it
JP2538239Y2 (en) Low frequency amplifier circuit
JPH0543532Y2 (en)
JPH06188640A (en) Amplifier circuit and ic using thereof