JPH09231161A5 - - Google Patents

Info

Publication number
JPH09231161A5
JPH09231161A5 JP1996307546A JP30754696A JPH09231161A5 JP H09231161 A5 JPH09231161 A5 JP H09231161A5 JP 1996307546 A JP1996307546 A JP 1996307546A JP 30754696 A JP30754696 A JP 30754696A JP H09231161 A5 JPH09231161 A5 JP H09231161A5
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JP
Japan
Prior art keywords
cache
channel information
entry
corresponding channel
channels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1996307546A
Other languages
English (en)
Japanese (ja)
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JPH09231161A (ja
Filing date
Publication date
Priority claimed from US08/553,041 external-priority patent/US5875352A/en
Application filed filed Critical
Publication of JPH09231161A publication Critical patent/JPH09231161A/ja
Publication of JPH09231161A5 publication Critical patent/JPH09231161A5/ja
Pending legal-status Critical Current

Links

JP8307546A 1995-11-03 1996-11-05 直接メモリ・アクセス（ｄｍａ）システム Pending JPH09231161A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/553041 1995-11-03
US08/553,041 US5875352A (en) 1995-11-03 1995-11-03 Method and apparatus for multiple channel direct memory access control

Publications (2)

Publication Number Publication Date
JPH09231161A JPH09231161A (ja) 1997-09-05
JPH09231161A5 true JPH09231161A5 (enExample) 2004-11-04

Family

ID=24207871

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8307546A Pending JPH09231161A (ja) 1995-11-03 1996-11-05 直接メモリ・アクセス（ｄｍａ）システム

Country Status (3)

Country Link
US (1) US5875352A (enExample)
EP (1) EP0772131A3 (enExample)
JP (1) JPH09231161A (enExample)

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