JPH09204787A - Measure system for abnormality in writing non-volatile memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable writing a sum correction value and data for checking CRC for a non-volatile memory immediately before turning off a power source during writing operation. SOLUTION: A main control section 12 accesses a memory 11 and performs writing operation. An output interface 13 and an output section 14 including LEDs and the like are provided in order that the main control section 12 informs writing operation in the memory 11 to the outside. Also, a switch status section 15 informing a ON/OFF state of a switch to the main control section 12 is provided, and a power control section 16 controlling ON/OFF of a power source by a switch ON/OFF signal from the main control section 12 is provided. When a switch OFF information is inputted from the switch status section 15, after confirming a state under writing operation, the main control section 12 outputs a power source OFF signal to the power source control section 16 and turns off a power source.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an abnormal state countermeasure process such as power-off or power-source voltage drop during a write operation in a nonvolatile memory such as a flash memory or an EEPROM (electrically erasable type).

[0002]

2. Description of the Related Art A memory, such as a flash memory or an EEPROM, which is electrically writable and retains data in the memory even when power is not supplied, is used as a check method for garbled data. A check based on a value or a CRC calculation is performed to check whether or not the data in the memory is correct.

For example, in the check using the sum value, a numerical value (sum correction value) which is a result of adding all the data in the memory at the end of the write operation in the memory is added so that the value becomes OOH. Taking the memory 1 of FIG. 3 as an example, an area 3 for storing a sum correction value is provided in a part of the data area 2 of the memory, and data check is performed using this sum correction value. Also in the case of CRC check,
By storing the result of CRC calculation in a part of the memory, whether or not the data in the memory is normal is checked by recalculation.

[0004]

However, if the power supply to these memories is cut off during the write operation,
Since the write operation of the CRC check data and the sum correction value cannot be performed, it cannot be checked whether the data is correct or not. Therefore, even if the data in the memory is garbled, it is not known, and this is a serious problem in terms of quality.

An object of the present invention is to make it possible to write the check data in the memory immediately before the power is turned off.

[0006]

The above-mentioned object is to control the ON / OFF state of the power switch to the main control unit as a countermeasure against an abnormality when the main control unit turns off the power supply during writing operation to the nonvolatile memory. A switch status section for notifying and a power control section for turning the power on / off by an on / off signal from the main control section are provided, and the main control section stores in the memory when the power switch off information is input from the switch status section. This is accomplished by outputting a power-off signal to the power supply control unit after confirming that the write operation is not in progress.

The above-mentioned object is to detect a low power supply voltage and notify the main control unit of a low voltage detection as an abnormal measure when the power supply voltage drops during the writing operation from the main control unit to the nonvolatile memory. Section, and the main control section,
This is achieved by the fact that when the voltage drop information is input from the low voltage detection unit, the CPU is interrupted to end the write operation and at the same time the sum check or CRC calculation is executed to write the check data. It

According to the above means, the main control unit monitors the switch status, and when the switch is turned off, checks whether or not the writing operation is performed in the memory, confirms that the writing operation is not performed, and then the power source is turned on. A power supply off signal is output to the control unit, and the power supply control unit operates a relay or thyristor to turn off the power supply.

When the voltage drops, the main control unit sends an interrupt signal to the CPU when the information is input from the voltage drop detection unit.
Input to NMI (none maskable interrupt), etc.
This makes it possible to instantly recognize the power supply drop, and if the memory is being written to, terminate the write operation and execute checksum or CRC calculation before writing the check data before the power supply voltage drops. .

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to embodiments. FIG. 1 shows the configuration of an embodiment of the present invention,
This is to take measures against abnormalities when the power is turned off. In the figure, the main control unit 12 accesses the memory 11 and performs a write operation. A nonvolatile memory such as a flash memory or an EEPROM is used as the memory 11.

An output interface 13 and an output display unit 14 are provided to notify the outside that the main control unit 12 is writing to the memory 11. The output display unit 14 is provided with an LED and a 7-segment LED so that it can be easily monitored from the outside.
Information is sent from the main control unit 12 during the writing operation to and is turned on. If the LED is off, the power may be turned off, and the data in the memory 11 is held in a state where the check data and the sum correction value data are stored in the memory 11.

Further, a switch status section 15 for informing the main control section 12 of the switch on / off state is provided,
A power supply control unit 16 is provided which controls the power supply on / off by a switch on / off signal from the main control unit 12. The power supply control unit 16 controls ON / OFF of a power supply by operating a relay or a thyristor according to an ON / OFF signal input from the main control unit 12.

Now, even if the switch-off information is input from the switch status section 15 during the data write operation by accessing the memory 11 by the main control section 12, the main control section 12 sends a power-off signal to the power control section 16. Is not output to. When it is confirmed that the memory 11 is not being written, the main controller 12 outputs a power-off signal to the power controller 16, so that the power controller 16 receives the power-off signal and powers off. As a result, the power can be turned off without fail when the writing of the CRC check data and the sum correction value data is completed in the memory 11, and the power off during writing is prevented.

FIG. 2 shows the configuration of another embodiment of the present invention, in which measures against abnormalities when the power supply voltage drops are taken. The main control unit 12 includes a low voltage detection unit 17, and when the detection unit 17 detects a voltage drop, for example, in a circuit operating at a normal power supply voltage of 5V, the detection threshold value is set to 4.8V and the power is turned off to 5V. When the voltage decreases from 4.8V to 4.8V, the detection unit 17 transmits information to the main control unit 12.

In the main controller 12, the voltage drop can be instantly recognized by inputting the information from the detector 17 into the NMI of the CPU. At this time, if the writing operation to the memory 11 is in progress, the writing operation is immediately ended, and the check data is written by performing the sum check or the CRC calculation. This processing time is the voltage drop time (+
The larger the electrostatic capacity between 5V and GND is, the longer the voltage drop time is), and the above data writing process is sufficiently possible.

As described above, the sum check correction value or the CRC check data can be stored when the power is turned off or the voltage drops, and whether or not the data in the memory is normal can be checked by recalculation.

Incidentally, in the flash memory and the EEPROM, when the writing operation of the memory is performed, the voltage other than 5V is set to 12V.
There is a type that uses a power supply of V voltage, and if the power supply is suddenly turned off during a write operation to the memory with a 12 V voltage applied, an element inside the memory may be overloaded and a failure may occur. By implementing the power off abnormality countermeasure of the present invention, the above problem can be solved and the defective rate of the memory can be reduced.

[0018]

As described above, according to the present invention, since the check data in the memory can be written immediately before the power is turned off and the voltage drops, the flash memory and the EEPROM can be written.
It is possible to check the data inside the memory such as M, thereby reducing the defective rate and improving the quality.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a configuration diagram of another embodiment of the present invention.

FIG. 3 is an explanatory diagram of areas in a memory.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Memory, 2 ... Data area, 3 ... Check data area, 11 ... Memory, 12 ... Main control part, 13 ... Output interface, 14 ... Output display part, 15 ... Switch status part, 16 ... Power supply control part, 17 ... Low voltage detector.

Claims (3)

[Claims] 1. A switch status section for notifying the main control section of the on / off state of a switch in a method for taking measures against an abnormality when the power is turned off during a write operation from a main control section to a nonvolatile memory, A power supply control unit for turning on / off the power supply by an on / off signal from the main control unit was provided, and it was confirmed that the main control unit was not writing data to the memory when the switch off information was input from the switch status unit. After that, it outputs a power-off signal to the power-supply control unit, and is a non-volatile memory writing abnormality countermeasure method. 2. A low voltage detection unit for detecting a power supply voltage drop and notifying the main control unit in a method of taking measures against an abnormality when the power supply voltage drops during a write operation from a main control unit to a nonvolatile memory. When the voltage drop information is input from the low voltage detection unit, the main control unit interrupts the CPU to end the write operation and causes the sum check or CRC calculation to be executed to write the check data. A non-volatile memory write error countermeasure method characterized by the following. 3. The non-volatile memory according to claim 1, wherein the main control unit includes an output interface unit and an output display unit that access the memory and indicate that a writing operation is being performed. Abnormality countermeasure method during writing.