JPH0918231A - Constant voltage circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a constant voltage circuit which can obtain the stable constant voltage regardless of variance of the threshold voltage of a transistor caused in a production process mode and also of the temperature characteristics and is suitably applied to an integrated circuit that has the extremely small current consumption. SOLUTION: In a constant voltage circuit which is applied to a clock integrated circuit requiring the extremely small current consumption and outputs the sum of threshold value, the size and threshold voltage of a transistor that constructs the constant voltage circuit are set equal to those of a transistor that constructs a CMOS inverter oscillation circuit which uses the constant voltage circuit as its power supply. In other words, the same channel width and length are secured between a P channel transistor TR 103 which generates the reference voltage of the constant voltage circuit and a P channel TR 108 which forms an amplifying part of the CMOS inverter oscillation circuit and also between an N channel TR 104 which generates the reference voltage of the constant voltage circuit and an N channel TR 109 which forms the amplifying part of the CMOS inverter oscillation circuit respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to an integrated circuit for timepieces, which requires extremely low current consumption.

[0002]

2. Description of the Related Art In an integrated circuit for a timepiece, it is the oscillating section that consumes the most current and the dividing section that consumes the most current. Since these two occupy 80% of the total current consumption, it is most effective to reduce these current consumption. Since the current consumption is proportional to the frequency, voltage, and capacity, reduction of these three is being promoted. Among them, a conventional method will be described for an attempt to reduce the current by lowering the power supply voltage of the oscillator and the frequency divider.

Description will be made with reference to the circuit diagram shown in FIG. Four
01 is a constant current source, 402 and 404 are current mirrors,
It was used to output the threshold value of the P-channel transistor 403. Although it depends on the flowing current, a voltage of threshold value + α is generated between VDD and point A.

Next, this is voltage-current converted by the operational amplifier 405, and if the offset of the operational amplifier is ignored, the same voltage as at the point A is generated at the point B. By adding the threshold value of the N-channel transistor 407 to this voltage, the (C threshold value of the P-channel transistor +
The threshold value of the N-channel transistor) is output.

The oscillation circuit and the frequency dividing circuit are driven by this voltage.

[0006]

In the prior art, at least a P-channel transistor and an N-channel transistor which form an amplifying section of a CMOS inverter oscillation circuit, and a P-channel transistor and an N-channel which determine a reference voltage value of a constant voltage circuit. Due to the fact that the transistors are arranged far apart and the transistor sizes of the oscillator circuit and the constant voltage circuit are different, and the currents flowing are different, a low current consumption of 100 nA or less should be taken into consideration in consideration of process threshold variations and temperature characteristics. It was difficult to make it happen. This will be described with reference to FIG. The threshold of a normal transistor is −
It has a temperature dependence of 2.5 mV / ° C. FIG. 3 shows the temperature characteristic of the oscillation operation stop voltage of the CMOS inverter oscillation circuit and the output voltage of the constant voltage circuit. In FIG. 3, for the above reason, the temperature characteristic of the oscillation operation stop voltage of the CMOS inverter oscillation circuit and the temperature characteristic of the output voltage of the constant voltage circuit are different, so that they intersect on the high temperature side and the oscillation operation is stopped. There is. In order to guarantee the operation on the predetermined high temperature side,
The output voltage of the constant voltage circuit may be increased or the oscillation operation stop voltage of the CMOS inverter oscillation circuit may be decreased. However, this results in an increase in current consumption. As described above, it has been difficult for the prior art to realize a low current consumption of 100 nA or less.

[0007]

According to the present invention, there is provided (Means 1) a constant voltage circuit which outputs a sum of a threshold value of a P-channel transistor and a threshold value of an N-channel transistor as a reference voltage. The channel width and the channel length of the P-channel transistor and the N-channel transistor that determine the reference voltage value of
A P-channel transistor and an N-channel transistor which form an amplifier of a CMOS inverter oscillation circuit using the constant voltage circuit output as a power source.
The channel width and the channel length of the channel transistors are the same for the P-channel transistors and the N-channel transistors.

(Means 2) Further, in the constant voltage circuit, a constant offset is added on the basis of the reference voltage and output.

(Means 3) Further, in the constant voltage circuit which outputs the sum of the threshold value of the P-channel transistor and the threshold value of the N-channel transistor as the reference voltage, P which determines the reference voltage value of the constant voltage circuit. The channel width and the channel length of the channel transistor and the N-channel transistor are CM with the constant voltage circuit output as a power source.
The channel width and the channel length of the P-channel transistor and the N-channel transistor that form the amplifying portion of the OS inverter oscillation circuit are set to the same size between the P-channel transistors and between the N-channel transistors, and the reference voltage value of the constant voltage circuit is determined. The P-channel transistor and the N-channel transistor are arranged close to each other with the source and drain facing in the same direction and the P-channel transistor and the N-channel transistor forming the amplifying part of the CMOS inverter oscillation circuit using the constant voltage circuit output as a power source. Characterize.

[0010]

EXAMPLE An example of the present invention will be described with reference to FIG. FIG. 1 is a circuit diagram showing one embodiment of the present invention. 10
Reference numeral 1 is a constant current source, 102 and 105 are N-channel transistors that form a current mirror circuit, 103 and 104 are P-channel and N-channel transistors whose gates and drains are connected to form a reference voltage, and the reference voltage is at a point D. Occur. , 106 are operational amplifiers as buffers. A constant voltage circuit is composed of the above elements, and D
The reference voltage obtained at the point is impedance-converted by the operational amplifier 106 and output to the point E as the output of the voltage circuit. The point E, which is the output of the constant voltage circuit, is supplied as a power source for the oscillator circuit and the frequency divider circuit.

The CMOS inverter oscillator circuit includes a P-channel transistor 108 and an N-channel transistor 1.
09 constitutes an amplifying section, and the feedback resistor 115 constitutes a feedback section. 110 is a drain resistance, 107 is a gate capacitance, 111 is a drain capacitance, and 112 is a crystal oscillator, which is connected outside the integrated circuit. The CMOS inverter oscillation circuit is composed of the above elements.

Although the frequency dividing circuit is not described in detail, a toggle type flip-flop is generally used.

The means 1 will be described with reference to FIG. P-channel transistor 10 forming the reference voltage of the constant voltage circuit
3 has the same channel width and channel length as the P-channel transistor 108 forming the amplification section of the CMOS inverter oscillation circuit. In addition, the N-channel transistor 104 forming the reference voltage of the constant voltage circuit is C
The channel width and the channel length are the same as those of the N-channel transistor 109 forming the amplification section of the MOS inverter oscillation circuit.

This CMOS inverter oscillator circuit has a structure in which it is DC-biased automatically by the feedback resistor 115, and the AC waveform is superimposed on the auto-bias value. Therefore, this means that when the oscillation circuit is not oscillating, the P-channel transistor 108 and the N-channel transistor 10 are
It can be said that the circuit configured by 9 and the circuit configured by the P-channel transistor 103 and the N-channel transistor 104 of the constant voltage circuit have completely the same wiring structure in terms of DC. Considering that the potentials at points D and E are the same, the DC potentials at point F, which is the midpoint of the reference voltage, and point G, which is the drain of the oscillation circuit, if the threshold and transistor sizes are the same. Are the same. This means that if the threshold value of the transistor of the oscillation circuit changes due to the semiconductor manufacturing process, the constant voltage side also changes by the same amount accordingly. Further, when the current amplification factor of the transistor of the oscillation circuit changes due to the semiconductor manufacturing process, it means that the constant voltage side also changes by the same amount accordingly. At the same time, this also means that if the threshold value of the transistor of the oscillation circuit and the current amplification factor value change with temperature, the constant voltage side also changes by the same amount accordingly. That is, if the constant current source 101 supplies the minimum current at which the CMOS inverter oscillator circuit can operate, the CMOS can be produced regardless of the semiconductor manufacturing process conditions and temperature conditions.
The inverter oscillation circuit will operate.

Next, the means 2 will be described with reference to FIGS. 1 and 2. Although not described in the above description, if the transistors 103 and 104 of the constant voltage circuit and the transistors 108 and 109 of the oscillation circuit have the same size, the current flowing through the transistors 103 and 104 increases and the current consumption of the constant voltage circuit increases. May exceed the CMOS inverter oscillation circuit section. Therefore, the ratio of the transistor 103 to the transistor 108 and the ratio of the transistor 104 to the transistor 109 are made the same, and the transistor size (channel width / channel length) of the constant voltage circuit is made relatively small to suppress the current. In that case, the voltage at the output point D does not reach the voltage required for oscillation. If the transistor is considered as a non-linear resistance element and the current is reduced, the output voltage will decrease. Therefore, in this case, the voltage was added by adding an offset to the operational amplifier.

The method of setting the offset of the operational amplifier is shown in FIG.
Shown in FIG. 2 shows an example of a typical one-sided output operational amplifier. Constant current source 202 and P-channel transistor 201
Supply bias with and. P-channel transistor 2
04 and 205 are a differential pair and an N-channel transistor 20.
6, 207 is an active load and N-channel transistor 20
Reference numeral 9 is an output stage transistor. Due to the offset of the operational amplifier, the P-channel transistor 20
The threshold value of 5 is made lower than that of the P-channel transistor 204. OUT as much as the threshold is lowered
The voltage of rises and can generate the voltage required for oscillation.

There is also a method of creating an offset by slightly changing the transistor size (channel width / length) of the differential pair transistors 204 and 205 without controlling the threshold value. Although this means is not often used because the output voltage value is difficult to control, it is used with consideration of variations when it is not desired to increase the number of masks (steps) used in the exposure step in the semiconductor manufacturing process.

Next, the means 3 will be described. The channel width and the channel length of the P-channel transistor and the N-channel transistor that determine the reference voltage value of the constant voltage circuit, and the P-channel transistor and the N-channel transistor that constitute the amplification section of the CMOS inverter oscillation circuit using the output of the constant voltage circuit as a power source. Channel width and channel length of P channel transistors and N channel
If the channel transistors have the same size, C
The CMOS inverter oscillator circuit can operate regardless of the semiconductor manufacturing process condition and the temperature condition as long as the minimum current at which the MOS inverter oscillator circuit can be supplied is supplied by the constant current source. . Even if transistors having the same characteristics are designed to have the same channel width and channel length, the same characteristics may not be obtained depending on the manufacturing conditions of the semiconductor manufacturing process. For example, it is ideal that the processing temperature of a heat treatment furnace that performs diffusion treatment, which is often used in the semiconductor manufacturing process, be uniform in the heat treatment furnace, but in reality, there are cases where the processing temperature varies within the heat treatment furnace. is there. In such a case, when the distribution of the resistance value of the resistance element and the threshold value of the transistor is measured in the manufactured wafer, the wafer outer peripheral portion and the wafer central portion, or the upper wafer portion and the lower wafer portion are measured. The characteristics may be slightly different depending on the position in the wafer such as. In order to solve the above-described problems, the present invention uses a channel width and a channel length of a P-channel transistor and an N-channel transistor that determine a reference voltage value of a constant voltage circuit and a CMOS inverter oscillation circuit using the constant voltage circuit output as a power source. The channel widths and the channel lengths of the P-channel transistors and the N-channel transistors that form the amplification unit are set to P-channel transistors and N-channel transistors,
The same size was used, and they were placed close to each other within the chip to suppress manufacturing variations in characteristics.

Further, in the ion implantation apparatus often used for forming the source and drain of a transistor in the semiconductor manufacturing process, the ion implantation direction to the wafer is often not perpendicular to the plane direction of the wafer. In this case, the phenomenon shown in FIG. 5 occurs. In FIG. 5, reference numeral 501 is a wafer, 502 is a resist applied to a predetermined portion of the wafer 501 to perform ion implantation, and 503 is an opening of the resist 502, which is an ion formed by ion implantation. It is a driving layer. When the ion implantation direction to the wafer has an angle with respect to the plane direction of the wafer,
Due to the influence of the thickness of the resist 502, the ion-implanted layer having the width A, which is the target of the design, is formed smaller by d. This affects the characteristics of elements such as transistors.
This will be described with reference to FIG. In FIGS. 6A and 6B, 601 is the gate of the transistor formed of polysilicon or the like, and 602 is the source and drain regions formed by ion implantation or the like. A portion where the source / drain region 602 and the gate 601 overlap each other serves as a channel of the transistor. W indicates the channel width and L indicates the channel length. FIG. 6A shows a transistor in which the source and drain of the transistor are horizontally arranged, and FIG. 6B shows a transistor in which the source and drain of the transistor are vertically arranged. Here, FIG.
Assuming that the direction in which the ion-implanted layer is formed smaller than the target width described above in the description of FIG. 6A is the vertical direction in FIGS. 6A and 6B, the ion-implanted layer in the case of FIG. Since the channel width of the transistor is formed smaller by d, the channel width of the transistor is smaller than W, which is W ′, and the transistor characteristics are affected. On the other hand, in FIG. 6B, the ion implantation layer is formed smaller by d so that it does not affect the channel of the transistor, so that the size of the transistor is formed as intended. Even if the transistor of FIG. 6 (a) and the transistor of FIG. 6 (b) are designed to have the same size, the finished wafer will show different characteristics.

According to the present invention, in order to solve the above-mentioned problems, the channel width and channel length of the P-channel transistor and the N-channel transistor that determine the reference voltage value of the constant voltage circuit, and the constant voltage circuit output as a power source are used.
The channel width and the channel length of the P-channel transistor and the N-channel transistor which form the amplifying section of the MOS inverter oscillation circuit are made the same size between the P-channel transistors and between the N-channel transistors, and the directions of the source and the drain are in the same direction. age,
The transistors can be manufactured with the same characteristics.

[0021]

As described above, according to the present invention, the channel width and the channel length of the P-channel transistor and the N-channel transistor that determine the reference voltage value of the constant voltage circuit, and the CMOS output using the constant voltage circuit output as a power source. The channel width and the channel length of the P-channel transistor and the N-channel transistor that form the amplification section of the inverter oscillation circuit are set to be the same size between the P-channel transistors and between the N-channel transistors, so that the semiconductor manufacturing process and the temperature conditions are not affected. , CM
If the minimum current at which the OS inverter oscillator circuit can operate is supplied, the CMOS inverter oscillator circuit operates.
A timepiece integrated circuit with an operating current of 0 nA or less can be realized.

Further, according to the present invention, since a constant offset is added based on the reference voltage and a constant voltage is output, the constant voltage circuit can output the voltage necessary for oscillation of the CMOS inverter oscillation circuit.

Further, according to the present invention, the P-channel transistor and the N-channel transistor that determine the reference voltage value of the constant voltage circuit use the output of the constant voltage circuit as a power source and C
Since the source and drain of the P-channel transistor and the N-channel transistor that form the amplifying section of the MOS inverter oscillator circuit are in the same direction and are arranged close to each other, a constant voltage circuit that is not easily affected by manufacturing variations in the semiconductor manufacturing process is provided. Can be provided.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a constant voltage circuit according to the present invention.

FIG. 2 is a circuit diagram showing the operational amplifier shown in FIG.

FIG. 3 is a relational diagram of constant voltage and oscillation operation stop.

FIG. 4 is a circuit diagram showing a conventional constant voltage circuit.

FIG. 5 is a sectional view showing a semiconductor manufacturing process.

FIG. 6 is a plan view of a transistor showing an influence of a semiconductor manufacturing process.

[Explanation of symbols]

 101 Constant Current Source 102 N-Channel Transistor 103 P-Channel Transistor 104 N-Channel Transistor 105 N-Channel Transistor 106 Op Amp 107 Gate Capacitance 108 P-Channel Transistor 109 N-Channel Transistor 110 Drain Resistor 111 Drain Capacitance 112 Crystal Oscillator 113 Oscillator 114 Divider 201 P-channel transistor 202 Constant current source 203 P-channel transistor 204 P-channel transistor 205 P-channel transistor 206 N-channel transistor 207 N-channel transistor 208 Capacitor 209 N-channel transistor 401 Constant current source 402 N-channel transistor 403 P-channel transistor 404 N-channel Down channel transistor 405 operational amplifier 406 constant current source 407 N-channel transistor 408 N-channel transistor 409 oscillator 410 frequency divider 501 wafer 502 resist 503 ion-implanted layer 601 polysilicon 602 ion implanted layer

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location H01L 27/092 H03K 19/00 A H03B 5/36 H01L 27/08 321C H03K 19/00 H03K 19 / 094 B 19/0948

Claims (3)

[Claims] 1. A threshold value of a P-channel transistor and N
In a constant voltage circuit that outputs a sum of threshold values of channel transistors as a reference voltage, channel widths and channel lengths of P channel transistors and N channel transistors that determine a reference voltage value of the constant voltage circuit, and the constant voltage circuit. The channel width and the channel length of the P-channel transistor and the N-channel transistor, which form the amplifier of the CMOS inverter oscillation circuit using the output as a power source, have the same size for the P-channel transistors and for the N-channel transistors. Voltage circuit. 2. The constant voltage circuit according to claim 1, wherein a constant offset is added based on the reference voltage and output. 3. A threshold value of a P-channel transistor and N
In the constant voltage circuit that outputs the sum of the threshold values of the channel transistors as a reference voltage, the channel width and the channel length of the P channel transistor and the N channel transistor that determine the reference voltage value of the constant voltage circuit are the constant voltage circuit. The P-channel transistor and the N-channel transistor, which form an amplifier of the CMOS inverter oscillation circuit using the output as a power source, have the same channel width and channel length for the P-channel transistors and for the N-channel transistors, and the reference of the constant voltage circuit. The P-channel transistor and the N-channel transistor that determine the voltage value are the P-channel transistor and the N-channel transistor that form the amplifying portion of the CMOS inverter oscillation circuit using the output of the constant voltage circuit as a power source, the source and the drain. Constant voltage circuit the down direction, characterized in that arranged close to the same direction.