JPH09162290A - Semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent an upper wiring layer from sagging down in a connection hole region of large size. SOLUTION: A connection hole region 20 is composed of aggregate small square connection holes 22, the length S1 of the side of the small square hole 22 is twice or less as long as the thickness of the side film of an upper wiring 10. The length S1 may be 0.6μm or below when an aluminum high-temperature sputtered film of thickness 600nm is used as the upper wiring layer 10, and the length S1 may be 1.2μm or below when a blanket tungsten film of thickness 600nm is used as the upper wiring layer 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor having a multi-layer wiring and characterized by the structure of a contact hole or a through hole (collectively referred to as a connection hole) formed in an interlayer insulating film. The present invention relates to an integrated circuit device.

[0002]

2. Description of the Related Art Wiring in a semiconductor integrated circuit device having multi-layered wiring is such that an interlayer insulating film is formed on a lower layer wiring, a connection hole is opened in the interlayer insulating film, and the upper layer wiring is connected to the lower layer wiring through the connection hole. Connecting. There is no restriction on the pattern of the connection hole, and a large connection hole is formed in a large pattern such as a bonding pad pattern.

FIG. 1 shows this state, in which a lower layer wiring 4 is formed on a base substrate 2 and an interlayer insulating film 6 is formed thereon. A connection hole 8 is formed in the interlayer insulating film 6, and the upper layer wiring 10 is connected to the lower layer wiring 4 through the connection hole 8.
Connected to At this time, when the connection hole 8 is a large hole, a step a corresponding to the depth of the hole is generated in the upper wiring 10 between the portion on the interlayer insulating film 6 and the inner portion of the connection hole 8.

With respect to the thin film of the upper wiring 10, the film thickness at the side surface of the hole is t _{2 when} the film thickness at the flat portion is t ₁ , and the film thickness t ₂ is referred to as the side film thickness. The side film thickness t ₂ is about 50% of T ₁ for a high temperature sputtered film of aluminum or aluminum alloy which is usually used, and about 100% for a blanket tungsten film. Therefore, when the size of the connection hole 8 is larger than twice the side film thickness t ₂ , a drop of the depth a corresponding to the connection hole occurs in the upper layer wiring.

An insulating film 12 serving as an interlayer insulating film or a passivation film is further formed on the upper wiring 10, and a connecting hole or a hole for a bonding pad is formed in the insulating film 12. At this time, when the insulating film 12 is flattened and a connection hole or a hole for a bonding pad is formed above the connection hole 8, if there is a decrease in the depth a due to the connection hole 8, the film of the insulating film 12 is formed. The thickness is d _{1 in} the portion on the interlayer insulating film 6 and d _{2 in the} depressed portion, and a difference in the depth a of the depressed portion occurs. Therefore, in the etching for forming the connection hole and the bonding pad hole formed in the insulating film 12,
When the etching of the recessed part is taken as a reference, the etching in the shallower part becomes a great overetching,
Problems such as size expansion, damage, and rough surface (digging) occur.

Further, in the case of forming a contact hole in the interlayer insulating film on the aluminum wiring by dry etching using a fluorine-based gas, in order to prevent the contact resistance from increasing due to the formation of sputter deposits, the contact hole is prevented. It has been proposed to form an etching stopper layer made of a metal or a metal nitride, which forms a volatile fluorine compound when exposed to plasma of a gas containing fluorine, on the lower wiring layer prior to etching for forming the film. (JP-A-6-125
(See Japanese Patent Publication No. 010). However, the proposed method does not improve the variation in the film thickness of the insulating film as the upper layer due to the drop in the connection hole.

[0007]

SUMMARY OF THE INVENTION According to the present invention, it is possible to prevent the upper wiring layer from dropping in a large-sized contact hole region, and to prevent the size of the insulating film formed on the upper wiring from spreading and damaging the insulating film. The purpose is to prevent the occurrence of.

[0008]

According to the present invention, any of the connection holes formed in the interlayer insulating film provided between the lower wiring and the upper wiring for connecting the lower wiring and the upper wiring is from the side surface of the connection hole. It is formed in a pattern that is present at a distance equal to or shorter than the distance that can be embedded by the side film thickness of the upper wiring layer.

[0009]

Specifically, one connection hole region for a lower layer wiring and an upper layer wiring is composed of a set of square, rectangular or circular small connection holes. If the small connection hole is a square, the length of the side is, if the small connection hole is a rectangle, the length of the short side, and if the small connection hole is a circle, the diameter is that of the upper wiring layer. It is set to twice the side film thickness or less.

Since the interlayer insulating film is left in the inside of the connection hole between the lower layer wiring and the upper layer wiring in an island shape, the side film thickness of the upper layer wiring layer from the side surface of the connection hole in any portion of the connection hole. It may be present at the following distances.

For the purpose of prolonging the life of the semiconductor integrated circuit device and preventing the yield from decreasing, it has been proposed to configure one connection hole region between the lower layer wiring and the upper layer wiring with a plurality of connection holes. (See JP-A-63-204631). However, this proposal also does not improve the variation in the thickness of the insulating film on the connection hole portion due to the depression.

[0012]

EXAMPLE FIG. 2 shows patterns of some connection holes.
(A) is one connection hole area 20 (area surrounded by a chain line)
Shows an example constituted by a set of a plurality of square small connection holes 22. The size of the small connection hole 22 is not more than twice the side film thickness of the upper layer wiring on one side. (A) X-
A sectional view taken along the line X'is shown in FIG.

When the size of the small connection hole 22 is specifically shown,
When a high temperature sputtered film of aluminum or an aluminum alloy is used as the upper layer wiring 10, the side coverage is about 50%, so if the film thickness is 600 nm, one side S ₁ of the small connection hole 22 should be 0.6 μm or less. Good. Further, when a blanket tungsten film having a side coverage of about 100% is used as the upper layer wiring 10, if the film thickness is 600 nm, one side S ₁ of the small connection hole 22 is 1.
It may be 2 μm or less.

FIG. 3B shows an example in which the connection hole region 20 is composed of a set of three rectangular small connection holes 24. The size S ₂ of the short side of the small connection hole 24 is set like the one side S ₁ of the small connection hole 22. The pattern of the small connection holes is not limited to a rectangle and may be a circle. In that case, the diameter of the circular small connecting hole is one side S ₁ of the small connecting hole 22.
Is set as follows.

(C) is still another example, showing an example in which four island-shaped interlayer insulating films 28 are left in one connection hole 26. A region sandwiched by the outer interlayer insulating film 6 and the inner island-shaped interlayer insulating film 28 becomes a connection hole region, and the size x ₁ in the x direction and the size y _{1 in the} y direction are both the above-mentioned small connection holes 22. It is set like one side S ₁ .

[0016]

According to the present invention, the connection holes formed in the interlayer insulating film provided between the lower wiring and the upper wiring to connect the lower wiring and the upper wiring are not limited to the side surface of the connection hole and the side of the upper wiring layer. Since it is formed in a pattern that exists at a distance equal to or less than the film thickness, it is possible to prevent the upper layer wiring of the connection portion from dropping, and when etching the insulating film formed in the upper layer wiring shape, the size spread due to overetching or Defects such as damage can be suppressed. As a result, it is possible to reduce the resistance variation and contribute to the improvement of reliability.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a conventional connection hole portion.

2A to 2C are diagrams showing various connection hole patterns in Examples, and FIGS. 2A to 2C are plan views of respective examples;
(A) is sectional drawing in the XX 'line position of (A).

[Explanation of symbols]

 2 Base substrate 4 Lower layer wiring 6 Interlayer insulation film 10 Upper layer wiring 12 Insulation film 20 Connection hole region 22, 24 Small connection hole 26 Connection hole 28 Interlayer insulation film left in island form

Claims (5)

[Claims] 1. In a semiconductor integrated circuit device having multi-layer wiring, a connection hole formed in an interlayer insulating film provided between the lower wiring and the upper wiring to connect the lower wiring and the upper wiring is A semiconductor integrated circuit device, wherein the semiconductor integrated circuit device is formed in a pattern that is present at a distance equal to or less than a distance that can be embedded from a side surface with a side film thickness of an upper wiring layer. 2. One connection hole region of the lower layer wiring and the upper layer wiring is composed of a set of a plurality of square small connection holes, and the side length of each small connection hole is twice the side film thickness of the upper layer wiring layer. The semiconductor integrated circuit device according to claim 1, which is set as follows. 3. One connection hole region for the lower layer wiring and the upper layer wiring is composed of a set of a plurality of rectangular small connection holes, and the length of the short side of each small connection hole is equal to the side film thickness of the upper layer wiring layer. The semiconductor integrated circuit device according to claim 1, wherein the number is set to be equal to or less than twice. 4. One connection hole region for a lower layer wiring and an upper layer wiring is composed of a set of a plurality of circular small connection holes, and the diameter of each small connection hole is twice the side film thickness of the upper layer wiring layer. The semiconductor integrated circuit device according to claim 1, which is set as follows. 5. The semiconductor integrated circuit device according to claim 1, wherein the interlayer insulating film is left in an island shape inside the connection hole between the lower layer wiring and the upper layer wiring.