JPH09148370A - Semiconductor element mounting structure - Google Patents

Semiconductor element mounting structure

Info

Publication number
JPH09148370A
JPH09148370A JP30866095A JP30866095A JPH09148370A JP H09148370 A JPH09148370 A JP H09148370A JP 30866095 A JP30866095 A JP 30866095A JP 30866095 A JP30866095 A JP 30866095A JP H09148370 A JPH09148370 A JP H09148370A
Authority
JP
Japan
Prior art keywords
electrodes
semiconductor element
electrode
protective layer
conductive adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP30866095A
Other languages
Japanese (ja)
Inventor
Toshimitsu Yamashita
俊光 山下
Yasuo Iguchi
泰男 井口
Susumu Ozawa
進 小澤
Yuuko Kitayama
憂子 北山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP30866095A priority Critical patent/JPH09148370A/en
Publication of JPH09148370A publication Critical patent/JPH09148370A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

Landscapes

  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To protect the surface of an IC against a pressing force of conductive grains in an anisotropic conductive adhesive agent by forming a protective layer round electrodes of a semiconductor element electrically isolated from the electrodes and connecting these electrodes with those of a substrate by said adhesive agent. SOLUTION: Electrodes 12 are formed on a semiconductor element 11 and protective layer 13 are formed round and electrically isolated from the electrodes 12 connected to electrodes 2 of a substrate 1 by an anisotropically conductive adhesive agent 3. For example, Al electrodes 12 are formed on the IC 11, protective layer 13 made from the same conductor film as the electrode 12 is formed round and electrically isolated from the electrodes 12, and passivation film 14 is formed thereon. In case the layer 13 uses the conductor film, the electrically isolated region 15 is 1.5 times or more as wide as the grain size of conductive grains 3b composing the adhesive agent 3.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、異方導電性接着剤
を用いた半導体素子の実装構造に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor element mounting structure using an anisotropic conductive adhesive.

【0002】[0002]

【従来の技術】従来、このような分野の技術としては、
参考文献 「異方導電性樹脂を用いたCOG実装」、電
子情報通信学会技術研究報告 CPM91−77、p
p.19〜22、1991年に開示されるものがあっ
た。図3はかかる従来の半導体素子の実装構造を示す断
面図、図4はその半導体素子の実装工程断面図である。
2. Description of the Related Art Conventionally, techniques in such a field include:
Reference "COG mounting using anisotropic conductive resin", IEICE technical report CPM91-77, p.
p. Some were disclosed in 19-22 and 1991. FIG. 3 is a sectional view showing such a conventional semiconductor element mounting structure, and FIG. 4 is a sectional view of the semiconductor element mounting process.

【0003】図3において、21は基板、22はその基
板に形成された電極である。23は異方導電性接着剤で
あり、接着用の絶縁性樹脂23a、導電性粒子23bに
より構成されている。24はICであり、Auバンプ形
状の電極25が形成されている。この実装構造では異方
導電性接着剤23の絶縁性樹脂23aに分散された導電
性粒子23bを介して、基板21の電極22とIC24
の電極25が電気的に連続され、また、異方導電性接着
剤23の絶縁性樹脂23aにより、IC24を基板21
に接着し、電極22,25間の導電性粒子23bに応力
を加えて先の電気的接続を得るようになっている。
In FIG. 3, reference numeral 21 is a substrate, and 22 is an electrode formed on the substrate. An anisotropic conductive adhesive 23 is composed of an insulating resin 23a for adhesion and conductive particles 23b. Reference numeral 24 denotes an IC, on which an Au bump-shaped electrode 25 is formed. In this mounting structure, the electrodes 22 of the substrate 21 and the IC 24 are connected through the conductive particles 23b dispersed in the insulating resin 23a of the anisotropic conductive adhesive 23.
Of the electrode 25 are electrically connected to each other, and the insulating resin 23a of the anisotropic conductive adhesive 23 is used to connect the IC 24 to the substrate 21.
And the conductive particles 23b between the electrodes 22 and 25 are stressed to obtain the above electrical connection.

【0004】以下、その半導体素子の実装工程を図4を
参照しながら説明する。 (1)まず、図4(a)に示すように、基板21上に電
極22を形成する。 (2)次に、図4(b)に示すように、半導体素子とし
てのIC(集積回路装置)の搭載領域に、異方導電性接
着剤23を配置する。 (3)次に、図4(c)に示すように、電極25が形成
されたIC24を用意し、そのIC24の電極25と基
板21の電極22の位置合せを行う。
The process of mounting the semiconductor element will be described below with reference to FIG. (1) First, as shown in FIG. 4A, the electrode 22 is formed on the substrate 21. (2) Next, as shown in FIG. 4B, the anisotropic conductive adhesive 23 is placed in the mounting area of the IC (integrated circuit device) as the semiconductor element. (3) Next, as shown in FIG. 4C, an IC 24 having an electrode 25 is prepared, and the electrode 25 of the IC 24 and the electrode 22 of the substrate 21 are aligned with each other.

【0005】(4)次に、図4(d)に示すように、I
C24に荷重を加えて、基板21に押圧して異方導電性
接着23を加熱もしくは光などの手段で、異方導電性接
着剤23を構成する絶縁性樹脂を硬化させる。このよう
に簡単な方法により、IC24を基板21上に実装する
ことができる。
(4) Next, as shown in FIG.
A load is applied to C24 to press it against the substrate 21 to heat the anisotropic conductive adhesive 23 or cure the insulating resin forming the anisotropic conductive adhesive 23 by means such as light. As described above, the IC 24 can be mounted on the substrate 21 by a simple method.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、上記し
た従来の半導体素子の実装工程では、(4)工程におい
て、IC24に荷重を加えることになる。この荷重によ
り、図示していないIC24の表面部に形成されている
回路部の損傷を避けるために、IC24の電極25は導
電性粒子23bの粒子径よりも厚いAuバンプ形状とし
て、導電性粒子23bがIC24の表面を押圧しないよ
うにしている。
However, in the conventional semiconductor element mounting process described above, a load is applied to the IC 24 in the process (4). In order to avoid damage to the circuit portion formed on the surface portion of the IC 24 (not shown) due to this load, the electrode 25 of the IC 24 is formed into an Au bump shape thicker than the particle diameter of the conductive particles 23b. Does not press the surface of the IC 24.

【0007】このように、従来の異方性接着剤による半
導体素子実装では、導電性粒子によるIC表面の損傷を
避けるために、IC電極としてAuバンプ電極を形成し
なければならず、Auバンプ電極の形成工程のために、
ICの価格が高くなるなるという問題点があった。本発
明は、上記問題点を除去し、ICの表面を異方導電性接
着剤の導電性粒子による押圧から保護し得る半導体素子
の実装構造を提供することを目的とするものである。
As described above, in the conventional semiconductor element mounting using the anisotropic adhesive, the Au bump electrode must be formed as the IC electrode in order to avoid the damage on the IC surface due to the conductive particles. For the formation process of
There is a problem that the price of IC becomes high. SUMMARY OF THE INVENTION It is an object of the present invention to eliminate the above problems and provide a semiconductor element mounting structure capable of protecting the surface of an IC from being pressed by conductive particles of an anisotropic conductive adhesive.

【0008】[0008]

【課題を解決するための手段】本発明は、上記目的を達
成するために、 (1)異方導電性接着剤を用いた半導体素子の実装構造
において、半導体素子に形成される電極と、この電極の
周囲に前記電極と電気的に分離された保護層とを形成
し、前記半導体素子の電極と基板の電極間を異方導電性
接着剤により接続するようにしたものである。
In order to achieve the above object, the present invention provides: (1) In a semiconductor element mounting structure using an anisotropic conductive adhesive, an electrode formed on the semiconductor element, and A protective layer electrically separated from the electrode is formed around the electrode, and the electrode of the semiconductor element and the electrode of the substrate are connected by an anisotropic conductive adhesive.

【0009】したがって、ICの表面を異方導電性接着
剤の導電性粒子による押圧から保護することができる。 (2)上記(1)記載の半導体素子の実装構造におい
て、前記電極及び前記保護層をAl導体膜となし、電気
的分離領域の幅を異方導電性接着剤に含まれる導電性粒
子の径の1.5倍以上とするようにしたものである。
Therefore, the surface of the IC can be protected from being pressed by the conductive particles of the anisotropic conductive adhesive. (2) In the mounting structure for a semiconductor element according to (1) above, the electrodes and the protective layer are made of an Al conductor film, and the width of the electrical isolation region is the diameter of the conductive particles contained in the anisotropic conductive adhesive. 1.5 times or more.

【0010】したがって、ICを高騰させるAuバンプ
電極を用いることなく、異方導電性接着剤により基板上
にICを簡易な工程で実装することが可能となり、極め
て安価な半導体素子の実装が可能となる。また、半導体
素子の保護層にAlを用いるようにしたので、Al自体
が導電性粒子の押圧に対して塑性変形を起こし、導電性
粒子の応力を分散させることができる。
Therefore, it becomes possible to mount the IC on the substrate by the anisotropic conductive adhesive in a simple process without using Au bump electrodes that raise the price of the IC, and it is possible to mount an extremely inexpensive semiconductor element. Become. Further, since Al is used for the protective layer of the semiconductor element, Al itself causes plastic deformation due to the pressing of the conductive particles, and the stress of the conductive particles can be dispersed.

【0011】更に、半導体素子の電極と保護層を同じ導
電性の材料で、同一工程で形成することができので、よ
り一層のコストの低減を図ることができる。
Further, the electrodes of the semiconductor element and the protective layer can be formed of the same conductive material in the same step, so that the cost can be further reduced.

【0012】[0012]

【発明の実施の形態】本発明の実施の形態について図を
参照しながら説明する。図1は本発明の実施を示す異方
導電性接着剤を用いた半導体素子の実装構造を示す断面
図、図2はその半導体素子の実装工程断面図である。図
1において、1は基板、2はその基板の電極、3は異方
導電性接着剤で、接着用の絶縁性樹脂3a、導電性粒子
3bにより構成されており、これらは、図3に示した従
来のものと同様である。また、ここで用いるIC11に
はAl電極12が形成されており、また、このAl電極
12の周囲には電気的に分離されたAl電極と同一の導
体膜で形成された保護層13が形成されており、さらに
この上にはパッシベーション膜14が形成されている。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing a mounting structure of a semiconductor element using an anisotropic conductive adhesive showing an embodiment of the present invention, and FIG. 2 is a sectional view of a mounting step of the semiconductor element. In FIG. 1, 1 is a substrate, 2 is an electrode of the substrate, 3 is an anisotropic conductive adhesive, and is composed of an insulating resin 3a for adhesion and conductive particles 3b. These are shown in FIG. It is similar to the conventional one. Further, an Al electrode 12 is formed on the IC 11 used here, and a protective layer 13 formed of the same conductive film as the electrically separated Al electrode is formed around the Al electrode 12. Further, a passivation film 14 is formed on this.

【0013】保護層13にAlを用いたのは、Al自体
が導電性粒子3bの押圧に対して塑性変形を起こし、導
電性粒子3bの応力を分散させる効果を持たせるためで
ある。保護層の材料としては、前述の効果を有するもの
であれば、Alに限定されるものではない。また、導電
性粒子3bの押圧に対して、変形を生じない膜構造であ
れば、保護層13として使用が可能であり、さらに前述
の要件を満たしていれば、導体もしくは絶縁体の区別は
ない。導体であれば、保護層13を接地電極、シールド
等として利用することも可能であり、絶縁体であれば、
前述のAl電極12との電気的分離が不要になり、それ
ぞれの特徴を生かすことができる。ただし、導電性粒子
3bがAl電極12を十分押圧できるように、保護層1
3の面の位置は、IC11の電極12の面と同程度もし
くは突出しないようにすることが望ましい。
The reason why Al is used for the protective layer 13 is that Al itself has a plastic deformation due to the pressing of the conductive particles 3b, and has the effect of dispersing the stress of the conductive particles 3b. The material of the protective layer is not limited to Al as long as it has the above-mentioned effects. Further, as long as it has a film structure that does not deform when pressed by the conductive particles 3b, it can be used as the protective layer 13, and if the above-mentioned requirements are satisfied, there is no distinction between a conductor and an insulator. . If it is a conductor, it is possible to use the protective layer 13 as a ground electrode, a shield, etc., and if it is an insulator,
The electrical separation from the Al electrode 12 described above is not necessary, and each feature can be utilized. However, so that the conductive particles 3b can sufficiently press the Al electrode 12, the protective layer 1
It is desirable that the position of the surface of No. 3 is approximately the same as the surface of the electrode 12 of the IC 11 or does not protrude.

【0014】また、前記の導体膜を保護層13に使用し
た場合、電気的に分離するための分離領域15の幅は、
異方導電性接着剤3を構成する導電性粒子3bの粒子径
よりも広く形成し、導電性粒子3bによる電気的短絡を
防止する必要がある。しかし、この分離領域15には導
電性粒子3bにより押圧される可能性があるために、こ
の分離領域15にICの回路を構成する素子を配置する
ことは避けることが望ましい。このためIC11の集積
度の観点から、分離領域15の幅を広くすることは得策
ではない。
When the conductor film is used as the protective layer 13, the width of the isolation region 15 for electrical isolation is
It is necessary to form the particle size larger than the particle diameter of the conductive particles 3b forming the anisotropic conductive adhesive 3 to prevent an electrical short circuit due to the conductive particles 3b. However, since there is a possibility that the conductive particles 3b may press the separation region 15, it is desirable to avoid disposing an element forming a circuit of the IC in the separation region 15. Therefore, it is not a good idea to widen the width of the isolation region 15 from the viewpoint of the degree of integration of the IC 11.

【0015】この結果、分離領域15の幅は導電性粒子
3bの径にもよるが粒子径の約1.5倍以上が望まし
い。このように構成したので、IC11の表面に形成さ
れた回路領域を保護層13で保護できるために、Auバ
ンプ電極を用いずにAl電極の状態でも、異方導電性接
着剤3により、基板1上にIC11を簡易な工程で実装
することが可能となる。
As a result, the width of the separation region 15 is preferably about 1.5 times or more the particle diameter, although it depends on the diameter of the conductive particles 3b. With this configuration, the circuit region formed on the surface of the IC 11 can be protected by the protective layer 13. Therefore, even if the Al electrode is used without using the Au bump electrode, the anisotropic conductive adhesive 3 can be used to form the substrate 1. It becomes possible to mount the IC 11 on the upper part by a simple process.

【0016】以下、本発明の半導体素子の実装工程を図
2を参照しながら説明する。 (1)まず、図2(a)に示すように、基板1上に電極
2を形成する。 (2)次に、図2(b)に示すように、半導体素子とし
てのIC(集積回路装置)の搭載領域に、異方導電性接
着剤3を配置する。 (3)次に、図2(c)に示すように、電極12、保護
層13、パッシベーション膜14が形成されたIC11
を用意し、そのIC11の電極12と、基板1の電極2
の位置合せを行う。
The steps of mounting the semiconductor device of the present invention will be described below with reference to FIG. (1) First, as shown in FIG. 2A, the electrode 2 is formed on the substrate 1. (2) Next, as shown in FIG. 2B, the anisotropic conductive adhesive 3 is placed in the mounting area of an IC (integrated circuit device) as a semiconductor element. (3) Next, as shown in FIG. 2C, the IC 11 on which the electrode 12, the protective layer 13, and the passivation film 14 are formed.
The electrode 12 of the IC 11 and the electrode 2 of the substrate 1
Align.

【0017】(4)次に、図2(d)に示すように、I
C11に荷重を加えて、基板1に押圧して、加熱もしく
は光などの手段で、異方導電性接着剤3を構成する絶縁
性樹脂を硬化させる。 (5)他の実装工程は従来と同一の方法で行うことが可
能である。なお、本発明は上記実施例に限定されるもの
ではなく、本発明の趣旨に基づいて種々の変形が可能で
あり、これらを本発明の範囲から排除するものではな
い。
(4) Next, as shown in FIG.
A load is applied to C11 and pressed against the substrate 1, and the insulating resin forming the anisotropic conductive adhesive 3 is cured by means such as heating or light. (5) Other mounting steps can be performed by the same method as the conventional method. It should be noted that the present invention is not limited to the above embodiment, and various modifications can be made based on the gist of the present invention, and these are not excluded from the scope of the present invention.

【0018】[0018]

【発明の効果】以上のように、詳細に説明したように、
本発明によれば、次のような効果を奏することができ
る。 (1)請求項1記載の発明によれば、ICの表面を異方
導電性接着剤の導電性粒子による押圧から保護すること
ができる。
As described above in detail,
According to the present invention, the following effects can be achieved. (1) According to the invention described in claim 1, the surface of the IC can be protected from being pressed by the conductive particles of the anisotropic conductive adhesive.

【0019】(2)請求項2記載の発明によれば、IC
を高騰させるAuバンプ電極を用いることなく、異方導
電性接着剤により基板上にICを簡易な工程で実装する
ことが可能となり、極めて安価な半導体素子の実装が可
能となる。また、半導体素子の保護層にAlを用いるよ
うにしたので、Al自体が導電性粒子の押圧に対して塑
性変形を起こし、導電性粒子の応力を分散させることが
できる。
(2) According to the invention of claim 2, an IC
It is possible to mount an IC on a substrate by a simple process using an anisotropic conductive adhesive without using an Au bump electrode that raises the temperature, and it is possible to mount an extremely inexpensive semiconductor element. Further, since Al is used for the protective layer of the semiconductor element, Al itself causes plastic deformation due to the pressing of the conductive particles, and the stress of the conductive particles can be dispersed.

【0020】更に、半導体素子の電極と保護層を同じ導
電性の材料で、同一工程で形成することができるので、
より一層のコストの低減を図ることができる。
Furthermore, since the electrodes of the semiconductor element and the protective layer can be formed of the same conductive material in the same step,
Further cost reduction can be achieved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例の異方導電性接着剤を用いた半
導体素子の実装構造を示す断面図である。
FIG. 1 is a cross-sectional view showing a mounting structure of a semiconductor element using an anisotropic conductive adhesive according to an embodiment of the present invention.

【図2】本発明の実施例を示す半導体素子の実装工程断
面図である。
FIG. 2 is a sectional view of a semiconductor element mounting process showing an embodiment of the present invention.

【図3】従来の異方導電性接着剤を用いた半導体素子の
実装構造を示す断面図である。
FIG. 3 is a sectional view showing a mounting structure of a semiconductor element using a conventional anisotropic conductive adhesive.

【図4】従来の半導体素子の実装工程断面図である。FIG. 4 is a sectional view of a conventional semiconductor element mounting process.

【符号の説明】[Explanation of symbols]

1 基板 2 基板の電極 3 異方導電性接着剤 3a 接着用の絶縁性樹脂 3b 導電性粒子 11 IC(集積回路装置:半導体素子) 12 Al電極 13 保護層 14 パッシベーション膜 15 分離領域 DESCRIPTION OF SYMBOLS 1 substrate 2 substrate electrode 3 anisotropic conductive adhesive 3a insulating resin for adhesion 3b conductive particles 11 IC (integrated circuit device: semiconductor element) 12 Al electrode 13 protective layer 14 passivation film 15 isolation region

フロントページの続き (72)発明者 北山 憂子 東京都港区虎ノ門1丁目7番12号 沖電気 工業株式会社内Front page continued (72) Inventor Yuko Kitayama 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 異方導電性接着剤を用いた半導体素子の
実装構造において、(a)半導体素子に形成される電極
と、(b)該電極の周囲に前記電極と電気的に分離され
た保護層とを形成し、(c)前記半導体素子の電極と基
板の電極間を異方導電性接着剤により接続することを特
徴とする半導体素子の実装構造。
1. In a mounting structure of a semiconductor element using an anisotropic conductive adhesive, (a) an electrode formed on the semiconductor element and (b) the electrode is electrically separated from the electrode around the electrode. A mounting structure for a semiconductor device, comprising: forming a protective layer; and (c) connecting the electrodes of the semiconductor device and the electrodes of the substrate with an anisotropic conductive adhesive.
【請求項2】 請求項1記載の半導体素子の実装構造に
おいて、前記電極及び前記保護層をAl導体膜となし、
電気的分離領域の幅を異方導電性接着剤に含まれる導電
性粒子の径の1.5倍以上とすることを特徴とする半導
体素子の実装構造。
2. The mounting structure for a semiconductor element according to claim 1, wherein the electrodes and the protective layer are Al conductor films,
A mounting structure for a semiconductor device, wherein the width of the electrically isolated region is 1.5 times or more the diameter of the conductive particles contained in the anisotropic conductive adhesive.
JP30866095A 1995-11-28 1995-11-28 Semiconductor element mounting structure Withdrawn JPH09148370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30866095A JPH09148370A (en) 1995-11-28 1995-11-28 Semiconductor element mounting structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30866095A JPH09148370A (en) 1995-11-28 1995-11-28 Semiconductor element mounting structure

Publications (1)

Publication Number Publication Date
JPH09148370A true JPH09148370A (en) 1997-06-06

Family

ID=17983758

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30866095A Withdrawn JPH09148370A (en) 1995-11-28 1995-11-28 Semiconductor element mounting structure

Country Status (1)

Country Link
JP (1) JPH09148370A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013125695A1 (en) * 2012-02-23 2013-08-29 シャープ株式会社 Electronic component and method for manufacturing same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013125695A1 (en) * 2012-02-23 2013-08-29 シャープ株式会社 Electronic component and method for manufacturing same

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