JPH09121011A - Resin-sealed semiconductor device and manufacture thereof - Google Patents

Resin-sealed semiconductor device and manufacture thereof

Info

Publication number
JPH09121011A
JPH09121011A JP24447696A JP24447696A JPH09121011A JP H09121011 A JPH09121011 A JP H09121011A JP 24447696 A JP24447696 A JP 24447696A JP 24447696 A JP24447696 A JP 24447696A JP H09121011 A JPH09121011 A JP H09121011A
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
mount
sealed
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24447696A
Other languages
Japanese (ja)
Other versions
JP3019000B2 (en
Inventor
Mitsuo Furuhata
光男 降籏
Kenji Motai
建志 甕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP24447696A priority Critical patent/JP3019000B2/en
Publication of JPH09121011A publication Critical patent/JPH09121011A/en
Application granted granted Critical
Publication of JP3019000B2 publication Critical patent/JP3019000B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To enable economical small-scale production by maintaining the quality of a small surface-mount type semiconductor device, by utilizing a manufacturing process of a semiconductor device which has an external radiation portion and an external lead portion and in which a metal substrate as a mounting portion is exposed on the back side. SOLUTION: In this device, a semiconductor chip 8 is mounted and resin- sealed on a lead frame 1 which includes a mounting portion 4, an external radiation portion 3 with a mounting hole 5 on one side of the mounting portion, and an external lead 6 on the other side. A metal substrate of the mounting portion 4 is exposed to the back side of a resin-sealed portion 10. In this case, a portion 2 having a small cross section which is half the size of the cross section of the external radiation portion 3 is provided between the resin-sealed portion of the external radiation portion 3 and the mounting hole 5.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】この発明は、外形が例えばT
O−220形のような半導体装置及びその製造方法と前
記半導体装置のための製造工程を利用する、小形な表面
実装形樹脂封止形半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a semiconductor device such as an O-220 type, a method for manufacturing the same, and a small surface mount resin-sealed semiconductor device utilizing the manufacturing process for the semiconductor device.

【0002】[0002]

【従来の技術】リードフレームを用い、そのマウント部
に半導体チップを実装し、樹脂封止を施した後に分離す
る製造方法は全組立工程の自動化が可能である。この製
造方法のおよその工程は半導体チップの製造と平行する
リードフレームの製造、リードフレームの各マウント部
に半導体チップの固着(ダイボンデイング工程)、半導
体チップと外部リードとのワイヤによる接続(ワイヤボ
ンデイング工程)、半導体チップ等の表面処理、トラン
スフアモールド等による樹脂封止、リードフレームの連
結部分離等からなり、さらにその後に試験・捺印・梱包
・出荷をする。
2. Description of the Related Art A manufacturing method in which a semiconductor chip is mounted on a mount portion of a lead frame, which is sealed with a resin and then separated, enables automation of all assembling steps. Approximate steps of this manufacturing method are the manufacturing of a lead frame parallel to the manufacturing of a semiconductor chip, the fixing of the semiconductor chip to each mount part of the lead frame (die bonding step), and the connection between the semiconductor chip and an external lead by a wire (wire bonding) Process), surface treatment of semiconductor chips, resin encapsulation by transfer molding, separation of connecting parts of lead frame, etc., and then testing, marking, packing and shipping.

【0003】前記製造方法は、低原価で多量生産をする
ことができるが、反面、各工程のための製造設備、治工
具類は高価であるばかりでなく工程の変更に長時間を要
し、場合によってはほとんど無人運転で1日24時間操
業する場合には操業率の低下が大きい。
Although the above-mentioned manufacturing method enables mass production at low cost, on the other hand, not only the manufacturing equipment and jigs and tools for each process are expensive, but also it takes a long time to change the process. In some cases, the operation rate is greatly reduced when operating 24 hours a day in almost unattended operation.

【0004】[0004]

【発明が解決しようとする課題】前記の従来の技術にお
いて前記自動化された製造工程によってTO−220形
半導体装置又は表面実装形半導体装置を生産する場合が
ある。そして両者は外部放熱部の有無及び外部リードの
形状のみが異なるが、マウント部、半導体チップ、樹脂
封止部の形状が同一であるような場合でも、前記自動化
された製造工程を個別に計画し、治工具類を変え、製造
設備の再調整を行わなければならない。
There is a case where a TO-220 type semiconductor device or a surface mount type semiconductor device is produced by the automated manufacturing process in the above conventional technique. Although the two differ only in the presence or absence of the external heat dissipation part and the shape of the external lead, even if the mount part, the semiconductor chip, and the resin encapsulation part have the same shape, the automated manufacturing process is individually planned. , The jigs and tools must be changed and the manufacturing equipment must be readjusted.

【0005】前記両者をそれぞれ多量生産する時には良
いが、表面実装形半導体装置の生産量が少ない場合は極
めて生産性が悪い。そこで、自動化製造工程で製造した
例えばTO−220形半導体装置の外部放熱部をカツタ
等で切断して表面実装形に改造することもあるが、切断
時の応力が半導体チップに及び、樹脂との密着度も低下
する等の問題がある。
It is good when both of them are mass-produced, but the productivity is extremely poor when the amount of surface-mounted semiconductor devices is small. Therefore, for example, the external heat dissipation part of a TO-220 type semiconductor device manufactured by an automated manufacturing process may be cut with a cutter or the like to be modified into a surface mount type. There is a problem such as a decrease in adhesion.

【0006】この発明の目的は、例えば樹脂封止形半導
体装置であって、外部放熱部と外部リード部とを備え、
さらにマウント部である金属基板が裏面において露出す
るような半導体装置の製造工程を活用して、小形な表面
実装形半導体装置を品質を維持して経済的に少量生産可
能な樹脂封止形半導体装置およびその製造方法を得るこ
とにある。
An object of the present invention is, for example, a resin-sealed semiconductor device, which is provided with an external heat dissipation portion and an external lead portion,
Furthermore, by utilizing the manufacturing process of a semiconductor device in which the metal substrate, which is the mount part, is exposed on the back surface, it is possible to economically produce small quantities of small surface mount type semiconductor devices while maintaining the quality, and resin-sealed semiconductor devices. And to obtain its manufacturing method.

【0007】[0007]

【課題を解決するための手段】この発明の樹脂封止形半
導体装置は、マウント部と、その一方の取付穴付きの外
部放熱部と、他方の外部リードとを備えたリードフレー
ムに半導体チップを実装して樹脂封止を施し、この樹脂
封止部の裏面に前記マウント部の金属基板を露出させる
樹脂封止形半導体装置において、前記外部放熱部の樹脂
封止される部分と取付穴との間に前記外部放熱部の断面
部分の幅より小さい連結部分を有するものとし、特に、
前記連結部分が前記半導体チップの実装位置の前記外部
放熱部方向の延長線上に無いことが有効である。製造方
法としては、マウント部と、その一方の取付穴付きの外
部放熱部と、他方の外部リードとを備えたリードフレー
ムに半導体チップを実装して樹脂封止を施し、この樹脂
封止部の裏面に前記マウント部の金属基板を露出させる
樹脂封止形半導体装置の製造方法において、前記半導体
チップを実装する前に、前記外部放熱部の樹脂封止され
る部分と取付穴との間に前記外部放熱部の断面部分の幅
より小さい連結部分を設けるものである。この製造方法
により形成された半導体装置を加工することにより、マ
ウント部と、それより厚さの薄い外部リードとを備えた
リードフレームのマウント部に半導体チップを実装して
マウント部の裏面の金属基板を露出させて樹脂封止を施
した半導体装置において外部リード部の先端が前記マウ
ント部の裏面延長上にあるものとする。
According to another aspect of the present invention, there is provided a resin-encapsulated semiconductor device, wherein a semiconductor chip is mounted on a lead frame having a mount portion, an external heat radiation portion having a mounting hole on one side, and an external lead on the other side. In a resin-sealed semiconductor device that is mounted and resin-sealed, and the metal substrate of the mount portion is exposed on the back surface of the resin-sealed portion, a resin-sealed portion of the external heat dissipation portion and a mounting hole A connecting portion smaller than the width of the cross-sectional portion of the external heat radiating portion is provided between the
It is effective that the connecting portion is not on the extension line of the mounting position of the semiconductor chip toward the external heat dissipation portion. As a manufacturing method, a semiconductor chip is mounted on a lead frame including a mount portion, an external heat radiation portion with one mounting hole thereof, and the other external lead, and resin sealing is performed. In a method of manufacturing a resin-sealed semiconductor device in which a metal substrate of the mount section is exposed on the back surface, before mounting the semiconductor chip, the external heat radiation section is provided between the resin-sealed section and a mounting hole. A connecting portion is provided that is smaller than the width of the cross-sectional portion of the external heat dissipation portion. By processing the semiconductor device formed by this manufacturing method, the semiconductor chip is mounted on the mount portion of the lead frame including the mount portion and the external leads having a smaller thickness, and the metal substrate on the back surface of the mount portion is mounted. It is assumed that the tip of the external lead section is on the extension of the back surface of the mount section in the semiconductor device in which the above is exposed and the resin is sealed.

【0008】[0008]

【発明の実施の形態】図1はこの発明の製造方法に係る
実施例の工程図、図2は小形な表面実装形半導体装置の
断面図、図3は図1の(b)に相当する異なる実施例の
半導体装置の平面図である。図1に示した実施例の工程
も、前記〔従来の技術〕の項で説明した工程を持つ。す
なわち半導体チップの製造と並列するリードフレームの
製造、リードフレームの各マウント部に半導体チップの
固着(ダイボンデイング工程)、半導体チップと外部リ
ードとのワイヤによる接続(ワイヤボンデイング工
程)、半導体チップ等の表面処理、トランスフアーモー
ルド等による樹脂封止、リードフレームの連結部分離等
からなる。
1 is a process diagram of an embodiment of a manufacturing method of the present invention, FIG. 2 is a sectional view of a small surface mount type semiconductor device, and FIG. 3 is different from FIG. 1 (b). It is a top view of a semiconductor device of an example. The process of the embodiment shown in FIG. 1 also has the process described in the above [Prior Art]. That is, manufacturing of a lead frame in parallel with manufacturing of a semiconductor chip, fixing of a semiconductor chip to each mount portion of the lead frame (die bonding step), connection of a semiconductor chip with an external lead by a wire (wire bonding step), semiconductor chip, etc. It consists of surface treatment, resin encapsulation by transfer molding, etc., separation of connecting parts of lead frame.

【0009】しかし、図1の(a)ワイヤボンデイング
工程の図にも表れているように、ここで用いられるリー
ドフレーム1はリードフレームの製造工程で予めTO−
220の形用リードフレームに長穴2aが外部放熱部3
に設けられ、連結部分2を備えている。長穴2aはリー
ドフレームの全形と同時に打ち抜いてもよいし、TO−
220形リードフレームに長穴2aのみをパンチ加工し
てもよい。
However, as shown in FIG. 1 (a), which is a view of the wire bonding process, the lead frame 1 used here is TO-made in advance in the lead frame manufacturing process.
The lead frame for the shape of 220 has the long hole 2a with the external heat dissipation portion 3
And is provided with a connecting portion 2. The long hole 2a may be punched at the same time as the entire lead frame, or the TO-
Only the elongated hole 2a may be punched in the 220-type lead frame.

【0010】連結部分2と長穴2aとを除くほかは従来
と同一であって、リードフレーム1はマウント部4と取
付穴5を設けた外部放熱部3と外部リード6a、6bと
を備え、これらの単位のものは連結部7a、7b、7c
で連結されてリードフレーム1形成されている。(a)
ワイヤボンデイング工程の図で示すようにマウント部4
に半導体チップ8をダイボンデイングしたものにワイヤ
9が接続される。
The lead frame 1 is the same as the conventional one except that the connecting portion 2 and the elongated hole 2a are omitted. The lead frame 1 is provided with a mount portion 4 and an external heat radiating portion 3 having mounting holes 5, and external leads 6a and 6b. These units have connecting portions 7a, 7b, 7c
To form a lead frame 1. (A)
Mount part 4 as shown in the wire bonding process diagram
Wires 9 are connected to the semiconductor chip 8 die-bonded to the.

【0011】図1(b)は本願発明の一実施例の樹脂封
止形半導体装置の平面図であり、図1(a)の工程に続
きトランスフアモールドにより樹脂封止を施し、各半導
体素子ごとに連結部7a〜7cで分離を行った工程を示
す。このTO−220形の半導体装置はこの後試験工程
に入る。図1(c)は、図1(b)の半導体装置を改造
して小形な表面実装形半導体装置とする切断工程を示す
平面図である。
FIG. 1B is a plan view of a resin-sealed semiconductor device according to an embodiment of the present invention. Following the step of FIG. 1A, resin molding is performed by transfer molding, and each semiconductor element is manufactured. The process which isolate | separated in each connection part 7a-7c is shown. This TO-220 type semiconductor device then enters a test process. FIG. 1C is a plan view showing a cutting step of modifying the semiconductor device of FIG. 1B into a small surface mount semiconductor device.

【0012】この工程図1(c)では、長穴2aのある
連結部分2が切断線11で切断され、取付穴5を設けた
外部放熱部3の大部分はなくなり、残余部分3aのみと
なる。同時に又は前後して外部リード6a、6bの折り
曲げ、切断等の加工がなされ外部リード6xとなる。図
2は図1の(c)の切断工程後の断面を示し、樹脂封止
部10の裏面にマウント部4が露出し、その面の延長上
に加工された外部リード6xが達している。
In this process diagram 1 (c), the connecting portion 2 having the elongated hole 2a is cut along the cutting line 11, and most of the external heat radiating portion 3 provided with the mounting hole 5 disappears, leaving only the remaining portion 3a. . At the same time or before or after, the outer leads 6a and 6b are processed by bending, cutting, etc. to become the outer leads 6x. FIG. 2 shows a cross section after the cutting step of FIG. 1C, in which the mount portion 4 is exposed on the back surface of the resin sealing portion 10, and the processed external lead 6x reaches the extension of that surface.

【0013】図3は連結部分2を一対の切欠け2bで形
成する態様を示す。
FIG. 3 shows a mode in which the connecting portion 2 is formed by a pair of notches 2b.

【0014】[0014]

【発明の効果】この発明は、マウント部とその一方の取
付穴付きの外部放熱部と、他方の外部リードとを備えた
リードフレームに半導体チップを実装して樹脂封止を施
し、この樹脂封止部の裏面に前記マウント部の金属基板
を露出させる樹脂封止形半導体装置において、前記外部
放熱部の樹脂封止される部分と取付穴との間に前記外部
放熱部の断面部分の幅より小さい連結部分を有するもの
とし、特に、前記連結部分が前記半導体チップの実装位
置の前記外部放熱部方向の延長線上に無いことが有効で
ある。製造方法としては、マウント部と、その一方の取
付穴付きの外部放熱部と、他方の外部リードとを備えた
リードフレームに半導体チップを実装して樹脂封止を施
し、この樹脂封止部の裏面に前記マウント部の金属基板
を露出させる樹脂封止形半導体装置の製造方法におい
て、前記半導体チップを実装する前に、前記外部放熱部
の樹脂封止される部分と取付穴との間に前記外部放熱部
の断面部分の幅より小さい連結部分を設けるものである
ので、例えばTO−220形のための自動化された多量
生産用設備と工程を活用して小形な表面実装形半導体装
置を例え少量でも生産することができるという効果があ
り、新たに設備と治工具類を導入することなく共用でき
るという効果がある。そして外部放熱部の切断の際には
切断の力が半導体装置を害うということがないという効
果がある。
According to the present invention, a semiconductor chip is mounted on a lead frame provided with a mounting portion, an external heat radiation portion with one mounting hole thereof, and the other external lead, and resin sealing is performed. In a resin-sealed semiconductor device in which the metal substrate of the mount is exposed on the back surface of the stopper, between the resin-sealed portion of the external heat dissipation portion and the mounting hole It is effective to have a small connecting portion, and it is particularly effective that the connecting portion is not on the extension line of the mounting position of the semiconductor chip in the direction of the external heat radiation portion. As a manufacturing method, a semiconductor chip is mounted on a lead frame including a mount portion, an external heat radiation portion with one mounting hole thereof, and the other external lead, and resin sealing is performed. In a method of manufacturing a resin-sealed semiconductor device in which a metal substrate of the mount section is exposed on the back surface, before mounting the semiconductor chip, the external heat radiation section is provided between the resin-sealed section and a mounting hole. Since a connecting portion smaller than the width of the cross-sectional portion of the external heat radiating portion is provided, for example, a small surface mount type semiconductor device can be utilized by utilizing the automated mass production equipment and process for the TO-220 type. However, there is an effect that it can be produced and can be shared without introducing new equipment and jigs. Further, there is an effect that the cutting force does not damage the semiconductor device when the external heat radiation part is cut.

【0015】また、連結部を切断して外部リードをその
先端部がマウント部裏面の延長面上にある装置とする
と、半田付けなどにより回路基板上パターンに容易に表
面実装を行うことができる効果がある。
Further, when the connecting portion is cut and the external lead is used as a device whose tip portion is on the extension surface of the back surface of the mount portion, the surface mounting can be easily performed on the pattern on the circuit board by soldering or the like. There is.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明による一実施例の工程図FIG. 1 is a process chart of an embodiment according to the present invention.

【図2】この発明による小形な表面実装形半導体装置の
断面図
FIG. 2 is a sectional view of a small surface mount semiconductor device according to the present invention.

【図3】図1の(b)に相当する異なる実施例の一製造
工程図
FIG. 3 is a manufacturing process drawing of a different embodiment corresponding to FIG.

【符号の説明】[Explanation of symbols]

1 リードフレーム 2 連結部分 3 外部放熱部 4 マウント部 5 取付穴 6 外部リード 8 半導体チップ 10 樹脂封止部 1 Lead Frame 2 Connection Part 3 External Heat Dissipation Part 4 Mounting Part 5 Mounting Hole 6 External Lead 8 Semiconductor Chip 10 Resin Sealing Part

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】マウント部と、その一方の取付穴付きの外
部放熱部と、他方の外部リードとを備えたリードフレー
ムに半導体チップを実装して樹脂封止を施し、この樹脂
封止部の裏面に前記マウント部の金属基板を露出させる
樹脂封止形半導体装置において、前記外部放熱部の樹脂
封止される部分と取付穴との間に前記外部放熱部の断面
部分の幅より小さい連結部分を有することを特徴とする
樹脂封止形半導体装置。
1. A semiconductor chip is mounted on a lead frame provided with a mount part, an external heat dissipation part having one mounting hole, and the other external lead, and resin sealing is performed. In a resin-sealed semiconductor device in which the metal substrate of the mount portion is exposed on the back surface, a connecting portion between the resin-sealed portion of the external heat radiation portion and a mounting hole is smaller than the width of the cross-sectional portion of the external heat radiation portion. A resin-encapsulated semiconductor device comprising:
【請求項2】請求項1記載の半導体装置において、前記
連結部分が前記半導体チップの実装位置の前記外部放熱
部方向の延長位置以外に形成されることを特徴とする樹
脂封止形半導体装置。
2. The resin-encapsulated semiconductor device according to claim 1, wherein the connecting portion is formed at a position other than an extension position of the mounting position of the semiconductor chip in the direction of the external heat radiation part.
【請求項3】マウント部とそれより厚さの薄い外部リー
ドとを備えたリードフレームのマウント部に半導体チッ
プを実装してマウント部の裏面の金属基板を露出させて
樹脂封止を施した半導体装置において、外部リード部の
先端が前記マウント部裏面の延長面上にあることを特徴
とする樹脂封止形半導体装置。
3. A semiconductor in which a semiconductor chip is mounted on a mount portion of a lead frame having a mount portion and external leads thinner than the mount portion, and a metal substrate on the back surface of the mount portion is exposed and resin-sealed. In the device, a tip of an external lead portion is on an extension surface of the back surface of the mount portion, and a resin-sealed semiconductor device.
【請求項4】マウント部と、その一方の取付穴付きの外
部放熱部と、他方の外部リードとを備えたリードフレー
ムに半導体チップを実装して樹脂封止を施し、この樹脂
封止部の裏面に前記マウント部の金属基板を露出させる
樹脂封止形半導体装置の製造方法において、前記半導体
チップを実装する前に、前記外部放熱部の樹脂封止され
る部分と取付穴との間に前記外部放熱部の断面部分の幅
より小さい連結部分を設けることを特徴とする樹脂封止
形半導体装置の製造方法。
4. A semiconductor chip is mounted on a lead frame provided with a mount part, an external heat dissipation part having one mounting hole, and the other external lead, and resin sealing is performed. In a method of manufacturing a resin-sealed semiconductor device in which a metal substrate of the mount section is exposed on the back surface, before mounting the semiconductor chip, the external heat radiation section is provided between the resin-sealed section and a mounting hole. A method for manufacturing a resin-encapsulated semiconductor device, comprising providing a connecting portion that is smaller than the width of the cross-sectional portion of the external heat dissipation portion.
JP24447696A 1996-09-17 1996-09-17 Method of manufacturing resin-encapsulated semiconductor device Expired - Lifetime JP3019000B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24447696A JP3019000B2 (en) 1996-09-17 1996-09-17 Method of manufacturing resin-encapsulated semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24447696A JP3019000B2 (en) 1996-09-17 1996-09-17 Method of manufacturing resin-encapsulated semiconductor device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP63283452A Division JPH0777248B2 (en) 1988-11-09 1988-11-09 Resin-sealed semiconductor device and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPH09121011A true JPH09121011A (en) 1997-05-06
JP3019000B2 JP3019000B2 (en) 2000-03-13

Family

ID=17119238

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24447696A Expired - Lifetime JP3019000B2 (en) 1996-09-17 1996-09-17 Method of manufacturing resin-encapsulated semiconductor device

Country Status (1)

Country Link
JP (1) JP3019000B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0923129A1 (en) * 1997-12-11 1999-06-16 Siemens Aktiengesellschaft A lead frame for electronic semi-conductor devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0923129A1 (en) * 1997-12-11 1999-06-16 Siemens Aktiengesellschaft A lead frame for electronic semi-conductor devices

Also Published As

Publication number Publication date
JP3019000B2 (en) 2000-03-13

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