JPH0897721A - Ad/da converter - Google Patents

Abstract

PURPOSE: To solve problems of increased chip area due to integration of AD/DA converters and of disable A/D conversion during D/A conversion. CONSTITUTION: The AD/DA converter is made up of an analog voltage generating section 1 generating an analog voltage corresponding to a digital value from a reference voltage, a selector 12 selecting an output of the analog voltage to a voltage hold section 13 or a comparator 7 based on a signal from the control section 1, the comparator 7 comparing an output voltage from the selector 12 with an analog input, a register 4 having a function of varying sequentially the digital value based on the comparison result, a decoder 3 decoding the digital value in the register 4, and a control section 11 controlling the selector 12 with a VDAC output destination selection signal and the register 4 with an AD/DA conversion selection signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an AD / DA (analog-digital / digital-analog) converter.

[0002]

2. Description of the Related Art In recent years, in an integrated circuit for controlling equipment such as a microcomputer, an AD converter and a DA converter have been built in for exchanging information with the equipment. That is, an AD converter is used to digitally process analog information from a sensor or the like, and a DA converter is used to output analog information for controlling a motor or the like. Microphones are generally AD
The resistance for analog voltage generation used in the / DA converter has a very large area, and incorporating resistors for the AD converter and the DA converter, respectively, is an obstacle to reducing the chip area.

As a method for solving such a problem, there is a conventional method of sharing a resistor for generating an analog voltage between an AD converter and a DA converter.

[Prior Art 1] FIG. 2 is a block diagram of a typical successive A / D converter using resistance voltage division. An analog voltage generating unit 1 including a voltage dividing resistor and a voltage dividing switch, which divides a reference voltage 2 (hereinafter referred to as VREF) to generate an analog voltage corresponding to a digital value input from the decoder 3.
, An analog voltage 5 (hereinafter referred to as VDAC) output from the analog voltage generator 1 and an analog input 6 (hereinafter referred to as VI).
(Hereinafter referred to as N) and outputs a low level (hereinafter, L) when VDAC> VIN and a high level (hereinafter, H) when VDAC <VIN. The digital value is sequentially changed by the comparison result output 8,
It is composed of a register 41 that outputs an AD conversion end signal 17 that sequentially changes to the least significant bit, and a decoder 3 that decodes a digital value of the register 41 and outputs a switch switching signal for voltage division of the analog voltage generator 1.

Here, in the 2-bit AD converter, V
The AD conversion operation when REF is 5V and VIN is 2V will be described. First, the preconditions are as follows.

<Precondition> ○ Initial value of digital value 10B ○ Relationship between digital value and VDAC (binary number is expressed by adding B) Digital value VDAC 00B 0V 01B 0.625V 10B 1.875V 11B 3. 125V ○ Relationship between output result of comparator 7 and change in digital value of register 41 Change in output digital value of comparator 7 L ... Set bit being compared to 0 and lower 1 bit to 1 H ... The bit is left unchanged (1) and the lower bit of the bit is set to 1. * If the bit being compared is the least significant bit, only the bit being compared changes based on the output result of the comparator 7.

Initially, the register 41 is 10B.
From the result of decoding this value by the decoder 3, the voltage dividing switch is switched, and VDAC = 1.875V is output from the analog voltage generator 1 according to the precondition. Comparator 7
Then, when VIN = 2V and VDAC = 1.875V are compared, H is output from the comparator 7 as described above. In the register 41 which has received H from the comparator 7, the bit being compared (bit 1) is set to 1 and the bit 1 bit lower (bit 0) is set to 1. That is, it changes from 10B to 11B. Similarly, based on this new register value, VDAC = 3.125V is output from the analog voltage generator and VDAC is output by the comparator 7.
L is output in comparison with IN = 2V. In the register 41, the digital value changes from 11B to 10B. Since the least significant bits have been successively compared, the AD conversion is completed and the conversion result can be read out via the data bus 16.

[Conventional Example 2] FIG. 3 shows a DA using resistance voltage division.
3 shows a block diagram of a converter. A register 42 for setting a digital value, a voltage dividing resistor and a voltage dividing switch
It is composed of an analog voltage generator 1 that generates a VDAC corresponding to a digital value from F, and a decoder 3 that decodes the digital value of the register 42 and outputs a voltage division switch switching signal of the analog voltage generator 1.

The conversion operation of the 2-bit DA converter will be described below. First, the preconditions are as follows.

<Prerequisite> ○ Relationship between digital value and VDAC Digital value VDAC 00B 0V 01B 1.25V 10B 2.50V 11B 3.75V VREF is 5V. Digital value 01 in register 42
If B is set, the voltage dividing switch is switched based on the result of decoding this value by the decoder 3, and VDAC = 1.25 V is output from the analog output 10 from the analog voltage generator 1 based on the precondition. After that, each time the digital value of the register 42 changes, V corresponding to the precondition
The DAC is output from the analog output 10.

[Conventional Example 3] FIG. 4 shows a block diagram of a third conventional example. The same functions as those in the conventional examples 1 and 2 are designated by the same reference numerals and detailed description thereof will be omitted. The analog voltage generator 1 and the decoder 3 of the AD converter and the DA converter are shared, and A
It is composed of a register 41 for sequentially changing a digital value for the D converter and a register 42 for the DA converter. In this conventional example, the analog voltage 5 output from the analog voltage generation circuit 1 is output to both the analog output 10 and the comparator 7 during both AD conversion and DA conversion, and therefore AD conversion can be performed during DA conversion. become unable. On the contrary, it is impossible to perform DA conversion during AD conversion, but since the AD conversion time is several μs to several tens μs (depending on the conversion system, in the case of the sequential conversion system), wait for the AD conversion time. DA conversion becomes possible.

[0012]

As described above, when the resistance voltage dividing type AD converter and the DA converter are built in, the resistance area is large, which is an obstacle to reducing the chip area. . In addition, as in the conventional example described above, A
If the resistors for generating the analog voltage of the D converter and the DA converter are shared, there is a problem that the AD conversion operation cannot be performed while the DA converted analog voltage is being output.

[0013]

According to the present invention, AD /
The DA converter outputs an AD / DA conversion selection signal for selecting either AD conversion or DA conversion and an output of the DA converted analog voltage output to a comparator for AD conversion or an output to a terminal. A control unit for generating an analog voltage output destination selection signal to be selected;
An AD conversion activation signal for energizing the D / DA conversion selection signal and the analog voltage output destination selection signal to activate the AD conversion operation, and a comparator for comparing the analog input voltage with the reference voltage,
When AD conversion is selected based on the AD / DA conversion selection signal output from the control unit, the digital value is sequentially changed according to the output result from the comparator, and the end of AD conversion is detected. A register that outputs a conversion end signal and cannot change sequentially when DA conversion is selected and a digital value can be set from the data bus, and a decoder that decodes the digital value of the register to generate a predetermined decode signal group An analog voltage generator that divides a reference voltage according to an output from the decoder to generate an analog voltage, and a comparator as a reference voltage that is output to a voltage holder that holds the analog voltage output from the analog voltage generator. It is composed of a selector that switches whether to output to, the AD conversion function that generates a predetermined digital value from the analog input voltage and the digital value AD / DA converter with a DA conversion function to output from the terminal a constant analog voltage.

Further, according to the present invention, there is provided an AD / DA converter characterized in that the analog voltage generating section comprises a voltage dividing resistor and a voltage dividing switch.

Further in accordance with the invention, the decoder comprises:
An AD / DA converter characterized in that it decodes a digital value of the register and outputs a switching signal of a voltage dividing switch of the analog voltage generator is obtained.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An AD / DA converter according to an embodiment of the present invention will be described below with reference to FIG. The control unit 11 that outputs the VDAC output destination selection signal 14 and the AD / DA conversion selection signal 15 by the AD conversion activation signal 18 output from the CPU, and the digital value is sequentially changed and converted when the AD conversion is selected. Is completed, the AD conversion end signal 17
Is output, and when DA conversion is selected, it is impossible to change sequentially and the digital value can be set from the data bus 16, and the register 4 that switches the voltage dividing switch of the analog voltage generator 1 by decoding the digital value of the register 4 A V3 corresponding to the output from the decoder 3 which is composed of a decoder 3 for outputting a signal, a voltage dividing resistor and a voltage dividing switch to divide VREF.
Comparing the analog voltage generator 1 that generates the DAC and the VDAC output from the analog voltage generator 1 to the voltage holder 13 that holds the analog voltage according to the VDAC output destination selection signal 14 from the controller 11 or the comparator 7 It is composed of a selector 12 for switching whether to output to and a comparator 7 for comparing the output voltage from the selector 12 with VIN.

Here, when the AD / DA conversion selection signal 15 selects AD conversion, the register 4 has a value in which the most significant bit is 1 and the value other than the most significant bit is 0 (for example, 10B) as an initial value of the digital value. Is set.

In this embodiment, the contents of the AD conversion operation and the DA conversion operation are the same as those of the conventional examples 1, 2, and 3, so a detailed description thereof will be omitted, and different from the conventional example, the DA conversion operation to the AD conversion operation. A switching operation from the AD conversion operation to the DA conversion operation will be described.

First, the switching operation from the DA conversion operation to the AD conversion operation will be described. Register 4 during DA conversion
Is a register that can set a digital value from the data bus 16, and the selector 12 operates to output VDAC to the voltage holding unit 13. Here, when the AD conversion activation signal 18 is input to the control unit 11, the VDAC output destination selection signal 14 and the AD / DA conversion selection signal 15 change to select the AD conversion, and the register 4 receives the digital signal as described above. The initial value is set and operates as a register that can be changed sequentially, and the selector 12 operates to output VDAC to the comparator 7. After that, AD conversion is performed by the same operation as in the first conventional example.

Next, the switching operation from the AD conversion operation to the DA conversion operation will be described. When the AD conversion is completed and the AD conversion end signal 17 is output from the register 4 to the control unit 11, the control unit 11 switches the VDAC output destination selection signal 14 and the AD / DA conversion selection signal 15 to the DA conversion selection state, The register 4 can set a digital value from the data bus 16, the selector 12 is switched to output VDAC to the voltage holding unit 13, and DA conversion is selected. As shown in Conventional Example 2, Four
DA conversion is performed according to the value of.

[0021]

As described above, the AD / AD according to the present invention is
The DA converter selects the output destination of the analog voltage output generated by the analog voltage generator and holds the DA conversion output voltage, thereby increasing the chip area due to the built-in AD / DA converter, and during the DA conversion. It is possible to provide an AD / DA converter that can solve the problem that AD conversion cannot be performed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing an AD converter of Conventional Example 1.

FIG. 3 is a block diagram showing a DA converter of Conventional Example 2.

FIG. 4 is a block diagram showing a third conventional example.

[Explanation of symbols]

 1 analog voltage generation part 2 reference voltage (VREF) 3 decoder 4, 41, 42 register 5 analog voltage (VDAC) 6 analog input (VIN) 7 comparator 8 comparison result output 10 analog output 11 control part 12 selector 13 voltage holding part 14 VDAC output destination selection signal 15 AD / DA conversion selection signal 16 data bus 17 AD conversion end signal 18 AD conversion activation signal

Claims (3)

[Claims] 1. An AD / DA conversion selection signal for selecting either AD conversion or DA conversion and a DA converted analog voltage output as either an output to a comparator for AD conversion or an output to a terminal. A control unit for generating an analog voltage output destination selection signal to be selected;
An AD conversion activation signal for energizing a D / DA conversion selection signal and the analog voltage output destination selection signal to activate an AD conversion operation, a comparator for comparing an analog input voltage with a reference voltage, and an output from the control unit When the AD conversion is selected based on the AD / DA conversion selection signal, the digital value changes sequentially according to the output result from the comparator, and the AD
The end of conversion is detected, an AD conversion end signal is output, and when DA conversion is selected, it is possible to set a digital value from the register by decoding the digital value of the register and a register that cannot be changed sequentially and can be set through the data bus. A decoder that generates a decoded signal group, an analog voltage generation unit that divides a reference voltage according to an output from the decoder to generate an analog voltage, and a voltage holding unit that holds the analog voltage output from the analog voltage generation unit And a comparator for switching the output to a comparator as a reference voltage, and an AD conversion function for generating a predetermined digital value from an analog input voltage and a DA conversion for outputting a predetermined analog voltage from a digital value from a terminal An AD / DA converter characterized by having a function. 2. The AD / DA converter according to claim 1, wherein the analog voltage generator comprises a voltage dividing resistor and a voltage dividing switch. 3. The AD / DA converter according to claim 2, wherein the decoder decodes the digital value of the register and outputs a switching signal of a voltage dividing switch of the analog voltage generating unit. / DA converter.