JPH0612502A - Microcomputer with built-in a/d conversion circuit - Google Patents

Abstract

PURPOSE:To verify in a short time the conversion precision of an A/D conversion circuit built in the microcomputer. CONSTITUTION:The input signals of a D/A converter 6 in an A/D conversion circuit 2 built in a microcomputer 1 are switched by providing a switching circuit 5. This switches whether an arbitrary digital signal D7 is impressed from the outside of the A/D conversion circuit 2 or register data D5 of a successive comparative register 8 are impressed. On the other hand, a means (control circuit 9) is provided to extract an output signal D4 of a comparator 7 to a CPU 3 outside the A/D conversion circuit 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer, and more particularly to a microcomputer with a built-in A / D conversion circuit that facilitates an operation test of the built-in A / D conversion circuit.

[0002]

2. Description of the Related Art Recent microcomputers have been highly integrated due to the progress of LSI technology, and various kinds of peripheral hardware have been mounted in one chip. Among them, a microcomputer incorporating an A / D conversion circuit is indispensable in the fields of automobile control, A / C servo control and the like, and its demand is extremely high.

In verifying the conversion accuracy of such an A / D conversion circuit built in a conventional microcomputer, it is verified by a digital circuit built in the microcomputer and a D / A converter externally added. Means are used. The A / D conversion accuracy will be described below.

This A / D conversion circuit converts an arbitrary analog input signal into a digital signal, but the digital value after A / D conversion and the ideal digital value of the A / D conversion circuit for the arbitrary analog input signal An error occurs between them. The A / D conversion accuracy is a permissible range of this error that is arbitrarily determined. An analog signal with an infinite number of significant digits is rounded off to something close to the middle of the amplitude value discretized by the quantization unit amplitude by rounding or the like. The discrete value of this amplitude is called the quantization level, the total number of quantization levels is called the resolution, and the difference between the maximum value and the minimum value of the quantization level is called the full scale. The minimum value of the quantization level is called a quantization step, which is represented by 1 LSB. For example, 8-bit resolution is 2 ⁸
= 256 quantization levels, full scale is 5
For V, 1 LSB is about 19.5 mV. That is, the permissible error of normal A / D conversion is expressed as ± 1LSB.

FIG. 6 is a successive approximation type A / D showing an example of the prior art.
It is a block diagram of a microcomputer with a built-in conversion circuit. As shown in FIG. 6, a conventional microcomputer 1
Is a successive approximation A / D conversion circuit 2 and a central processing unit (CPU) 3 that executes instruction processing.
And a read-only memory (R that gives sequential commands to the CPU 3 for controlling the operation of the CPU 3
OM) 4 and C outside the microcomputer 1
External output terminal D from which PU3 outputs an arbitrary digital signal
OUT1, an analog input terminal A.IN for inputting an analog signal from the outside of the microcomputer 1, and an external output terminal D.OUT2 for outputting a verification result of A / D conversion accuracy to the outside of the microcomputer 1. It Further, the A / D conversion circuit 2 uses the analog signals S1,
Comparator 7 for comparing S2 and this comparator 7
A successive approximation register 8 which is determined by the output signal D4 of
The control circuit 9 for controlling the overall operation of the / D conversion circuit 2 by the control signals D1 to D3, and the output D of the successive approximation register 8
And a D / A converter 6 for converting 5

FIG. 7 is a block diagram for verifying the conversion accuracy of the A / D conversion circuit in the microcomputer shown in FIG. As shown in FIG. 7, the digital output terminal D.OUT1 and the analog input terminal A.IN outside the microcomputer 1 are connected to the digital output terminal D.OUT.
The D / A converter 10 for inputting the signal output from 1 and inputting the output signal to the analog input terminal A · IN is connected. The D / A converter 10 is a microcomputer 1
A sufficiently high resolution is guaranteed as compared with the A / D conversion circuit 2 included in.

Next, the operation of the A / D conversion circuit 2 in the microcomputer 1 will be described with reference to FIG. 6 again.
First, the CPU 3 outputs the A / D conversion operation start signal D8 to the control circuit 9 of the A / D conversion circuit 2. By the A / D conversion start signal D8, the control circuit 9 causes the comparator 7, the successive approximation register 8 and the D / A converter 6 to operate.
To the successive approximation register 8 and the control signal D2 to the successive approximation register 8. Next, the successive approximation register 8 which receives the control signal D2 immediately after the start of A / D conversion sets the most significant bit to the logical value "1" and the remaining bits to the logical value "0". Furthermore, D / A
The converter 6 uses the register data D5 of the successive approximation register 8
To an analog signal. As a result, the comparator 7 compares the analog output signal S2 of the D / A converter 6 with the analog signal S1 input from the analog input terminal A · IN, and outputs the comparison result D4. That is, the input voltage of the analog signal S1 input from the analog input terminal A · IN is the analog signal S output from the D / A converter 6.
If it is judged to be higher than the input voltage of 2, the logical value "1" is outputted, and if judged to be lower, the logical value "0" is outputted. When the comparator 7 outputs a logical value, the control circuit 9 outputs the control signal D2 to the successive approximation register 8. As a result, the output signal D4 of the comparator 7 is input to the most significant bit of the successive approximation register 8 and the successive approximation register 8
The lower bit next to the most significant bit of is set to a logical value "1". In this way, the period from when the D / A conversion circuit 6 starts the D / A conversion to when 1 bit is set in the successive approximation register 8 is considered as one cycle T of the A / D conversion operation.

The above operation is repeated from the most significant bit to the least significant bit of the successive approximation register 8, that is, the cycle of T is repeated by the number of bits of the successive approximation register 8. When all the bits of the successive approximation register 8 are confirmed, the control circuit 9 causes the A / D
By outputting the conversion end signal D3 to the CPU 3, the A / D conversion operation ends. As a result, the register data D5 of the successive approximation register 8 is determined as a digital value corresponding to the input voltage of the analog signal S1 input from the analog input terminal A • IN of the microcomputer 1. Finally, when the A / D conversion end signal D3 is input to the CPU 3, the register data D5 of the successive approximation register 8
Are collected by the CPU 3.

Next, the operation of verifying the A / D conversion accuracy of the successive approximation A / D conversion circuit 2 built in the microcomputer 1 will be described with reference to FIG. When the CPU 3 outputs the digital output D9 from the external terminal D.OUT1, it is input to the D / A converter 10, so that the digital signal D9 is D / A converted. The output S converted into the analog signal is applied to the analog input terminal A · IN of the microcomputer 1. The analog value applied to the analog input terminal A • IN is input to the A / D conversion circuit 2,
Converted to digital value. The CPU 3 calculates the first digital output D9 and the conversion result D5 of the A / D conversion, and outputs a logical value "1" if the error between both digital values is within an arbitrary range, and a logical value "0" if it is out of the range. External terminal D / OUT
Output to 2. Thereby, the A / D conversion accuracy is verified.

FIG. 8 is a timing chart showing the time required for the transition of the data of the successive comparison register in FIG. 6 and the establishment of the digital value for the analog input of the A / D conversion circuit. As shown in FIG. 8, the time required to confirm the characteristics of the A / D conversion circuit 2 inside the microcomputer 1 will be described here. That is, the timing here is 8 bits in the successive approximation register 8 of the A / D conversion circuit 2 in the microcomputer 1, the output digital value D9 of the CPU 3 is "3E", and the A / D conversion timing output from the control circuit 9 If one cycle of the signal D1 is T, A
The data transition of the successive approximation register 8 in the / D conversion circuit 2 and the time required for the A / D conversion circuit 2 to determine the digital value for the analog input are shown. During the period from timing T1 to T8, the most significant bit to the least significant bit of the successive approximation register 8 are determined. Next, the digital value for the analog input is fixed at the timing of T9, and the fixed digital value is stored in the CPU.
Taken by 3. In this way, one quantization level verification operation requires T × (resolution + 1) cycles.

[0011]

The conventional microcomputer described above has a problem that the A / D conversion circuit in the internal successive approximation A / D conversion circuit has an
The D conversion operation verification time is significantly increased. Therefore, the conventional microcomputer with a built-in A / D conversion circuit is
It takes a long time to verify the A / D conversion operation of the conversion circuit, which has a drawback of causing a large increase in cost.

An object of the present invention is to provide a microcomputer with a built-in A / D conversion circuit, which can verify the accuracy of the A / D converter in a short time.

[0013]

A microcomputer with a built-in A / D conversion circuit according to the present invention has an A / D conversion circuit on the same semiconductor substrate.
In a microcomputer with a built-in D conversion circuit,
Means for controlling the operation timing of the A / D conversion circuit synchronized by an internal system clock, reference voltage generating means for generating a predetermined successive approximation reference voltage, the predetermined successive approximation reference voltage and an arbitrary analog voltage Comparing means for comparing, a successive approximation register for inputting a comparison result of the comparing means, and a switch means for selectively switching and inputting an arbitrary digital signal and data of the successive approximation register to the reference voltage generating means. , Means for outputting the comparison result of the comparison means to the outside of the A / D conversion circuit.

[0014]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a block diagram of a microcomputer with built-in successive approximation type A / D conversion circuit showing an embodiment of the present invention. As shown in FIG. 1, in the present embodiment, when forming a microcomputer 1, an A / D conversion circuit 2, a CPU 3 for executing instruction processing, and a sequential instruction to the CPU 3 for controlling the operation of the CPU 3. ROM4 to give
And an external output terminal D / OUT1 for outputting an arbitrary digital signal by the CPU 3, an analog input terminal A / IN for inputting an analog signal, and an external input for inputting a switching signal for switching the operation mode of the A / D conversion circuit 2. Terminal SW
It has IN and an external output terminal D.OUT2 for outputting a verification result D10 of A / D conversion accuracy. Especially A / D
The conversion circuit 2 includes a comparator 7, a successive approximation register 8 that determines data by the output signal D4 of the comparator 7, and a control circuit 9 that controls the operation of the A / D conversion circuit 2.
And a D / A converter 6, and a switching circuit 5 for switching the digital value input to the D / A converter 6.

FIG. 2 is a block diagram for verifying the A / D conversion accuracy of the A / D conversion circuit in the microcomputer shown in FIG. As shown in FIG. 2, here, an external digital output terminal D · OU of the microcomputer 1 is provided.
A D / A converter 10 for inputting the signal output from the digital output signal D.OUT1 and inputting the output signal to the analog input terminal A.IN is connected to T1 and the analog input terminal A.IN. The D / A converter 10 is guaranteed to have a sufficiently high resolution as compared with the A / D conversion circuit 2 included in the microcomputer 1.

Next, referring to FIGS. 1 and 2, an A / D conversion circuit 2 built in the microcomputer 1 described above.
The operation of will be described. In this embodiment, during the normal A / D conversion operation, the signal D6 having the logical value "1" is applied to the external input terminal SW.IN, and the switching circuit 5 performs the D / A conversion on the register data D5 of the successive approximation register 8. On the other hand, the switching circuit 5 inputs the digital data D7 output from the CPU 3 to the D / A converter 6 by applying a logical value "0" to the external input terminal SW.IN during the test operation. It is structured like this.

First, a normal A / D conversion operation will be described. In the A / D conversion circuit 2, first, the A / D conversion is performed by the CPU 3.
The conversion start signal D8 is output to the control circuit 9. The control circuit 9 outputs the timing signal D1 to the comparator 7, the conversion comparison register 8, and the D / A converter 6, respectively,
A control signal D2 is further output to the successive approximation register 8. The successive approximation register 8 which receives the control signal D2 immediately after the start of A / D conversion sets the most significant bit to the logical value "1" and the remaining bits to the logical value "0". Next, the register data D5 of the successive approximation register 8 is input to the D / A converter 6 through the switching circuit 5, and the D / A converter 6 converts the analog signal S2. Next, the comparator 7 compares the analog output signal S2 of the D / A converter 6 with the analog signal S1 input from the analog input terminal A · IN, and compares the analog signal S1 input from the analog input terminal A · IN. If it is determined that the input voltage is higher than the input voltage of the analog signal S2 output from the D / A converter 6, a logical value "1" is output, and if it is determined that the input voltage is low, a logical value "0" is output. . When the comparator 7 outputs the logical value, the control circuit 9 then outputs the control signal D2 to the successive approximation register 8 to input the output signal D4 of the comparator 7 to the most significant bit of the successive approximation register 8. , The lower bit next to the most significant bit of the successive approximation register 8 is set to the logical value "1".

The period from when the D / A converter 6 starts the D / A conversion to when one bit is set in the successive approximation register 8 is considered as one cycle T of the A / D conversion operation. The above operation is repeated from the most significant bit to the least significant bit of the successive approximation register 8, that is, the cycle of T is repeated by the number of bits of the successive approximation register 8.
When all the bits of A / D are determined, the control circuit 9 outputs the A / D conversion end signal D3 to the CPU 3 to cause A / D conversion.
After the conversion operation is completed, the register data D5 of the successive approximation register 8 is transferred to the analog input terminal A of the microcomputer 1.
-It is decided as a digital value corresponding to the input voltage of the analog signal S1 input from IN. When the A / D conversion end signal D3 is input to the CPU 3, the register data D5 of the successive approximation register 8 is taken by the CPU 3.

Next, the test operation will be described. During the test operation, the switching circuit 5 inputs the digital data D7 output from the CPU 3 to the D / A converter 6 by applying a logical value "0" to the external input terminal SW.IN.
First, the switching circuit 5 inputs a digital value, which is the limit of the allowable error of A / D conversion, from the digital output D9 of the CPU 3 to the D / A converter 6 as a digital output D7.

For example, the successive approximation register 8 has 8 bits,
When the output digital value D9 of the CPU 3 is "3E" and the allowable error of the A / D conversion is ± 2LSB, the output digital value D3 of the CPU 3 is "3E" as the digital output D7.
Digital value "40""3C" with 2LSB increased or decreased from
Is applied. That is, first, the CPU 3 outputs to the D / A converter 6 via the switching circuit 5, the digital value "3C" obtained by reducing the allowable error 2LSB of the A / D conversion to the digital output D9.

Next, the D / A converter 6 outputs the digital value D7.
To an analog signal. At the same time, the CPU 3 outputs the digital output D9 from the external terminal D.OUT1, and the digital signal output from the external terminal D.OUT1 is D /
It is input to the A converter 10. The D / A converter 10 D / A-converts a digital signal, converts the output S into an analog signal, and outputs the output S from an analog input terminal A of the microcomputer 1.
・ Apply to IN.

As a result, the comparator 7 receives the analog signals S1 and D input from the analog input terminals A and IN.
The analog output signal S2 of the A / A converter 6 is compared, and if it is determined that the input voltage of the analog signal S1 is higher than the analog output signal S2, a logical value "1" is output, and if it is determined to be low, a logical value Output "0". When the comparator 7 outputs the output signal D4, the control circuit 9 outputs the A / D conversion end signal D3 to the CPU 3, so that the CPU 3 stores the output signal D4 of the comparator 7.

Here, since the lower limit value of the allowable error of A / D conversion is input to the A / D conversion circuit 2 as the digital value D7, the output signal D4 of the comparator 7 is output.
If it outputs a logical value "1", it means that it is within the allowable error range, and if it outputs a logical value "0", it means that it is outside the allowable error range.

Next, the CPU 3 outputs A to the digital output D9.
A digital value of "4" that is obtained by adding 2LSB of the allowable error of D / D conversion
Since 0 "is output to the D / A converter 6 via the switching circuit 5, the D / A converter 6 converts the digital value D7 into an analog signal and outputs the analog signal S2 to the comparator 7. Comparator 7 has analog input terminal A
The analog signal S1 input from IN is compared with the analog output signal S2 of the D / A converter 6, and the analog signal S
If it is determined that the input voltage of 1 is higher than the input voltage of the analog output signal S2, the logical value "0" is output, and if it is determined to be low, the logical value "1" is output.

Next, when the comparator 7 outputs the output signal D4, the control circuit 9 outputs the A / D conversion end signal D1 as CP.
Output to U3. If the output signal D4 of the comparator 7 output first is the logical value "1" and the signal D4 input next is the logical value "0", the CPU 3 outputs the verification result D10 having the logical value "1" to the output terminal D. Outputting the comparison result D10, which is output to the outside of the microcomputer 1 via OUT2 and is logical value "0" otherwise, to the output terminal DOUT.
It is output to the outside of the microcomputer 1 via 2.

FIG. 3 is a timing diagram showing the time required to verify one quantization level in FIG.
As shown in FIG. 3, here, as an example of the time required to confirm the characteristics of the A / D conversion circuit 2 inside the microcomputer 1, the A / D inside the microcomputer 1
The successive approximation register 8 in the conversion circuit 2 has 8 bits, C
When the output digital value D9 of PU3 is "3E", the A / D conversion accuracy is ± 2LSB, and one cycle of the A / D conversion timing signal D1 output from the control circuit 9 is T, 1
The time required to verify each quantization level is shown. First, the digital value "3E" obtained by reducing 2LSB with respect to the output digital value "3E" of the CPU 3 in the period T1.
A signal obtained by analog-converting C "and a signal obtained by analog-converting the output digital value" 3E "of the CPU 3 are compared. Next, a digital value" 2 "added to the output digital value" 3E "of the CPU 3 during the period T2 A signal obtained by converting 40 "into an analog signal is compared with a signal obtained by converting the output digital value" 3E "of the CPU 3 into an analog signal. As described above, the verification operation of one quantization level according to this embodiment is always T × 2 cycles. It is possible to end with.

FIG. 4 is an A / D showing a second embodiment of the present invention.
It is a block diagram of a microcomputer with a built-in conversion circuit. As shown in FIG. 4, the microcomputer 1 of this embodiment includes an A / D conversion circuit 2, a CPU 3 and a ROM 4,
An external output terminal D.OUT1 from which the CPU 3 outputs an arbitrary digital signal, an analog input terminal A.IN to input an analog signal, and an external input terminal to input a switching signal D6 for switching the operation mode of the A / D conversion circuit 2. It has SW and IN. Moreover, the comparator 7, the successive approximation register 8, the control circuit 9, the D / A converter 6 and the switching circuit 5 forming the A / D conversion circuit 2 are the same as those in the first embodiment. This embodiment is different from the first embodiment in that an external output terminal D.OUT3 for outputting the output signal D4 of the comparator 7 to the outside is provided.

FIG. 5 is a block diagram for verifying the conversion accuracy of the A / D conversion circuit in the microcomputer shown in FIG. As shown in FIG. 5, in order to verify the A / D conversion accuracy in the built-in A / D conversion circuit 2 of the microcomputer 1, the digital output terminal D.OUT1 and the analog output terminal A.IN outside the microcomputer 1 are verified.
, The signal D9 output from the digital output terminal DOUT1 is input to the analog input terminal A
-Connect the D / A converter 10 that inputs to IN. Also,
The D / A converter 10 added to the microcomputer 1 is the same as in the first embodiment.

As shown in FIGS. 4 and 5, in this embodiment, the output signal D4 of the comparator 7 of the A / D conversion circuit 2 is output.
Is also output to the outside of the microcomputer 1, and the CPU 3 outputs only to D.OUT1. Other operations are the same as those in the first embodiment. The operation of verifying one quantization level of the A / D conversion circuit 2 in the microcomputer 1 will be described below, focusing on different parts.

First, the CPU 3 outputs an arbitrary digital output D
9 is output, and a lower limit digital value D7 including a value obtained by reducing the A / D conversion tolerance from this digital output D9, that is, the A / D conversion tolerance is output to the A / D conversion circuit 2. The digital output D9 output from the external output terminal D.OUT1 is supplied to the outside of the microcomputer 1 by the D / A converter 10, and the digital value D7 applied to the A / D conversion circuit 2 is D / A. With the converter 6,
Each is converted to an analog value. These are analog values S1 and S2, and the comparator 7 in the A / D conversion circuit 2
And the magnitude of the value is compared by the comparator 7.
Output signal D4 as a result of comparison by the comparator 7.
Is output to the outside of the microcomputer 1 through the external output terminal D.OUT3. Here, since the lower limit value of the allowable error of A / D conversion is input to the A / D conversion circuit 2 as the digital value D7, the output signal D4 of the comparator 7 outputs the logical value "1". If it is within the allowable error range, and if the logical value "0" is output, it means that it is outside the allowable error range.

Next, a value obtained by adding the A / D conversion tolerance to the digital output D9 of the CPU 3, that is, the upper limit digital value D7 including the A / D conversion tolerance is output to the A / D conversion circuit 2. Next, as in the case where the digital value D7 is the lower limit value, the output signal D4 as a result of comparison by the comparator 7 is output to the external output terminal D.OUT.
It is output to the outside of the microcomputer 1 via Here, since the upper limit value of the allowable error of A / D conversion is input to the A / D conversion circuit 2 as the digital value D7, the output signal D4 of the comparator 7 outputs a logical value "0". If it is within the permissible error range, and if a logical value "1" is output, then it is outside the permissible error range.

That is, in the present embodiment, when the digital value D7 which is the limit of the allowable error of A / D conversion is the upper limit value,
Since each verification result D4 when the digital D7 which is the limit of the allowable error of the / D conversion is the lower limit value is output to the outside of the microcomputer 1 and can be confirmed outside the microcomputer 1, one quantization level is obtained. It is possible to obtain detailed verification results instead of vague verification results for.

[0033]

As described above, according to the present invention, the time required to verify one quantization level is set to the successive approximation type A
Since it can be fixed regardless of the number of bits of the successive approximation register in the / D conversion circuit, the verification time of the A / D conversion operation can be significantly reduced, the inspection can be facilitated, and the cost can be reduced. effective.

[Brief description of drawings]

FIG. 1 is a block diagram of a microcomputer with a built-in A / D conversion circuit showing a first embodiment of the present invention.

FIG. 2 is a block configuration diagram for verifying conversion accuracy of the A / D conversion circuit in the microcomputer shown in FIG.

FIG. 3 is a timing diagram showing the time required to verify one quantization level in FIG.

FIG. 4 is a block diagram of a microcomputer with a built-in A / D conversion circuit showing a second embodiment of the present invention.

5 is a block configuration diagram for verifying conversion accuracy of the microcomputer A / D conversion circuit shown in FIG. 4;

FIG. 6 is a block diagram of a conventional microcomputer with a built-in A / D conversion circuit.

FIG. 7 is a block configuration diagram for verifying conversion accuracy of the A / D conversion circuit in the microcomputer shown in FIG.

8 is a timing chart showing a time required for transition of data of the successive approximation register in FIG. 6 and determination of a digital value with respect to an analog input of an A / D conversion circuit.

[Explanation of symbols]

1 Microcomputer 2 A / D conversion circuit 3 CPU 4 ROM 5 switching circuit 6,10 D / A converter 7 comparator 8 successive approximation register 9 control circuit D / OUT1 to D / OUT3 digital signal external output terminal A / IN analog signal External input terminal

Claims (1)

[Claims] 1. In a microcomputer having an A / D conversion circuit built in on the same semiconductor substrate, means for controlling the operation timing of the A / D conversion circuit synchronized by an internal system clock, and a predetermined successive approximation reference. Reference voltage generating means for generating a voltage, comparing means for comparing the predetermined successive approximation reference voltage with an arbitrary analog voltage, successive approximation register for inputting the comparison result of the comparing means, and for the reference voltage generating means. Switch means for selectively switching and inputting an arbitrary digital signal and data of the successive approximation register, and means for outputting the comparison result of the comparison means to the outside of the A / D conversion circuit. A microcomputer with a built-in A / D conversion circuit.