JPH0870093A - Plastic molded type field effect transistor - Google Patents

Plastic molded type field effect transistor

Info

Publication number
JPH0870093A
JPH0870093A JP20510494A JP20510494A JPH0870093A JP H0870093 A JPH0870093 A JP H0870093A JP 20510494 A JP20510494 A JP 20510494A JP 20510494 A JP20510494 A JP 20510494A JP H0870093 A JPH0870093 A JP H0870093A
Authority
JP
Japan
Prior art keywords
resin
effect transistor
field effect
sealed
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20510494A
Other languages
Japanese (ja)
Inventor
Sadamu Tomibe
定 冨部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP20510494A priority Critical patent/JPH0870093A/en
Publication of JPH0870093A publication Critical patent/JPH0870093A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48471Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

PURPOSE: To provide a plastic molded type field effect transistor at a low cost which can restrain switching noise without lowering the switching speed and is excellent in workability, productivity, etc. CONSTITUTION: The title plastic molded type field effect transistor is provided with a metallic substrate 2, an MOS-FET element 3, an outer lead 11 and a resin package 14. An EMI beads core 5 for protecting switching noise which core is connected in series between the gate electrode of the MOS-FET element 3 and the outer lead terminal 11 and sealed in the resin package 14 with resin is installed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、スイッチング回路に組
み込んで使用する樹脂封止型電界効果トランジスタ(以
下樹脂封止型MOS−FETと称す)に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed field effect transistor (hereinafter referred to as a resin-sealed MOS-FET) used by incorporating it in a switching circuit.

【0002】[0002]

【従来の技術】近年、パワースイッチング素子として高
周波特性に優れた樹脂封止型MOS−FETが広く利用
されている。しかしながら、樹脂封止型MOS−FET
をスイッチング素子として組み込んだ回路では、高周波
でドライブした際、スイッチング動作に起因してノイズ
(以下スイッチングノイズと称す)が発生するという問
題点を有していた。そこで、このスイッチングノイズを
低く抑えるために、次のような対策が実施されている。
すなわち、樹脂封止型MOS−FETのゲート電極に接
続したゲート抵抗の抵抗値を高くすることにより、スイ
ッチングスピードを遅くさせる方法や、樹脂封止型MO
S−FETのゲート電極,ドレイン電極及びソース電
極,又はこれら各電極にボンディングワイヤを介して接
続された外部リード端子にスイッチングノイズ防止用E
MIビーズコア(以下EMIビーズコアと称す)を挿着
させる方法である。尚、スイッチングスピードを遅くさ
せることなくスイッチングノイズを抑制できる後者の方
法が広く利用されている。
2. Description of the Related Art In recent years, resin-sealed MOS-FETs having excellent high frequency characteristics have been widely used as power switching elements. However, resin-sealed MOS-FET
The circuit incorporating the element as a switching element has a problem that when driven at a high frequency, noise (hereinafter referred to as switching noise) is generated due to the switching operation. Therefore, the following measures are taken to suppress this switching noise to a low level.
That is, a method of slowing the switching speed by increasing the resistance value of the gate resistance connected to the gate electrode of the resin-sealed MOS-FET, or the resin-sealed MO
E for switching noise prevention to the gate electrode, the drain electrode and the source electrode of the S-FET, or the external lead terminals connected to these electrodes via bonding wires.
This is a method of inserting an MI bead core (hereinafter referred to as EMI bead core). The latter method, which can suppress switching noise without slowing the switching speed, is widely used.

【0003】以下に従来の樹脂封止型MOS−FETに
ついて、図面を参照しながら説明する。図5は従来の樹
脂封止型MOS−FETを示す平面図である。1′は従
来の樹脂封止型MOS−FET、2′は図示しない金属
性基板,電界効果トランジスタ素子(以下MOS−FE
T素子と称す)等を樹脂封止した樹脂パッケージ、
3′,4′,5′はMOS−FET素子の各電極に電気
的に接続されかつ樹脂パッケージ2′から露出された外
部リード端子、6′,7′,8′は外部リード端子
3′,4′,5′に挿着されたEMIビーズコアであ
る。
A conventional resin-sealed MOS-FET will be described below with reference to the drawings. FIG. 5 is a plan view showing a conventional resin-sealed MOS-FET. 1'is a conventional resin-sealed MOS-FET, 2'is a metallic substrate (not shown), a field effect transistor element (hereinafter referred to as MOS-FE).
A resin package in which (for example, T element) is resin-sealed,
3 ', 4', 5'are external lead terminals electrically connected to the respective electrodes of the MOS-FET element and exposed from the resin package 2 ', 6', 7 ', 8'are external lead terminals 3', EMI bead cores inserted into 4'and 5 '.

【0004】[0004]

【発明が解決しようとする課題】しかしながら上記従来
の構成では、樹脂封止型MOS−FETの外部リード端
子にEMIビーズコアを挿着することが困難であり、作
業性に欠けるという問題点を有していた。また、EMI
ビーズコアがフェライト等の靱性等の低い材料等からな
るために耐衝撃性等を考慮して補強等を行う必要があ
り、生産性に欠けるという問題点を有していた。更に、
樹脂封止型MOS−FETを基板等に組み付ける際に、
EMIビーズコアが外部リード端子から外れることがな
いように注意を要し、やはり作業性に欠けるという問題
点を有していた。
However, in the above-mentioned conventional structure, it is difficult to insert the EMI bead core into the external lead terminal of the resin-sealed MOS-FET, and there is a problem that the workability is poor. Was there. Also, EMI
Since the bead core is made of a material having low toughness such as ferrite, it is necessary to perform reinforcement or the like in consideration of impact resistance and the like, and there is a problem that productivity is lacking. Furthermore,
When assembling the resin-sealed MOS-FET on a substrate,
The EMI bead core requires attention so that it will not come off from the external lead terminal, and there is a problem in that workability is also poor.

【0005】本発明は上記従来の問題点を解決するもの
であり、スイッチングスピードを遅延化することなくス
イッチングノイズを抑制でき、作業性や生産性等に優れ
た低原価の樹脂封止型MOS−FETを提供することを
目的とする。
The present invention solves the above-mentioned problems of the prior art, and is capable of suppressing switching noise without delaying the switching speed, and is a low-cost resin-sealed MOS-type device which is excellent in workability and productivity. The purpose is to provide a FET.

【0006】[0006]

【課題を解決するための手段】この目的を達成するため
に本発明の請求項1に記載の樹脂封止型電界効果トラン
ジスタは、金属性基板と、金属性基板の上面に接地され
た電界効果トランジスタ素子と、電界効果トランジスタ
素子のゲート電極,ドレイン電極及びソース電極とボン
ディングワイヤを介して接続された外部リード端子と、
外部リード端子の一端部を露出して金属性基板,電界効
果トランジスタ素子及び外部リード端子を樹脂封止する
樹脂パッケージと、を備えた樹脂封止型電界効果トラン
ジスタであって、電界効果トランジスタ素子のゲート電
極,ドレイン電極及びソース電極と外部リード端子との
間にそれぞれ直列に接続されかつ樹脂パッケージ内に樹
脂封止されたスイッチングノイズ防止用EMIビーズコ
アを備えた構成を有しており、請求項2に記載の樹脂封
止型電界効果トランジスタは、請求項1に記載の樹脂封
止型電界効果トランジスタが、絶縁性基板上にスイッチ
ングノイズ防止用EMIビーズコアが接地された内部配
線用基板を備えた構成を有している。
In order to achieve this object, a resin-sealed field effect transistor according to claim 1 of the present invention comprises a metallic substrate and a field effect grounded on the upper surface of the metallic substrate. A transistor element and an external lead terminal connected to a gate electrode, a drain electrode and a source electrode of the field effect transistor element via a bonding wire,
What is claimed is: 1. A resin-sealed field-effect transistor comprising: a metal substrate exposing one end of an external lead terminal; a field-effect transistor element; and a resin package for resin-sealing the external lead terminal. The EMI bead core for switching noise prevention, which is connected in series between the gate electrode, the drain electrode, the source electrode, and the external lead terminal, and is resin-sealed in a resin package. The resin-sealed field effect transistor according to claim 1, wherein the resin-sealed field effect transistor according to claim 1 is provided with an internal wiring substrate in which an EMI bead core for preventing switching noise is grounded on an insulating substrate. have.

【0007】ここで、金属性基板に使用される材料とし
ては、Fe−Ni−Co合金,銅合金等が挙げられる。
ボンディングワイヤに使用される材料としては、金,ア
ルミニウム,銅等が挙げられる。外部リード端子に使用
される材料としては、Fe−Ni−Co合金,銅合金等
が挙げられる。樹脂封止型電界効果トランジスタ(樹脂
封止型MOS−FET)の樹脂封止方法としては、トラ
ンスファ成形法(又はトランスファモールド法),注型
法,浸漬法(又は沈積法),粉体流動浸漬法等が挙げら
れる。樹脂封止型MOS−FETをトランスファ成形法
で樹脂封止する場合、金属性基板及び外部リード端子
は、同一のリードフレームに形成されてもよい。リード
フレームは、MOS−FET素子の電極材料と同じ材料
で形成されてもよい。樹脂封止する樹脂材料としては、
樹脂封止方法にもよるが、ウレタン,メラミン,エポキ
シ,シリコン,不飽和ポリエステル等が挙げられる。ス
イッチングノイズ防止用EMIビーズコアとは、スイッ
チング素子等を備えた回路で生じたスイッチングノイズ
等の電磁界干渉(ElectromagneticIn
terferance,EMI)を防止するものであ
る。この目的でスイッチングノイズ防止用EMIビーズ
コアとしては、フェライト,アモルファス等が挙げられ
る。内部配線用基板の絶縁性基板に使用される材料とし
ては、セラミックス,アルミニウム等が挙げられる。内
部配線用基板は、絶縁性基板上に接地されたスイッチン
グノイズ防止用EMIビーズコアの両端等にこのスイッ
チングノイズ防止用EMIビーズコアと電気的に接続さ
れ,かつボンディングワイヤや外部リード端子との接続
用の導体を備えると、容易にスイッチングノイズ防止用
EMIビーズコアとこれらボンディングワイヤや外部リ
ード端子との接続等を行うことができ、作業性等を向上
でき、好ましい。絶縁性基板の導体は、その一端部がス
イッチングノイズ防止用EMIビーズコアの下端面に接
地され、かつ他端部が絶縁性基板のスイッチングノイズ
防止用EMIビーズコアが配設された一端面上やその一
端面を除く他端面に表出されて形成されてもよい。
Here, examples of the material used for the metallic substrate include Fe-Ni-Co alloys and copper alloys.
Examples of the material used for the bonding wire include gold, aluminum and copper. Examples of materials used for the external lead terminals include Fe-Ni-Co alloys and copper alloys. As a resin sealing method of the resin sealing type field effect transistor (resin sealing type MOS-FET), there are a transfer molding method (or transfer molding method), a casting method, an immersion method (or a deposition method), and a powder fluidized immersion. Law etc. are mentioned. When the resin-sealed MOS-FET is resin-sealed by the transfer molding method, the metallic substrate and the external lead terminals may be formed on the same lead frame. The lead frame may be formed of the same material as the electrode material of the MOS-FET element. As the resin material for resin sealing,
Depending on the resin sealing method, urethane, melamine, epoxy, silicone, unsaturated polyester, etc. may be mentioned. The EMI bead core for preventing switching noise is an electromagnetic interference (electromagnetic interference) such as switching noise generated in a circuit including a switching element or the like.
(Terence, EMI). Ferrite, amorphous, etc. are mentioned as an EMI bead core for switching noise prevention for this purpose. Examples of the material used for the insulating substrate of the internal wiring substrate include ceramics and aluminum. The internal wiring board is electrically connected to the switching noise prevention EMI bead core at both ends of the switching noise prevention EMI bead core grounded on the insulating board, and for connection with the bonding wire or the external lead terminal. It is preferable to provide a conductor because the EMI bead core for preventing switching noise can be easily connected to these bonding wires and external lead terminals, and the workability can be improved. One end of the conductor of the insulating substrate is grounded to the lower end surface of the EMI bead core for switching noise prevention, and the other end of the conductor is on one end surface of the insulating substrate on which the EMI bead core for switching noise prevention is arranged or one thereof. It may be exposed and formed on the other end surface excluding the end surface.

【0008】[0008]

【作用】この構成によって、EMIビーズコアを備えた
ことにより、樹脂封止型MOS−FETのスイッチング
スピードを遅延化することなくスイッチング回路のスイ
ッチングノイズを抑制できる。また、EMIビーズコア
をMOS−FET素子等とともに樹脂パッケージ内に樹
脂封止したことにより、外部リード端子からの外れ等を
防止できる。また、EMIビーズコアを有する内部配線
用基板を備えたことにより、ワイヤボンディング工程等
におけるワイヤボンディング作業が容易に行える。
With this configuration, since the EMI bead core is provided, the switching noise of the switching circuit can be suppressed without delaying the switching speed of the resin-sealed MOS-FET. Further, by sealing the EMI bead core together with the MOS-FET element and the like in a resin package, it is possible to prevent the EMI bead core from coming off from the external lead terminal. Further, the provision of the internal wiring substrate having the EMI bead core facilitates the wire bonding work in the wire bonding process and the like.

【0009】[0009]

【実施例】【Example】

(実施例1)以下、本発明の一実施例における樹脂封止
型MOS−FETについて、図面を参照しながら説明す
る。図1は本発明の一実施例における樹脂封止型MOS
−FETを示す断面側面図、図2は図1の断面平面図、
図3は図1の要部断面平面図である。図1及び図2にお
いて、1は本発明の一実施例における樹脂封止型MOS
−FET、2はドレイン電極を複数層積層してなる金属
性基板(又はダイパッド)、3は金属性基板2上に接地
されたMOS−FET素子、4は後述する絶縁性基板4
a及び導体15a乃至15lからなる内部配線用基板、
5,6,7は内部配線用基板4上に接地されたスイッチ
ングノイズ防止用EMIビーズコア(以下EMIビーズ
コアと称す)、8,9,10はMOS−FET素子3の
ゲート電極,ドレイン電極及びソース電極とEMIビー
ズコア5,6,7との間を電気的に接続するためのボン
ディングワイヤ、11,12,13はEMIビーズコア
5,6,7と電気的に接続された外部リード端子、14
は外部リード端子11,12,13の一端部を露出して
金属性基板2,MOS−FET素子3,内部配線用基板
4,EMIビーズコア5,6,7及びボンディングワイ
ヤ8,9,10を樹脂封止するための樹脂パッケージで
ある。図3において、4aはセラミックス等の絶縁性材
料等からなる絶縁性基板、15a乃至15lは絶縁性基
板4a上に配設された導体である。
(Embodiment 1) A resin-sealed MOS-FET according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a resin-sealed MOS according to an embodiment of the present invention.
-A sectional side view showing the FET, Fig. 2 is a sectional plan view of Fig. 1,
FIG. 3 is a cross-sectional plan view of an essential part of FIG. 1 and 2, reference numeral 1 denotes a resin-sealed MOS according to an embodiment of the present invention.
-FET, 2 is a metallic substrate (or die pad) formed by laminating a plurality of drain electrodes, 3 is a MOS-FET element grounded on the metallic substrate 2, and 4 is an insulating substrate 4 described later.
a for internal wiring comprising a and conductors 15a to 15l,
5, 6 and 7 are switching noise preventing EMI bead cores (hereinafter referred to as EMI bead cores) grounded on the internal wiring substrate 4, and 8, 9 and 10 are gate electrodes, drain electrodes and source electrodes of the MOS-FET element 3. And bonding wires for electrically connecting the EMI bead cores 5, 6 and 7 to each other, 11, 12, 13 are external lead terminals electrically connected to the EMI bead cores 5, 6 and 7, 14
Exposes one end of the external lead terminals 11, 12, and 13 and exposes the metallic substrate 2, the MOS-FET element 3, the internal wiring substrate 4, the EMI bead cores 5, 6, 7 and the bonding wires 8, 9, 10 with resin. It is a resin package for sealing. In FIG. 3, 4a is an insulating substrate made of an insulating material such as ceramics, and 15a to 15l are conductors provided on the insulating substrate 4a.

【0010】以上のように構成された樹脂封止型MOS
−FETについて、以下その製造方法について説明す
る。まず、エポキシ樹脂等からなる粉末樹脂をトランス
ファポットに搬入する。次に、トランスファポットに搬
入された粉末樹脂を加熱溶融する。一方、絶縁性基板4
aの上面に導体15a乃至15lを被着形成して内部配
線用基板4を形成する。次に、内部配線用基板4の導体
15j及び15kに亘ってEMIビーズコア5を被着形
成する。次に、前述と同様にして、導体15fから15
gに亘ってEMIビーズコア6を、また導体15bから
15cに亘ってEMIビーズコア7を被着形成する。ま
た、所定形状を持って形成されたリードフレームのダイ
パッドの上面にMOS−FET素子3をダイボンディン
グする。次に、内部配線用基板4の導体15l,15
h,15dにそれぞれ外部リード端子11,12,13
を半田付けする。次に、リードフレームのダイパッド
(又はドレイン電極)及びMOS−FET素子3のゲー
ト電極及びソース電極と、内部配線用基板4の導体15
i,15e,15aとをそれぞれワイヤボンディングす
る。次に、この組立体をモールド金型内にセットする。
次に、モールド金型のキャビティに注型樹脂を注入して
樹脂パッケージ14を成形する。次に、モールド金型か
ら樹脂封止型MOS−FET1を取り出して完成する。
A resin-sealed MOS having the above structure
Regarding the -FET, the manufacturing method thereof will be described below. First, a powder resin such as an epoxy resin is carried into a transfer pot. Next, the powder resin carried into the transfer pot is heated and melted. On the other hand, the insulating substrate 4
The conductors 15a to 15l are deposited on the upper surface of a to form the internal wiring substrate 4. Next, the EMI bead core 5 is adhered and formed over the conductors 15j and 15k of the internal wiring board 4. Next, in the same manner as described above, the conductors 15f to 15
The EMI bead core 6 is deposited over g and the EMI bead core 7 is deposited over the conductors 15b to 15c. Further, the MOS-FET element 3 is die-bonded to the upper surface of the die pad of the lead frame formed to have a predetermined shape. Next, the conductors 15l, 15 of the internal wiring substrate 4
External lead terminals 11, 12, and 13 are attached to h and 15d, respectively.
To solder. Next, the die pad (or drain electrode) of the lead frame, the gate electrode and the source electrode of the MOS-FET element 3, and the conductor 15 of the internal wiring substrate 4
Wire bonding of i, 15e, and 15a, respectively. Next, this assembly is set in a molding die.
Next, the casting resin is injected into the cavity of the molding die to form the resin package 14. Next, the resin-sealed MOS-FET 1 is taken out from the molding die and completed.

【0011】以上のように本実施例によれば、EMIビ
ーズコアを備えたので、樹脂封止型MOS−FETのス
イッチングスピードを遅延化することなくスイッチング
回路のスイッチングノイズを抑制できることは勿論、E
MIビーズコアが露出されずに金属性基板,MOS−F
ET素子等とともに樹脂封止されたので、EMIビーズ
コアが外部リード端子から外れたり、またEMIビーズ
コアが外部リード端子から外れて落下等により破損した
りすること等が防止できる。また、絶縁性基板上にEM
Iビーズコアを接地した内部配線用基板を備えたので、
ワイヤボンディング工程等に際して、ワイヤボンディン
グ作業が容易に行え、また、内部配線用基板にEMIビ
ーズコアに接地された導体を備えたので、この導体上に
ボンド点を取ることができ、更にワイヤボンディング作
業を容易に行うことができる。
As described above, according to this embodiment, since the EMI bead core is provided, it is of course possible to suppress the switching noise of the switching circuit without delaying the switching speed of the resin-sealed MOS-FET.
Metallic substrate, MOS-F without exposing MI bead core
Since it is resin-sealed together with the ET element and the like, it is possible to prevent the EMI bead core from coming off the external lead terminal, and the EMI bead core from coming off the external lead terminal and being damaged by being dropped or the like. In addition, EM on the insulating substrate
Since it has an internal wiring board with the I bead core grounded,
In the wire bonding process and the like, the wire bonding work can be easily performed, and since the internal wiring substrate is provided with the conductor grounded to the EMI bead core, the bond point can be taken on this conductor, and the wire bonding work can be further performed. It can be done easily.

【0012】次に、本発明の一実施例の応用例について
説明する。図4は本発明の一実施例の応用例における樹
脂封止型MOS−FETの内部配線用基板を示す断面側
面図である。本発明の一実施例と異なるのは、内部配線
用基板4にスルーホール4b,4bを形成し、そのスル
ーホール4b,4bにそれぞれ導体15m乃び15pを
埋設した点である。尚、図示しないが、内部配線用基板
4には、MOS−FET素子3のドレイン電極及びソー
ス電極と外部リード端子12,13とを接続するための
導体15n,15o及び15q,15rも埋設されてい
る。以上のように本発明の一実施例の応用例によれば、
内部配線用基板への外部リード端子及びEMIビーズコ
アの接続を内部配線用基板の表裏面同時に行うことがで
きる。
Next, an application example of one embodiment of the present invention will be described. FIG. 4 is a cross-sectional side view showing a substrate for internal wiring of a resin-sealed MOS-FET in an application example of one embodiment of the present invention. The difference from the embodiment of the present invention is that through holes 4b and 4b are formed in the internal wiring substrate 4, and conductors 15m and 15p are buried in the through holes 4b and 4b, respectively. Although not shown, conductors 15n, 15o and 15q, 15r for connecting the drain electrode and the source electrode of the MOS-FET element 3 to the external lead terminals 12, 13 are also embedded in the internal wiring substrate 4. There is. As described above, according to the application example of the embodiment of the present invention,
The external lead terminals and the EMI bead cores can be connected to the internal wiring board at the same time as the front and back surfaces of the internal wiring board.

【0013】[0013]

【発明の効果】以上のように本発明の樹脂封止型電界効
果トランジスタによれば、金属性基板と、前記金属性基
板の上面に接地された電界効果トランジスタ素子と、前
記電界効果トランジスタ素子のゲート電極,ドレイン電
極及びソース電極とボンディングワイヤを介して接続さ
れた外部リード端子と、前記外部リード端子の一端部を
露出して前記金属性基板,前記電界効果トランジスタ素
子及び前記外部リード端子を樹脂封止する樹脂パッケー
ジと、を備えた樹脂封止型電界効果トランジスタであっ
て、前記電界効果トランジスタ素子の前記ゲート電極,
前記ドレイン電極及び前記ソース電極と前記外部リード
端子との間にそれぞれ直列に接続されかつ前記樹脂パッ
ケージ内に樹脂封止されたスイッチングノイズ防止用E
MIビーズコアを備えたので、樹脂封止型MOS−FE
Tのスイッチングスピードを遅延化することなくスイッ
チングノイズを抑制できるとともにEMIビーズコアの
外部からの衝撃の付与を緩衝でき、EMIビーズコアの
破損等を防止できる。更に、EMIビーズコアの耐衝撃
に対する補強作業等を省略化でき、また外部リード端子
からの外れ等を防止できるので、基板等への組付け時の
取扱性を向上でき、この結果、組付作業等を簡素化でき
るとともにスイッチング回路を簡素化できる。したがっ
て、作業性や生産性,信頼性に優れた低原価の樹脂封止
型電界効果トランジスタの提供を実現できる。
As described above, according to the resin-sealed field effect transistor of the present invention, the metallic substrate, the field effect transistor element grounded on the upper surface of the metallic substrate, and the field effect transistor element An external lead terminal connected to a gate electrode, a drain electrode, and a source electrode via a bonding wire, and one end of the external lead terminal is exposed to expose the metallic substrate, the field effect transistor element, and the external lead terminal with a resin. A resin package for sealing, which is a resin-sealed field effect transistor, comprising: the gate electrode of the field effect transistor element;
A switching noise prevention E, which is connected in series between the drain electrode and the source electrode and the external lead terminal and is resin-sealed in the resin package.
Equipped with MI bead core, resin-sealed MOS-FE
The switching noise can be suppressed without delaying the switching speed of T, and the impact from the outside of the EMI bead core can be buffered to prevent the EMI bead core from being damaged. Further, since the work of reinforcing the EMI bead core against impact resistance can be omitted and it can be prevented from coming off from the external lead terminal, the handling property at the time of assembling to the substrate or the like can be improved, and as a result, the assembling work or the like. And the switching circuit can be simplified. Therefore, it is possible to provide a low-cost resin-sealed field effect transistor having excellent workability, productivity, and reliability.

【0014】また、前記スイッチングノイズ防止用EM
Iビーズコアが接地された絶縁性基板を備えたので、ワ
イヤボンディング作業等が容易に行え、したがって、作
業性や生産性に優れた低原価の樹脂封止型電界効果トラ
ンジスタの提供を実現できる。
Further, the switching noise prevention EM
Since the I-bead core is provided with the insulating substrate grounded, the wire bonding work and the like can be easily performed, so that it is possible to provide a low-cost resin-sealed field effect transistor excellent in workability and productivity.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例における樹脂封止型MOS−
FETを示す断面側面図
FIG. 1 is a resin-sealed type MOS-in one embodiment of the present invention.
Cross-sectional side view showing FET

【図2】図1の断面平面図FIG. 2 is a sectional plan view of FIG.

【図3】図1の要部断面平面図FIG. 3 is a cross-sectional plan view of an essential part of FIG.

【図4】本発明の一実施例の応用例における樹脂封止型
MOS−FETの内部配線用基板を示す断面側面図
FIG. 4 is a sectional side view showing a substrate for internal wiring of a resin-sealed MOS-FET in an application example of an embodiment of the present invention.

【図5】従来の樹脂封止型MOS−FETを示す平面図FIG. 5 is a plan view showing a conventional resin-sealed MOS-FET.

【符号の説明】[Explanation of symbols]

1,1′ 樹脂封止型MOS−FET 2 金属性基板 3 MOS−FET素子 4 内部配線用基板 4a 絶縁性基板 4b スルーホール 5,6,7,6′,7′,8′ EMIビーズコア 8,9,10 ボンディングワイヤ 11,12,13,3′,4′,5′ 外部リード端子 14,2′ 樹脂パッケージ 15a,15b,15c,15d,15e,15f,1
5g,15h,15i15j,15k,15l,15
m,15n,15o,15p,15q,15r導体
1, 1'resin-sealed MOS-FET 2 metallic substrate 3 MOS-FET element 4 substrate for internal wiring 4a insulating substrate 4b through hole 5, 6, 7, 6 ', 7', 8 'EMI bead core 8, 9,10 Bonding wire 11,12,13,3 ', 4', 5 'External lead terminal 14,2' Resin package 15a, 15b, 15c, 15d, 15e, 15f, 1
5g, 15h, 15i15j, 15k, 15l, 15
m, 15n, 15o, 15p, 15q, 15r conductor

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】金属性基板と、前記金属性基板の上面に接
地された電界効果トランジスタ素子と、前記電界効果ト
ランジスタ素子のゲート電極,ドレイン電極及びソース
電極とボンディングワイヤを介して接続された外部リー
ド端子と、前記外部リード端子の一端部を露出して前記
金属性基板,前記電界効果トランジスタ素子及び前記外
部リード端子を樹脂封止する樹脂パッケージと、を備え
た樹脂封止型電界効果トランジスタであって、前記電界
効果トランジスタ素子の前記ゲート電極,前記ドレイン
電極及び前記ソース電極と前記外部リード端子との間に
それぞれ直列に接続されかつ前記樹脂パッケージ内に樹
脂封止されたスイッチングノイズ防止用EMIビーズコ
アを備えたことを特徴とする樹脂封止型電界効果トラン
ジスタ。
1. A metallic substrate, a field effect transistor device grounded on the upper surface of the metallic substrate, and an external device connected to a gate electrode, a drain electrode and a source electrode of the field effect transistor device through bonding wires. A resin-sealed field effect transistor comprising: a lead terminal; and a resin package that exposes one end of the external lead terminal to seal the metallic substrate, the field effect transistor element and the external lead terminal with a resin. An EMI for preventing switching noise, which is connected in series between the gate electrode, the drain electrode and the source electrode of the field effect transistor element and the external lead terminal and is resin-sealed in the resin package. A resin-sealed field-effect transistor having a bead core.
【請求項2】請求項1に記載の樹脂封止型電界効果トラ
ンジスタが、絶縁性基板上に前記スイッチングノイズ防
止用EMIビーズコアが接地された内部配線用基板を備
えたことを特徴とする樹脂封止型電界効果トランジス
タ。
2. The resin-sealed field effect transistor according to claim 1, wherein the resin-sealed field effect transistor comprises an internal wiring substrate on which an EMI bead core for preventing switching noise is grounded on an insulating substrate. Static field effect transistor.
JP20510494A 1994-08-30 1994-08-30 Plastic molded type field effect transistor Pending JPH0870093A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20510494A JPH0870093A (en) 1994-08-30 1994-08-30 Plastic molded type field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20510494A JPH0870093A (en) 1994-08-30 1994-08-30 Plastic molded type field effect transistor

Publications (1)

Publication Number Publication Date
JPH0870093A true JPH0870093A (en) 1996-03-12

Family

ID=16501488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20510494A Pending JPH0870093A (en) 1994-08-30 1994-08-30 Plastic molded type field effect transistor

Country Status (1)

Country Link
JP (1) JPH0870093A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003012870A1 (en) * 2001-07-30 2003-02-13 Niigata Seimitsu Co., Ltd. Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003012870A1 (en) * 2001-07-30 2003-02-13 Niigata Seimitsu Co., Ltd. Semiconductor device

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