JPH05102216A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH05102216A
JPH05102216A JP26180791A JP26180791A JPH05102216A JP H05102216 A JPH05102216 A JP H05102216A JP 26180791 A JP26180791 A JP 26180791A JP 26180791 A JP26180791 A JP 26180791A JP H05102216 A JPH05102216 A JP H05102216A
Authority
JP
Japan
Prior art keywords
semiconductor element
mold
semiconductor
semiconductor device
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26180791A
Other languages
Japanese (ja)
Inventor
Isamu Yoshida
勇 吉田
Junichi Saeki
準一 佐伯
Shigeharu Tsunoda
重晴 角田
Kunihiko Nishi
邦彦 西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP26180791A priority Critical patent/JPH05102216A/en
Publication of JPH05102216A publication Critical patent/JPH05102216A/en
Pending legal-status Critical Current

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To provide the technique with which a semiconductor element can be sealed in the state having no defects of molding such as shifting of an insert, penetrating void and the like. CONSTITUTION:A mold resin piece 5, which was molded in advance, is provided on the cavity part of the lower mold 2, a lead frame 3, on which a semiconductor element 4 is mounted, is formed, molded and the shifting of an insert can be suppressed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置に係り、特
に、樹脂封止型半導体装置に適用して有効な技術に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a technique effective when applied to a resin-sealed semiconductor device.

【0002】[0002]

【従来の技術】トランスファ成形法により樹脂封止され
た半導体装置として、ピン挿入型のDIP、ZIPや表
面実装型のQFP、SOP、SOJ等が一般に用いられ
る。
2. Description of the Related Art As a semiconductor device which is resin-sealed by a transfer molding method, a pin insertion type DIP, ZIP and a surface mounting type QFP, SOP, SOJ and the like are generally used.

【0003】最近、表面実装型の半導体装置が増加し、
外形の縦横寸法に対して半導体素子の大きさは拡大する
傾向にある。また、半導体装置の厚みは薄くなる傾向に
ある。(参考文献:1990年6月号 日経マイクロデ
バイス p.32〜p.62)さらに、半導体装置の厚
みが薄くなる傾向は強まり、TABを樹脂封止すること
によりTSOP(厚さ1mm)より薄い装置が開発され
ている。(参考文献:1991年2月号 日経マイクロ
デバイス p.65〜p.66)
Recently, the number of surface mount semiconductor devices has increased,
The size of the semiconductor element tends to increase with respect to the vertical and horizontal dimensions of the outer shape. Further, the thickness of the semiconductor device tends to be thin. (Reference: June 1990, Nikkei Microdevices p.32-p.62) Furthermore, the tendency for the thickness of semiconductor devices to become thinner is increasing, and by encapsulating TAB with resin, devices thinner than TSOP (1 mm thick) Is being developed. (Reference: February 1991 Nikkei Microdevices p.65-p.66)

【0004】[0004]

【発明が解決しようとする課題】半導体装置の厚みが薄
くなると、樹脂の充填性が低下して未充填、貫通ボイ
ド、インサ−ト移動等の問題が発生する。対策として、
樹脂の面では粘度を低下させ、構造の面ではインサ−ト
上下の樹脂厚を出来るだけ等しくなるようにしてきた。
しかし、金線ル−プ高さ、半導体素子厚、リ−ドフレ−
ム厚、光の影響を防止するための半導体素子上の最低樹
脂厚等の制約条件から、インサ−ト上下の樹脂厚を出来
るだけ等しくするのも限界があり構造面では対策できな
い場合があった。
When the thickness of the semiconductor device becomes thin, the filling property of the resin deteriorates and problems such as unfilling, through voids, and insert movement occur. As a countermeasure,
In terms of resin, the viscosity has been reduced, and in terms of structure, the resin thickness above and below the insert has been made as uniform as possible.
However, gold wire loop height, semiconductor element thickness, lead frame
Due to constraints such as the thickness of the film and the minimum resin thickness on the semiconductor element to prevent the influence of light, there was a limit to making the resin thickness above and below the insert as equal as possible, and there were cases where structural measures could not be taken. ..

【0005】本発明の目的は、半導体装置において、イ
ンサ−ト上下の樹脂厚がほぼ等しくない場合でも半導体
素子を封止することが可能な技術を提供することにあ
る。
It is an object of the present invention to provide a technique capable of encapsulating a semiconductor element in a semiconductor device even when the resin thickness above and below the insert is not substantially equal.

【0006】本発明の他の目的は、半導体装置におい
て、厚さが薄くなった場合でも半導体素子を封止するこ
とが可能な技術を提供することにある。
Another object of the present invention is to provide a technique capable of encapsulating a semiconductor element in a semiconductor device even when the thickness is reduced.

【0007】本発明の他の目的は、半導体装置におい
て、半導体素子は発熱するので放熱性を向上させること
が可能な技術を提供することにある。
Another object of the present invention is to provide a technique capable of improving heat dissipation because a semiconductor element generates heat in a semiconductor device.

【0008】[0008]

【課題を解決するための手段】上記目的を達成するため
に、半導体装置において成形金型にリ−ドフレ−ムやT
ABを設置し、且つ、インサ−トの下に封止用樹脂や金
属板を設置したものである。設置方法として、リ−ドフ
レ−ムやTABのインサ−トの下に接着剤を介して接着
させたり、下型のキャビティ部に置くこと等がある。
In order to achieve the above object, a lead frame or a T-shaped frame is formed on a molding die in a semiconductor device.
AB is installed, and a sealing resin and a metal plate are installed under the insert. As an installation method, there is a method of adhering it under an insert of a lead frame or a TAB via an adhesive or placing it in a cavity of a lower mold.

【0009】[0009]

【作用】この発明におけるリ−ドフレ−ムやTABのイ
ンサ−トの下に設置されたモ−ルド樹脂や金属板は、封
止によるインサ−ト移動、貫通ボイド、未充填等の不良
を防止するように動作する。また、金属板を使用した場
合は半導体装置の放熱性の向上が図れる。
The mold resin and metal plate installed under the lead frame or TAB insert in the present invention prevent defects such as insert movement due to sealing, through voids, and unfilling. To work. Moreover, when a metal plate is used, the heat dissipation of the semiconductor device can be improved.

【0010】[0010]

【実施例】以下、本発明の実施例を図面に基づいて説明
する。
Embodiments of the present invention will be described below with reference to the drawings.

【0011】図1は、本発明の第一の実施例に係る装置
の半導体樹脂封止用金型に搭載されたときの断面図を示
す。1は上型、2は下型、3はリ−ドフレ−ム、4は半
導体素子、5は予め成形しておいたモ−ルド樹脂片であ
る。モ−ルド樹脂片5は、上型1と下型2を開いた状態
で下型2のキャビティ部6に設置され、その上に半導体
素子4が搭載されているリ−ドフレ−ム3が下型2に設
置され、上型1と下型2を閉めて成形する。
FIG. 1 shows a sectional view of the device according to the first embodiment of the present invention when it is mounted on a mold for semiconductor resin encapsulation. Reference numeral 1 is an upper mold, 2 is a lower mold, 3 is a lead frame, 4 is a semiconductor element, and 5 is a premolded resin piece. The mold resin piece 5 is installed in the cavity 6 of the lower mold 2 with the upper mold 1 and the lower mold 2 opened, and the lead frame 3 on which the semiconductor element 4 is mounted is arranged on the lower side. It is installed in the mold 2 and the upper mold 1 and the lower mold 2 are closed to perform molding.

【0012】図2は本発明の第一の実施例に用いるリ−
ドフレ−ムの平面図を示す。図において、7は半導体素
子4を搭載するタブ、8は基板(図示せず)と接続する
リ−ド、9は半導体素子4とリ−ド8を電気的に接続す
るワイヤである。
FIG. 2 shows a reel used in the first embodiment of the present invention.
The top view of a dframe is shown. In the figure, 7 is a tab for mounting the semiconductor element 4, 8 is a lead for connecting to a substrate (not shown), and 9 is a wire for electrically connecting the semiconductor element 4 and the lead 8.

【0013】本発明によれば、インサ−ト(半導体素子
4、タブ7)の下にモ−ルド樹脂片5があることにより
成形時のインサ−ト移動、貫通ボイド等の成形不良を防
止する効果がある。
According to the present invention, the mold resin piece 5 is located under the insert (semiconductor element 4, tab 7) to prevent insert movement during molding and molding defects such as through voids. effective.

【0014】図3は、本発明の第二の実施例に係る装置
の半導体樹脂封止用金型に搭載されたときの断面図を示
す。モ−ルド樹脂片5は、リ−ドフレ−ム3のタブ7に
接着剤10を介して装着し、上型1と下型2を開いた状
態で下型2のキャビティ部6にリ−ドフレ−ム3といっ
しょに設置され、上型1と下型2を閉めて成形する。
FIG. 3 shows a sectional view of the device according to the second embodiment of the present invention when it is mounted on a semiconductor resin sealing mold. The mold resin piece 5 is attached to the tab 7 of the lead frame 3 via the adhesive 10, and the lead frame is placed in the cavity 6 of the lower mold 2 with the upper mold 1 and the lower mold 2 open. -It is installed together with the frame 3 and closes the upper mold 1 and the lower mold 2 for molding.

【0015】図4は本発明の第二の実施例に用いるリ−
ドフレ−ムの平面図を示す。図4と図2の違いは、リ−
ドフレ−ム3のタブ7に接着剤10を介してモ−ルド樹
脂片5が装着されていることである。
FIG. 4 shows a reel used in the second embodiment of the present invention.
The top view of a dframe is shown. The difference between Figure 4 and Figure 2 is that
That is, the mold resin piece 5 is attached to the tab 7 of the dframe 3 via the adhesive 10.

【0016】本発明によれば、モ−ルド樹脂片5を下型
2のキャビティ部6に直接設置しないので、第一の実施
例に比べて成形サイクルを短縮出来るという効果があ
る。
According to the present invention, since the mold resin piece 5 is not directly installed in the cavity portion 6 of the lower mold 2, there is an effect that the molding cycle can be shortened as compared with the first embodiment.

【0017】図5は、本発明の第三の実施例に係る装置
の半導体樹脂封止用金型に搭載されたときの断面図を示
す。図において、11は金属板である。金属板11は、
リ−ドフレ−ム3のタブ7に接着剤10を介して装着
し、上型1と下型2を開いた状態で下型2のキャビティ
部6にリ−ドフレ−ム3といっしょに設置され、上型1
と下型2を閉めて成形する。
FIG. 5 shows a sectional view of the device according to the third embodiment of the present invention when it is mounted on a mold for semiconductor resin encapsulation. In the figure, 11 is a metal plate. The metal plate 11 is
It is attached to the tab 7 of the lead frame 3 with an adhesive 10 and is installed together with the lead frame 3 in the cavity 6 of the lower mold 2 with the upper mold 1 and the lower mold 2 open. , Upper mold 1
Then, the lower mold 2 is closed and molded.

【0018】本発明によれば、タブ7の下に金属板11
を設けることにより、第一、第二の実施例に比べて放熱
性を向上させるという効果がある。
According to the invention, a metal plate 11 is provided under the tab 7.
By providing the above, there is an effect that the heat dissipation is improved as compared with the first and second embodiments.

【0019】図6は、本発明の第四の実施例に係る装置
の半導体樹脂封止用金型に搭載されたときの断面図を示
す。モ−ルド樹脂片5は、半導体素子4に接着剤10を
介して装着し、上型1と下型2を開いた状態で下型2の
キャビティ部6にリ−ドフレ−ム3といっしょに設置さ
れ、上型1と下型2を閉めて成形する。
FIG. 6 is a sectional view of the device according to the fourth embodiment of the present invention when it is mounted on a semiconductor resin sealing mold. The mold resin piece 5 is attached to the semiconductor element 4 via the adhesive 10, and the upper mold 1 and the lower mold 2 are opened and the lead frame 3 is attached to the cavity 6 of the lower mold 2. It is installed, and the upper mold 1 and the lower mold 2 are closed to perform molding.

【0020】図7は本発明の第四の実施例に用いるリ−
ドフレ−ムの平面図を示す。リ−ド5の下にはテ−プ1
2を介して半導体素子4が装着されており、半導体素子
4の下には接着剤10を介してモ−ルド樹脂片5が装着
されている。図7と図4の違いは、図7は半導体素子4
に図4はタブ7に接着剤10を介してモ−ルド樹脂片5
が装着されていることである。
FIG. 7 shows a reel used in the fourth embodiment of the present invention.
The top view of a dframe is shown. Tape 1 under the lead 5
A semiconductor element 4 is mounted via the semiconductor element 4, and a mold resin piece 5 is mounted under the semiconductor element 4 via an adhesive 10. The difference between FIG. 7 and FIG. 4 is that FIG.
FIG. 4 shows the tab 7 and the molded resin piece 5 via the adhesive 10.
Is installed.

【0021】本発明によれば、モ−ルド樹脂片5を下型
2のキャビティ部6に直接設置しないので、第一の実施
例に比べて成形サイクルを短縮出来るという効果があ
る。
According to the present invention, since the mold resin piece 5 is not directly installed in the cavity portion 6 of the lower mold 2, the molding cycle can be shortened as compared with the first embodiment.

【0022】本実施例において、放熱性を向上させる目
的でモ−ルド樹脂片の代わりに金属板を用いても良いこ
とは言うまでもない。
In the present embodiment, it goes without saying that a metal plate may be used in place of the molded resin piece for the purpose of improving heat dissipation.

【0023】図8は本発明の第五の実施例に用いるTA
Bテ−プの斜視図を示す。TABテ−プ13の上には、
接着剤(図示せず)を介してリ−ド8が搭載されてお
り、リ−ド8の先にはバンプ(図示せず)を介して半導
体素子4が装着されている。TABテ−プ13は、モ−
ルド樹脂に封止される部分にスリット14を設けてイン
サ−ト上下のモ−ルド樹脂の接着性を向上させている。
FIG. 8 shows a TA used in the fifth embodiment of the present invention.
The perspective view of B tape is shown. Above the TAB tape 13,
The lead 8 is mounted via an adhesive (not shown), and the semiconductor element 4 is mounted on the tip of the lead 8 via a bump (not shown). TAB tape 13 is
A slit 14 is provided in the portion sealed with the molded resin to improve the adhesiveness of the molded resin above and below the insert.

【0024】図9は、本発明の第五の実施例に係る装置
が図8のIX−IX断面で半導体樹脂封止用金型に搭載
されたときの断面図を示す。TABテ−プ13の上には
リ−ド8が装着され、その上にはリ−ド8表面を保護す
るためにソルダレジスト15を塗布されている。モ−ル
ド樹脂片5は、上型1と下型2を開いた状態で下型2の
キャビティ部6に設置され、その上に半導体素子4がバ
ンプ16によって搭載されているTABテ−プ13が下
型2に設置され上型1と下型2を閉めて成形する。
FIG. 9 shows a sectional view of the device according to the fifth embodiment of the present invention when it is mounted on a semiconductor resin encapsulation mold in the IX-IX section of FIG. A lead 8 is mounted on the TAB tape 13, and a solder resist 15 is applied on the lead 8 to protect the surface of the lead 8. The mold resin piece 5 is installed in the cavity 6 of the lower mold 2 with the upper mold 1 and the lower mold 2 opened, and the TAB tape 13 on which the semiconductor element 4 is mounted by the bumps 16. Is installed in the lower mold 2 and the upper mold 1 and the lower mold 2 are closed to perform molding.

【0025】本発明によれば、半導体素子4とリ−ド8
の接続にバンプ16を用いることにより、ワイヤのル−
プ高さを考慮しなくても良いので第一の実施例に比べて
装置の厚さを薄くしやすいという効果がある。また、バ
ンプ16の間隔をワイヤの間隔より狭く出来るので、第
一の実施例に比べて同外形の場合で多ピン化出来るとい
う効果もある。
According to the present invention, the semiconductor element 4 and the lead 8 are
By using the bumps 16 to connect the
Since it is not necessary to consider the height of the device, the thickness of the device can be easily reduced as compared with the first embodiment. Further, since the intervals of the bumps 16 can be made narrower than the intervals of the wires, there is an effect that the number of pins can be increased in the case of the same outer shape as in the first embodiment.

【0026】図10は本発明の第六の実施例に用いるT
ABテ−プの斜視図を示す。TABテ−プ13の上に
は、接着剤(図示せず)を介してリ−ド8が搭載されて
おり、リ−ド8の先にはバンプ(図示せず)を介して半
導体素子4が装着されている。そして、半導体素子4の
下には接着剤10を介してモ−ルド樹脂片5が装着され
ている。TABテ−プ13は、モ−ルド樹脂に封止され
る部分にスリット14を設けてインサ−ト上下のモ−ル
ド樹脂の接着性を向上させている。
FIG. 10 shows the T used in the sixth embodiment of the present invention.
The perspective view of AB tape is shown. A lead 8 is mounted on the TAB tape 13 via an adhesive (not shown), and the semiconductor element 4 is mounted on the tip of the lead 8 via a bump (not shown). Is installed. Under the semiconductor element 4, a mold resin piece 5 is attached via an adhesive 10. The TAB tape 13 is provided with a slit 14 in a portion sealed with the mold resin to improve the adhesiveness of the mold resin above and below the insert.

【0027】図11は、本発明の第六の実施例に係る装
置が図10のXI−XI断面で半導体樹脂封止用金型に
搭載されたときの断面図を示す。図11と図9の違い
は、半導体素子4に接着剤10を介して、モ−ルド樹脂
片5が装着されていることである。
FIG. 11 shows a sectional view of the apparatus according to the sixth embodiment of the present invention when it is mounted on a semiconductor resin encapsulating mold in the XI-XI section of FIG. The difference between FIG. 11 and FIG. 9 is that the mold resin piece 5 is attached to the semiconductor element 4 via the adhesive 10.

【0028】本発明によれば、モ−ルド樹脂片5を下型
2のキャビティ部6に直接設置しないので、第五の実施
例に比べて成形サイクルを短縮出来るという効果があ
る。
According to the present invention, since the mold resin piece 5 is not directly installed in the cavity portion 6 of the lower mold 2, there is an effect that the molding cycle can be shortened as compared with the fifth embodiment.

【0029】本実施例では、放熱性を向上させる目的で
モ−ルド樹脂片の代わりに金属片を用いても良い。
In this embodiment, a metal piece may be used instead of the molded resin piece for the purpose of improving heat dissipation.

【0030】図12は、本発明の第七の実施例に用いる
リ−ドフレ−ムの平面図を示す。リ−ドフレ−ム3のタ
ブ7には半導体素子4が搭載されており、半導体素子4
の上には接着剤10を介してモ−ルド樹脂片5が搭載さ
れている。本実施例に用いられる半導体素子4の上に搭
載されるモ−ルド樹脂片5は、ワイヤ9の邪魔にならな
い大きさであればどんな形状でも良い。
FIG. 12 is a plan view of the lead frame used in the seventh embodiment of the present invention. The semiconductor element 4 is mounted on the tab 7 of the lead frame 3.
A mold resin piece 5 is mounted on the upper surface of the mold via an adhesive 10. The mold resin piece 5 mounted on the semiconductor element 4 used in this embodiment may have any shape as long as it does not interfere with the wire 9.

【0031】図13は、本発明の第七の実施例に係る装
置の半導体樹脂封止用金型に搭載されたときの断面図を
示す。図13と図1の違いは、インサ−ト(タブ7、半
導体素子4)をモ−ルド樹脂片5で固定して金型に搭載
されているところである。
FIG. 13 shows a sectional view of the device according to the seventh embodiment of the present invention when it is mounted on a semiconductor resin sealing mold. The difference between FIG. 13 and FIG. 1 is that the insert (tab 7, semiconductor element 4) is fixed by the mold resin piece 5 and mounted on the mold.

【0032】本発明によれば、インサ−ト(タブ7、半
導体素子4)をモ−ルド樹脂片5で固定して金型に搭載
されているので、インサ−トがほとんど移動しない状態
で成形出来る。
According to the present invention, since the insert (tab 7, semiconductor element 4) is fixed by the mold resin piece 5 and mounted on the mold, molding is performed with the insert hardly moving. I can.

【0033】本実施例において、放熱性を向上させる目
的でモ−ルド樹脂片の代わりに金属板を用いても良い。
In this embodiment, a metal plate may be used in place of the molded resin piece for the purpose of improving heat dissipation.

【0034】図14は、本発明の第八の実施例に係る装
置の半導体樹脂封止用金型に搭載されたときの断面図を
示す。リ−ドフレ−ム3のタブ7の下には、接着剤10
を介してモ−ルド樹脂片5が装着されている。モ−ルド
樹脂片5は、円錐状になっており半導体素子4を中心に
四つ装着されている。
FIG. 14 shows a sectional view of the device according to the eighth embodiment of the present invention when it is mounted on a semiconductor resin sealing mold. Adhesive 10 is provided under the tab 7 of the lead frame 3.
The mold resin piece 5 is attached via the. The mold resin pieces 5 have a conical shape and four pieces are mounted around the semiconductor element 4.

【0035】本発明によれば、モ−ルド樹脂片5は円錐
上になっているので成形した後の半導体装置の外観には
目立ちにくい。
According to the present invention, since the mold resin piece 5 has a conical shape, the appearance of the semiconductor device after molding is less noticeable.

【0036】本実施例では、モ−ルド樹脂片5が四つ装
着された場合を説明したがインサ−ト(タブ7、半導体
素子4)が移動しなければ幾つでも良い。
In this embodiment, the case where four mold resin pieces 5 are mounted has been described, but any number may be used as long as the inserts (tab 7, semiconductor element 4) do not move.

【0037】第二、第八の実施例でリ−ドフレ−ムとモ
−ルド樹脂片、第三の実施例でリ−ドフレ−ムと金属
板、第四、六、七の実施例でチップとモ−ルド樹脂片を
接着するのに接着剤を使用しているが、両面接着型テ−
プを用いても良い。
In the second and eighth embodiments, the lead frame and the molded resin piece, in the third embodiment the lead frame and the metal plate, and in the fourth, sixth and seventh embodiments, the chip. Adhesive is used to bond the mold resin pieces to the double-sided adhesive type tape.
May be used.

【0038】また、第二ないし八の実施例によれば、イ
ンサ−ト(半導体素子4、タブ7)の下にモ−ルド樹脂
片5があることにより成形時のインサ−ト移動、貫通ボ
イド等の成形不良を防止することができる。
Further, according to the second to eighth embodiments, since the mold resin piece 5 is located under the insert (semiconductor element 4, tab 7), the insert movement and the through void at the time of molding are performed. It is possible to prevent molding defects such as.

【0039】[0039]

【発明の効果】本発明によればモ−ルド樹脂充填中に起
きるインサ−ト移動、貫通ボイド等の成形不良を防止す
ることが出来る。また、インサ−ト(半導体素子、タ
ブ)の下に金属板を設置することにより装置の放熱性を
向上させることが出来る。
According to the present invention, it is possible to prevent molding defects such as insert movement and through voids which occur during filling of the mold resin. Also, by disposing a metal plate under the insert (semiconductor element, tab), the heat dissipation of the device can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第一の実施例の金型に設置したときの
断面図、
FIG. 1 is a sectional view when installed in a mold according to a first embodiment of the present invention,

【図2】本発明の第一の実施例に用いるリ−ドフレ−ム
の平面図、
FIG. 2 is a plan view of a lead frame used in the first embodiment of the present invention,

【図3】本発明の第二の実施例の金型に設置したときの
断面図、
FIG. 3 is a cross-sectional view when installed in a mold according to a second embodiment of the present invention,

【図4】本発明の第二の実施例に用いるリ−ドフレ−ム
の平面図、
FIG. 4 is a plan view of a lead frame used in a second embodiment of the present invention,

【図5】本発明の第三の実施例の金型に設置したときの
断面図、
FIG. 5 is a sectional view when installed in a mold of a third embodiment of the present invention,

【図6】本発明の第四の実施例の金型に設置したときの
断面図、
FIG. 6 is a cross-sectional view when installed in a mold of a fourth embodiment of the present invention,

【図7】本発明の第四の実施例に用いるリ−ドフレ−ム
の平面図、
FIG. 7 is a plan view of a lead frame used in a fourth embodiment of the present invention,

【図8】本発明の第五の実施例に用いるTABテ−プの
斜視図、
FIG. 8 is a perspective view of a TAB tape used in a fifth embodiment of the present invention,

【図9】本発明の第五の実施例の金型に設置したときの
断面図、
FIG. 9 is a sectional view when installed in a mold of a fifth embodiment of the present invention,

【図10】本発明の第六の実施例に用いるTABテ−プ
の斜視図、
FIG. 10 is a perspective view of a TAB tape used in a sixth embodiment of the present invention,

【図11】本発明の第六の実施例の金型に設置したとき
の断面図、
FIG. 11 is a cross-sectional view when installed in the mold of the sixth embodiment of the present invention,

【図12】本発明の第七の実施例に用いるリ−ドフレ−
ムの平面図、
FIG. 12 is a lead frame used in a seventh embodiment of the present invention.
Top view of the

【図13】本発明の第七の実施例の金型に設置したとき
の断面図、
FIG. 13 is a cross-sectional view when installed in a mold according to a seventh embodiment of the present invention,

【図14】本発明の第八の実施例の金型に設置したとき
の断面図。
FIG. 14 is a cross-sectional view when installed in a mold according to an eighth embodiment of the present invention.

【符号の説明】[Explanation of symbols]

3…リ−ドフレ−ム、5…モ−ルド樹脂片。 3 ... Lead frame, 5 ... Molded resin piece.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 西 邦彦 東京都小平市上水本町五丁目20番1号株式 会社日立製作所武蔵工場内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kunihiko Nishi 5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Stock company Hitachi Ltd. Musashi factory

Claims (15)

【特許請求の範囲】[Claims] 【請求項1】リ−ドフレ−ムに半導体素子を搭載し、前
記半導体素子をモ−ルド樹脂で封止する半導体装置にお
いて、下型のキャビティ部に予め成形しておいたモ−ル
ド樹脂を設置し、その上に前記リ−ドフレ−ムを設置し
て封止することを特徴とする半導体装置。
1. In a semiconductor device in which a semiconductor element is mounted on a lead frame and the semiconductor element is sealed with a mold resin, a mold resin previously molded in a cavity of a lower mold is used. A semiconductor device, which is installed, and on which the lead frame is installed and sealed.
【請求項2】リ−ドフレ−ムに半導体素子を搭載し、前
記半導体素子をモ−ルド樹脂で封止する半導体装置にお
いて、インサ−ト部の下に接着剤で予め成形しておいた
前記モ−ルド樹脂を設置し、前記リ−ドフレ−ムを用い
て封止することを特徴とする半導体装置。
2. A semiconductor device in which a semiconductor element is mounted on a lead frame and the semiconductor element is sealed with a mold resin, wherein the semiconductor element is previously molded with an adhesive under an insert portion. A semiconductor device, characterized in that a mold resin is installed and sealed by using the lead frame.
【請求項3】リ−ドフレ−ムに半導体素子を搭載し、前
記半導体素子をモ−ルド樹脂で封止する半導体装置にお
いて、インサ−ト部の下に接着剤で金属板を設置し前記
リ−ドフレ−ムを用いて封止することを特徴とする半導
体装置。
3. A semiconductor device in which a semiconductor element is mounted on a lead frame, and the semiconductor element is sealed with a mold resin. In the semiconductor device, a metal plate is placed under an insert portion with an adhesive to provide the lead. -A semiconductor device characterized by being sealed using a dframe.
【請求項4】TABテ−プに半導体素子を搭載し、前記
半導体素子をモ−ルド樹脂で封止する半導体装置におい
て、下型のキャビティ部に予め成形しておいたモ−ルド
樹脂を設置し、その上に前記TABテ−プを設置して封
止することを特徴とする半導体装置。
4. In a semiconductor device in which a semiconductor element is mounted on a TAB tape and the semiconductor element is sealed with a mold resin, a premolded mold resin is installed in a cavity of a lower mold. The semiconductor device is characterized in that the TAB tape is placed thereon and sealed.
【請求項5】TABテ−プに半導体素子を搭載し、前記
半導体素子をモ−ルド樹脂で封止する半導体装置におい
て、インサ−ト部の下に、接着剤で予め成形しておいた
モ−ルド樹脂を設置し、該TABテ−プを用いて封止す
ることを特徴とする半導体装置。
5. A semiconductor device in which a semiconductor element is mounted on a TAB tape, and the semiconductor element is sealed with a mold resin. A semiconductor device previously molded with an adhesive under an insert portion. -A semiconductor device in which a resin is installed and the TAB tape is used for sealing.
【請求項6】TABテ−プに半導体素子を搭載し、前記
半導体素子をモ−ルド樹脂で封止する半導体装置におい
て、インサ−ト部の下に接着剤で金属板を設置し該TA
Bテ−プを用いて封止することを特徴とする半導体装
置。
6. A semiconductor device in which a semiconductor element is mounted on a TAB tape, and the semiconductor element is sealed with a mold resin. A metal plate is installed under an insert portion with an adhesive to form the TA.
A semiconductor device characterized by being sealed using a B tape.
【請求項7】請求項2において、前記リ−ドフレ−ム
に、インサ−ト部の下に接着剤で予め成形しておいたモ
−ルド樹脂を装着するリ−ドフレ−ム。
7. The lead frame according to claim 2, wherein the lead frame is fitted with a mold resin previously molded with an adhesive under the insert portion.
【請求項8】請求項3において、前記リ−ドフレ−ム
に、インサ−ト部の下に接着剤で金属板を装着するリ−
ドフレ−ム。
8. The reel according to claim 3, wherein a metal plate is attached to the lead frame below the insert portion with an adhesive.
Dframe.
【請求項9】請求項5において、前記TABテ−プに、
半導体素子の下に接着剤で予め成形しておいたモ−ルド
樹脂を装着するTABテ−プ。
9. The TAB tape according to claim 5,
A TAB tape in which a mold resin pre-molded with an adhesive is mounted under the semiconductor element.
【請求項10】請求項6において、前記TABテ−プ
に、半導体素子の下に接着剤で金属板を装着するTAB
テ−プ。
10. The TAB according to claim 6, wherein a metal plate is attached to the TAB tape under the semiconductor element with an adhesive.
Tape.
【請求項11】請求項1または2において、前記金型上
に予め成形しておいたモ−ルド樹脂とリ−ドフレ−ムを
搭載し、半導体素子を封止する半導体樹脂封止方法。
11. The method for encapsulating a semiconductor resin according to claim 1, wherein a mold resin and a lead frame, which have been preformed, are mounted on the die, and a semiconductor element is encapsulated.
【請求項12】請求項3において、前記金型上に金属板
とリ−ドフレ−ムを搭載し、半導体素子を封止する半導
体樹脂封止方法。
12. The semiconductor resin encapsulation method according to claim 3, wherein a metal plate and a lead frame are mounted on the mold and a semiconductor element is encapsulated.
【請求項13】請求項4または5において、前記金型上
に予め成形しておいたモ−ルド樹脂とTABテ−プを搭
載し、半導体素子を封止する半導体樹脂封止方法。
13. A semiconductor resin encapsulation method according to claim 4, wherein a mold resin and a TAB tape, which have been preformed, are mounted on the die, and a semiconductor element is encapsulated.
【請求項14】請求項6において、前記金型上に金属板
とTABテ−プを搭載し、半導体素子を封止する半導体
樹脂封止方法。
14. The semiconductor resin encapsulation method according to claim 6, wherein a metal plate and a TAB tape are mounted on the mold and a semiconductor element is encapsulated.
【請求項15】請求項11において、前記金型のキャビ
ティ上に、半導体素子を下から支える物体を設置して封
止する半導体装置。
15. The semiconductor device according to claim 11, wherein an object that supports a semiconductor element from below is placed and sealed on the cavity of the mold.
JP26180791A 1991-10-09 1991-10-09 Semiconductor device Pending JPH05102216A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26180791A JPH05102216A (en) 1991-10-09 1991-10-09 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26180791A JPH05102216A (en) 1991-10-09 1991-10-09 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH05102216A true JPH05102216A (en) 1993-04-23

Family

ID=17366990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26180791A Pending JPH05102216A (en) 1991-10-09 1991-10-09 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH05102216A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05198707A (en) * 1992-01-22 1993-08-06 Nec Kyushu Ltd Manufacture of semiconductor device
JPH05243301A (en) * 1992-02-28 1993-09-21 Nec Kyushu Ltd Production of semiconductor device
JP2010067852A (en) * 2008-09-11 2010-03-25 Sanyo Electric Co Ltd Method of manufacturing circuit device
JP2010067851A (en) * 2008-09-11 2010-03-25 Sanyo Electric Co Ltd Method of manufacturing circuit device
JP2010086996A (en) * 2008-09-29 2010-04-15 Sanyo Electric Co Ltd Method of manufacturing circuit device
JP2010086991A (en) * 2008-09-29 2010-04-15 Sanyo Electric Co Ltd Circuit arrangement and manufacturing method thereof

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05198707A (en) * 1992-01-22 1993-08-06 Nec Kyushu Ltd Manufacture of semiconductor device
JPH05243301A (en) * 1992-02-28 1993-09-21 Nec Kyushu Ltd Production of semiconductor device
JP2010067852A (en) * 2008-09-11 2010-03-25 Sanyo Electric Co Ltd Method of manufacturing circuit device
JP2010067851A (en) * 2008-09-11 2010-03-25 Sanyo Electric Co Ltd Method of manufacturing circuit device
JP2010086996A (en) * 2008-09-29 2010-04-15 Sanyo Electric Co Ltd Method of manufacturing circuit device
JP2010086991A (en) * 2008-09-29 2010-04-15 Sanyo Electric Co Ltd Circuit arrangement and manufacturing method thereof

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