JPH0864638A - Semiconductor device and production thereof - Google Patents

Semiconductor device and production thereof

Info

Publication number
JPH0864638A
JPH0864638A JP20184794A JP20184794A JPH0864638A JP H0864638 A JPH0864638 A JP H0864638A JP 20184794 A JP20184794 A JP 20184794A JP 20184794 A JP20184794 A JP 20184794A JP H0864638 A JPH0864638 A JP H0864638A
Authority
JP
Japan
Prior art keywords
resin
conductive particles
resin layer
semiconductor device
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20184794A
Other languages
Japanese (ja)
Inventor
Minoru Hirai
稔 平井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP20184794A priority Critical patent/JPH0864638A/en
Publication of JPH0864638A publication Critical patent/JPH0864638A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives

Abstract

PURPOSE: To sustain a good electrical connection between a semiconductor device and the wiring of a circuit board even if the ambient temperature increases over the glass transition point of a resin by forming a resin layer containing conductive particles on the protruding electrode of of a semiconductor element. CONSTITUTION: A UV-curing resin layer 4 is formed on a bump 3. The resin layer 4 is formed by dispersing conductive particles 5 of Ag substantially uniformly into a UV-curing resin. An IC bare chip device 1 is covered, on the periphery thereof, with a UV-curing resin paste 6 under a state where the resin layer 4 formed on the bumps touches the wiring 8 formed on a circuit board 7. Subsequently, the resin paste 6 is irradiated with UV rays and cured thus bonding the IC bare chip device 1 to the wiring 8. They are bonded through an effective connection area under a state where the conductive particles 5 in the resin layer 4 are crushed and deformed elastically. This structure can sustain a good electrical connection between the semiconductor device and the wiring formed on the circuit board.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置及びその実
装構造に関し、特にLCDモジュールまたはマルチチッ
プモジュールの回路基板にTAB、フリップチップ法等
を用いて実装されるIC、LSI等のベアチップ部品及
びその実装構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its mounting structure, and more particularly to a bare chip component such as an IC or LSI mounted on a circuit board of an LCD module or a multi-chip module by using TAB, a flip chip method, or the like. Regarding its mounting structure.

【0002】[0002]

【従来の技術】従来、IC、LSI等のベアチップ(樹
脂モールド等を行っていない裸のチップ)を、LCDモ
ジュール、マルチチップモジュール等の回路基板に接続
する方法として、ベアチップ上に設けられた突起電極
(バンプ)を用いるTAB、フリップチップ法がよく知
られている。例えば、フリップチップ法を用いた場合、
図5に示すように、ICベアチップ11は、UV硬化性
等のペースト状の樹脂15を使用して、この下面に形成
されたAuバンプ12を、回路基板13のAl等からな
る配線14上に、電気的に接続して搭載される。上記樹
脂15は、これが硬化する時に体積が収縮して、Auバ
ンプ12と配線14とを互いに引き寄せる方向に内部応
力を加えるので、Auバンプ12と配線14とは圧着さ
れた状態となっている。
2. Description of the Related Art Conventionally, as a method of connecting a bare chip (bare chip not subjected to resin molding, etc.) such as an IC or LSI to a circuit board such as an LCD module or a multi-chip module, a protrusion provided on the bare chip. The TAB and flip chip methods using electrodes (bumps) are well known. For example, when using the flip chip method,
As shown in FIG. 5, the IC bare chip 11 uses a paste resin 15 such as a UV curable resin, and the Au bumps 12 formed on the lower surface of the IC bare chip 11 are formed on the wiring 14 made of Al or the like on the circuit board 13. , Mounted electrically connected. The volume of the resin 15 shrinks when it hardens, and internal stress is applied in the direction in which the Au bump 12 and the wiring 14 are attracted to each other, so that the Au bump 12 and the wiring 14 are in a pressure-bonded state.

【0003】また、図6に示すように、ICベアチップ
11を、異方導電性樹脂ペースト16(樹脂161中に
金属粒子17を分散させたもの)を塗着した配線14上
に、そのバンプ12が所定の配線14と対向するように
押圧し、対向するバンプ12と配線14との間の金属粒
子17の密度を高めることによりこれら金属粒子17同
士が接触して電気的に接続した状態で加熱し、上記異方
導電性樹脂ペースト16を硬化させて搭載することも行
われている。
Further, as shown in FIG. 6, the IC bare chip 11 has bumps 12 formed on wiring 14 coated with an anisotropic conductive resin paste 16 (a resin particle 161 having metal particles 17 dispersed therein). Are pressed so as to face a predetermined wiring 14, and the density of the metal particles 17 between the bumps 12 and the wiring 14 which face each other is increased so that the metal particles 17 come into contact with each other and are electrically connected to each other. However, the anisotropic conductive resin paste 16 is also cured and mounted.

【0004】以上のような2つの方法により、ICベア
チップ11は、回路基板13の配線14上に搭載されて
いる。
The IC bare chip 11 is mounted on the wiring 14 of the circuit board 13 by the above two methods.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記従
来の方法を用いた場合には、次のような問題があった。
まず、図5に示したような、ICベアチップ11をその
バンプ12を樹脂15の硬化により配線14に直接圧着
させて接続させたときには、周囲環境が上記樹脂15の
ガラス転移点温度(Tg)以上となった場合、硬化した
樹脂15が再び流動的になり、樹脂15の内部応力が開
放されて、上記ICベアチップ11の回路基板13に対
する圧接が維持されなくなるのである。その結果、接続
不良を発生してしまうという問題がある。一般に、UV
硬化性樹脂は、そのTgが100℃以下であるために、
100℃を超えると上記接続不良の問題が生じてしま
う。
However, when the above-mentioned conventional method is used, there are the following problems.
First, when the IC bare chip 11 as shown in FIG. 5 is connected by directly pressing the bump 12 to the wiring 14 by curing the resin 15, the surrounding environment is equal to or higher than the glass transition temperature (Tg) of the resin 15. In such a case, the cured resin 15 becomes fluid again, the internal stress of the resin 15 is released, and the pressure contact of the IC bare chip 11 to the circuit board 13 is not maintained. As a result, there is a problem that a poor connection occurs. Generally UV
Since the Tg of the curable resin is 100 ° C. or lower,
If the temperature exceeds 100 ° C., the problem of poor connection will occur.

【0006】また、上記図6に示したような、ICベア
チップ11を異方導電性樹脂ペースト16を用いて回路
基板13に接続するときには、バンプ12−配線14間
において、金属粒子17の密度を高めて金属粒子17同
士を接触させるために、バンプ12を配線14に対して
ある程度大きな力で押圧する必要がある。しかるに、こ
の押圧力が僅かでも小さな力となった場合には、金属粒
子17同士が接触する箇所が少なくなり、これに従って
電気抵抗は大きくなってその近傍の温度は上昇しやすい
状態になる。このため、異方導電性樹脂ペースト16内
において、樹脂161に比して熱膨張率が小さな金属粒
子17は、上記温度上昇に伴う樹脂161の膨張に追い
つけずに、金属粒子17間、金属粒子17と配線14と
の間または金属粒子17とバンプ12との間に隙間が生
じて接触不良をきたしてしまう。従って、ICベアチッ
プ11は、回路基板13に対して電気的接続不良を起こ
しやすくなり、信頼性が著しく低下してしまうという問
題がある。
Further, when the IC bare chip 11 as shown in FIG. 6 is connected to the circuit board 13 using the anisotropic conductive resin paste 16, the density of the metal particles 17 between the bumps 12 and the wirings 14 is reduced. In order to bring the metal particles 17 into contact with each other at a higher height, it is necessary to press the bump 12 against the wiring 14 with a relatively large force. However, when the pressing force is small, even if the force is small, the number of places where the metal particles 17 come into contact with each other decreases, and accordingly the electric resistance increases and the temperature in the vicinity thereof easily rises. Therefore, in the anisotropic conductive resin paste 16, the metal particles 17 having a smaller coefficient of thermal expansion than the resin 161 do not catch up with the expansion of the resin 161 due to the temperature rise, and the metal particles 17 and the metal particles 17 A gap is generated between the wire 17 and the wiring 14 or between the metal particle 17 and the bump 12 to cause poor contact. Therefore, the IC bare chip 11 is prone to electrical connection failure with respect to the circuit board 13, and there is a problem that reliability is significantly reduced.

【0007】本発明は、以上のような状況下で考え出さ
れたもので、半導体装置を樹脂を介して回路基板の配線
上に電気的に接続させる構造において、周囲環境が樹脂
のTg以上の温度となっても半導体装置と回路基板の配
線との電気的接続状態を良好に保持し得る半導体装置及
びその実装構造を提供することを目的とする。
The present invention has been devised under the above circumstances. In a structure in which a semiconductor device is electrically connected to wiring of a circuit board through a resin, the ambient environment is equal to or higher than Tg of the resin. An object of the present invention is to provide a semiconductor device and a mounting structure for the semiconductor device, which can favorably maintain the electrical connection state between the semiconductor device and the wiring of the circuit board even when the temperature rises.

【0008】[0008]

【課題を解決するための手段】この課題を解決するため
に本発明は、半導体素子の突起電極上に、導電性粒子を
含有する樹脂層を設けてなる半導体装置を提供するもの
である。また、本発明は、更に、導電性粒子が、樹脂基
材の表面に金属を被覆してなることを特徴とする上記の
半導体装置を提供するものである。
To solve this problem, the present invention provides a semiconductor device in which a resin layer containing conductive particles is provided on a protruding electrode of a semiconductor element. The present invention further provides the above semiconductor device, wherein the conductive particles are formed by coating the surface of a resin base material with a metal.

【0009】さらに、本発明は、樹脂層中、導電性粒子
が突起電極上面に対向して一粒づつ一層に敷き詰められ
ている上記のいずれかの半導体装置を提供するものであ
る。加えて、本発明は、上記のいずれかの半導体装置
を、その導電性粒子を含有する樹脂層が設けられた突起
電極を該樹脂層を介して回路基板の所定の配線に圧接し
た状態で、突起電極の周囲に樹脂を介在させて上記半導
体装置と回路基板とを固着することを特徴とする半導体
装置の実装構造を提供するものである。
Further, the present invention provides any one of the above semiconductor devices in which conductive particles are spread in a layer in the resin layer so as to face the upper surface of the bump electrode. In addition, the present invention, in any one of the above semiconductor device, in a state in which a protruding electrode provided with a resin layer containing conductive particles is pressed against a predetermined wiring of a circuit board via the resin layer, The present invention provides a mounting structure for a semiconductor device, characterized in that the semiconductor device and the circuit board are fixed to each other with a resin interposed around the protruding electrode.

【0010】上記樹脂層に用いる樹脂としては、UV硬
化性樹脂や熱硬化性樹脂等を用いることが可能であり、
また、樹脂層の厚みとしては、5μm乃至15μm程度
が好ましく、8μm乃至12μm程度がより好ましい。
上記導電性粒子としては、Au、Niまたは 等の金属
を用いることが可能であり、また、その粒径は3μm乃
至10μm程度が好ましく、4μm乃至6μm程度がよ
り好ましい。
As the resin used for the resin layer, a UV curable resin, a thermosetting resin or the like can be used.
The thickness of the resin layer is preferably about 5 μm to 15 μm, more preferably about 8 μm to 12 μm.
As the conductive particles, a metal such as Au, Ni, or the like can be used, and the particle size thereof is preferably about 3 μm to 10 μm, more preferably about 4 μm to 6 μm.

【0011】また、上記樹脂層中の導電性粒子の含有率
は、1%乃至5%程度が好ましく、2%乃至3%程度が
より好ましい。さらに、導電性粒子が、樹脂基材の表面
に金属を被覆してなる場合、樹脂基材としてビニル樹
脂、ポリエステル樹脂等を用いることができ、また、金
属としてNi、Au等を用いることができる。
The content of the conductive particles in the resin layer is preferably about 1% to 5%, more preferably about 2% to 3%. Further, when the conductive particles are formed by coating the surface of a resin base material with a metal, a vinyl resin, a polyester resin or the like can be used as the resin base material, and Ni, Au or the like can be used as the metal. .

【0012】[0012]

【発明の作用及び効果】本発明の半導体装置によれば、
半導体素子の突起電極上に導電性粒子を含有する樹脂層
を設けたので、仮にこの半導体装置を樹脂層を介して回
路基板の配線上に電気的に接続させる場合には、上記樹
脂層が硬化する際に該樹脂層を収縮させる内部応力のみ
で、導電性粒子は若干弾性変形するものの隣接する導電
性粒子に接触した状態となり電気的接続が可能となり、
且つ、必要以上に導電性粒子同士の接触箇所が増えるこ
とがないので、電気抵抗の上昇を押さえることができ
る。すなわち、半導体装置を回路基板の配線に対して外
力を加えることなく適度に導電性粒子同士の接触を図る
ことができるのである。
According to the semiconductor device of the present invention,
Since the resin layer containing conductive particles is provided on the protruding electrode of the semiconductor element, if the semiconductor device is electrically connected to the wiring of the circuit board through the resin layer, the resin layer is hardened. When only the internal stress that causes the resin layer to contract, the conductive particles are slightly elastically deformed but come into contact with the adjacent conductive particles, so that electrical connection becomes possible,
Moreover, since the number of contact points between the conductive particles does not increase more than necessary, it is possible to suppress an increase in electric resistance. That is, the conductive particles can be appropriately brought into contact with each other in the semiconductor device without applying an external force to the wiring of the circuit board.

【0013】従って、仮に半導体装置を上記樹脂層に用
いる樹脂のTg以上の周囲環境下においた場合でも、該
樹脂層はその熱膨張が、弾性変形した導電性粒子が元の
形状に戻る程度に、上記内部応力が開放される程度にと
どまるので、樹脂層内における導電性粒子同士の接触を
維持できるため、通電状態を良好に維持できる。また、
本発明において、上記導電性粒子として、樹脂基材の表
面を金属に被覆したものを用いたときには、上記のよう
に樹脂のTg以上の温度下におかれても、導電性粒子
は、その内部の樹脂基材が周囲の樹脂と熱膨張係数が略
同一もしくは近似であることから、樹脂層の膨張とほと
んど同じように膨張するため、樹脂層内においてより通
電状態を良好に維持できる。
Therefore, even if the semiconductor device is placed in an ambient environment above the Tg of the resin used for the resin layer, the thermal expansion of the resin layer causes the elastically deformed conductive particles to return to their original shape. Since the internal stress is released to the extent that it is possible to maintain contact between the conductive particles in the resin layer, it is possible to maintain a good energized state. Also,
In the present invention, when the resin base material whose surface is coated with a metal is used as the conductive particles, the conductive particles have internal parts even if they are exposed to a temperature not lower than the Tg of the resin as described above. Since the resin base material has a thermal expansion coefficient substantially the same as or similar to that of the surrounding resin, the resin base material expands almost in the same manner as the expansion of the resin layer, so that the electrically conductive state can be better maintained in the resin layer.

【0014】さらに、本発明において、樹脂層中、導電
性粒子を突起電極上面に対向して一粒づつ一層に敷き詰
めた場合には、導電性粒子は上記のように収縮・膨張が
行われても、抵抗値が必要以上に高くなることがない。
加えて、本発明において、半導体装置を、突起電極の周
囲に樹脂を介在させて樹脂層を介して回路基板の所定の
配線に圧着させて上記半導体装置と回路基板とを固着し
たときでも、導電性粒子は、上記周囲の樹脂の収縮・膨
張にかかわらず、導電性粒子同士が良好な接触状態を保
つことが可能であり、半導体装置と回路基板の配線との
電気的接続状態を良好に維持できるのである。
Further, in the present invention, when the conductive particles are laid one by one in the resin layer so as to face the upper surface of the protruding electrode, the conductive particles are contracted and expanded as described above. However, the resistance value does not become higher than necessary.
In addition, in the present invention, even when the semiconductor device is fixed to the predetermined wiring of the circuit board through the resin layer with the resin interposed around the protruding electrode to fix the semiconductor device and the circuit board, The conductive particles can keep the conductive particles in good contact with each other regardless of the contraction / expansion of the surrounding resin, and maintain a good electrical connection between the semiconductor device and the wiring of the circuit board. You can do it.

【0015】[0015]

【実施例】以下、本発明の一実施例を、半導体装置とし
てICベアチップ部品を例にとり、図1乃至図4を参照
しつつ説明するが、本発明がこれらに限定されることは
ない。図1は、ICベアチップ部品を示す要部断面図で
ある。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below by taking an IC bare chip component as a semiconductor device as an example with reference to FIGS. 1 to 4. However, the present invention is not limited to these. FIG. 1 is a sectional view of an essential part showing an IC bare chip component.

【0016】このICベアチップ部品は、略直方体状の
ICベアチップ1と、このICベアチップ1の表面の両
側部(図中の左右両側部)にアルミニウムからなる薄板
状に形成された電極パッド2と、両電極パッド2上にそ
れぞれ形成されたAuからなるバンプ3(突起電極)
と、これら各バンプ3上に形成されたUV硬化性樹脂か
らなる樹脂層4とにより構成される。
This IC bare chip component has a substantially rectangular parallelepiped-shaped IC bare chip 1, and electrode pads 2 formed in a thin plate shape made of aluminum on both sides of the surface of the IC bare chip 1 (both left and right sides in the figure). Bumps 3 (protruding electrodes) made of Au formed on both electrode pads 2 respectively
And a resin layer 4 made of a UV curable resin formed on each of the bumps 3.

【0017】上記樹脂層4は、UV硬化性樹脂内に、A
gからなる導電性粒子5を略均一に分散させた状態とな
っており、また、その厚みは10μm程度のものであ
る。導電性粒子5の粒径は5μm程度である。また上記
バンプ3は、その厚みが15乃至20μm程度のもので
ある。このような構成からなるICベアチップ部品の樹
脂層の形成方法は、例えば次のような方法がある。
The resin layer 4 is formed by coating the UV curable resin with A
The conductive particles 5 made of g are substantially uniformly dispersed, and the thickness thereof is about 10 μm. The particle size of the conductive particles 5 is about 5 μm. The bump 3 has a thickness of about 15 to 20 μm. The method of forming the resin layer of the IC bare chip component having such a structure includes, for example, the following method.

【0018】まず、予め深さ5乃至10μm程度の溝を
有する板状部材を二つ用意し、一方の板状部材の溝内に
UV硬化性のペースト状態の樹脂を充填しておき、他方
の板状部材の溝内に導電性粒子5を充填しておく。そし
て、ICベアチップ部品をそのバンプ3が一方の板状部
材の溝に接近するようにしてバンプ3上に樹脂を転写す
る。
First, two plate-like members each having a groove having a depth of about 5 to 10 μm are prepared in advance, and the groove of one plate-like member is filled with a resin in a UV-curable paste state, and the other is formed. The conductive particles 5 are filled in the grooves of the plate member. Then, the resin is transferred onto the bump 3 of the IC bare chip component so that the bump 3 approaches the groove of one plate member.

【0019】その後に、ICベアチップ1をバンプ3上
の樹脂が他方の板状部材の溝に接近するようにしてバン
プ3上に導電性粒子5を転写する。この場合、樹脂はま
だ固化していないので、導電性粒子5が樹脂内に入り込
んだ状態となる。そして、上記バンプ3上に樹脂及び導
電性粒子5が転写されたICベアチップ1にUV光線を
照射して樹脂を硬化させて、導電性の樹脂層4を形成す
る。
After that, the conductive particles 5 are transferred onto the bumps 3 of the IC bare chip 1 so that the resin on the bumps 3 approaches the groove of the other plate-shaped member. In this case, since the resin has not been solidified yet, the conductive particles 5 enter the resin. Then, the bare IC chip 1 on which the resin and the conductive particles 5 are transferred onto the bumps 3 is irradiated with UV rays to cure the resin and form the conductive resin layer 4.

【0020】斯くして得られるICベアチップ部品の樹
脂層4は、バンプ3上にほぼ均一且つ薄い厚みで形成さ
れることとなる。また、図2に示すように、このICベ
アチップ部品を、そのバンプ3上の樹脂層4を回路基板
7の配線8上に接触させた状態で、その周囲をUV硬化
性の樹脂ペースト6で覆い、しかる後にこの樹脂ペース
ト6へUV光線を照射して硬化させることにより配線8
上に固着する場合には、樹脂層4中の導電性粒子5を押
しつぶし弾性変形させた状態で効果的な接続面積(有効
接触面積)において接続することができる。上記導電性
粒子5の弾性変形量は、上記実施例において1乃至2μ
m程度であるが、これに限定されるものでない。
The resin layer 4 of the IC bare chip component thus obtained is formed on the bumps 3 with a substantially uniform and thin thickness. In addition, as shown in FIG. 2, this IC bare chip component is covered with a UV curable resin paste 6 in the state where the resin layer 4 on the bump 3 is in contact with the wiring 8 of the circuit board 7. After that, the resin paste 6 is irradiated with UV rays to cure the resin paste 6 to form the wiring 8.
When the conductive particles 5 in the resin layer 4 are fixed to the upper side, they can be connected in an effective connection area (effective contact area) while the conductive particles 5 in the resin layer 4 are crushed and elastically deformed. The elastic deformation amount of the conductive particles 5 is 1 to 2 μm in the above embodiment.
However, it is not limited to this.

【0021】本実施例においては、上記導電性粒子5に
Agからなるものを用いているが、これに限定するもの
でなく、Cu等の金属を用いることが可能である。ま
た、上記導電性粒子としては、図3に示すように、例え
ばAg、Cu等の各種金属粒子やビニル樹脂等の樹脂基
材からなるボール9表面にNi、Au等の金属10を被
覆させたもの等を用いることができる。上記ボール9と
して、樹脂層4内の樹脂と同じものを用いる時には、導
電性粒子の熱膨張率が上記樹脂の熱膨張率と同等もしく
は近似することとなるので、熱サイクルによる樹脂の伸
縮に対して導電性粒子の伸縮を追従させることができ、
一層良好な接続を保持することができる。仮に、ボール
9として用いる樹脂が、樹脂層中の導電性粒子のまわり
の樹脂よりも熱膨張率が高い場合は、なお一層、熱サイ
クルによる樹脂の伸縮に対して導電性粒子の伸縮を追従
させることができる。
In the present embodiment, the conductive particles 5 made of Ag are used, but the conductive particles 5 are not limited to this, and a metal such as Cu can be used. As the conductive particles, as shown in FIG. 3, the surface of the ball 9 made of various metal particles such as Ag or Cu or a resin base material such as vinyl resin is coated with a metal 10 such as Ni or Au. The thing etc. can be used. When the same resin as the resin in the resin layer 4 is used as the balls 9, the coefficient of thermal expansion of the conductive particles is equal to or close to the coefficient of thermal expansion of the resin. Can follow the expansion and contraction of conductive particles,
A better connection can be maintained. If the resin used as the balls 9 has a higher coefficient of thermal expansion than the resin around the conductive particles in the resin layer, the expansion and contraction of the conductive particles is further followed by the expansion and contraction of the resin due to the heat cycle. be able to.

【0022】さらに、上記導電性粒子5は、図4に示す
ように、ICベアチップ1のバンプ3上に1個づつ敷き
詰めたような状態で樹脂層4内に形成すれば、この樹脂
層4の特性及び形成状態のばらつきを極めて低減でき
る。この場合は、導電性粒子5の粒子径を、上記板状部
材の溝の深さと同程度もしくはわずかに小さいものを用
いるのが好ましく、このようにすることにより上記板状
部材の溝中に導電性粒子5を一個づつ一段に敷き詰める
ことを容易にできる。
Further, as shown in FIG. 4, if the conductive particles 5 are formed in the resin layer 4 such that they are spread one by one on the bumps 3 of the IC bare chip 1, the conductive particles 5 of the resin layer 4 can be formed. It is possible to significantly reduce variations in characteristics and formation state. In this case, it is preferable to use particles having a particle diameter of the conductive particles 5 that is approximately the same as or slightly smaller than the depth of the groove of the plate-shaped member. It is possible to easily spread the characteristic particles 5 one by one.

【0023】また、本実施例においては、電極パッド2
上に直接バンプ3を形成しているが、これに限定される
ものでなく、電極パッド2の周囲にSiN等からなるパ
ッシベーション層を形成し、さらに、電極パッド2上に
Ti、Pt等からなるバリアメタル層を形成した後に、
該バリアメタル層上にバンプ3を形成してもよい。加え
て、本実施例においては、ICベアチップ部品を用いた
が、これに限定されるものでなく、LSI、LCD等の
ベアチップ部品にも適用可能である。
In the present embodiment, the electrode pad 2
Although the bumps 3 are directly formed on the bumps 3, the present invention is not limited to this, and a passivation layer made of SiN or the like is formed around the electrode pads 2 and further made of Ti, Pt or the like on the electrode pads 2. After forming the barrier metal layer,
The bumps 3 may be formed on the barrier metal layer. In addition, although the IC bare chip component is used in the present embodiment, the present invention is not limited to this, and is also applicable to a bare chip component such as an LSI or LCD.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のICベアチップ部品を示す要部断面図
である。
FIG. 1 is a sectional view of an essential part showing an IC bare chip component of the present invention.

【図2】本発明のICベアチップ部品を、回路基板上に
搭載する様子を説明するための説明図である。
FIG. 2 is an explanatory diagram for explaining how the IC bare chip component of the present invention is mounted on a circuit board.

【図3】本発明のICベアチップ部品に用いる導電性粒
子の変形例を説明する説明図である。
FIG. 3 is an explanatory diagram illustrating a modified example of conductive particles used in the IC bare chip component of the present invention.

【図4】本発明のICベアチップ部品の導電性粒子の配
列状態を説明する説明図である。
FIG. 4 is an explanatory diagram illustrating an arrangement state of conductive particles of the IC bare chip component of the present invention.

【図5】フリップチップ法による接続を説明するための
断面図である。
FIG. 5 is a cross-sectional view for explaining connection by the flip chip method.

【図6】異方導電性樹脂を用いた接続を説明するための
断面図である。
FIG. 6 is a cross-sectional view for explaining a connection using an anisotropic conductive resin.

【符号の説明】[Explanation of symbols]

1 ICベアチップ 2 電極パッド 3 バンプ 4 樹脂層 5 導電性粒子 1 IC Bare Chip 2 Electrode Pad 3 Bump 4 Resin Layer 5 Conductive Particle

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子の突起電極上に、導電性粒子
を含有する樹脂層を設けてなる半導体装置。
1. A semiconductor device in which a resin layer containing conductive particles is provided on a protruding electrode of a semiconductor element.
【請求項2】 前記導電性粒子が、樹脂基材の表面に金
属を被覆してなることを特徴とする請求項1に記載の半
導体装置。
2. The semiconductor device according to claim 1, wherein the conductive particles are formed by coating the surface of a resin base material with a metal.
【請求項3】 前記樹脂層中の導電性粒子が前記突起電
極の上面に対向して一粒づつ一層に敷き詰められている
ことを特徴とする請求項1もしくは請求項2に記載の半
導体装置。
3. The semiconductor device according to claim 1, wherein the conductive particles in the resin layer are laid one by one so as to face the upper surface of the bump electrode.
【請求項4】 請求項1乃至請求項3のいずれかに記載
の半導体装置を、その導電性粒子を含有する樹脂層が設
けられた突起電極を該樹脂層を介して回路基板の所定の
配線に圧接した状態で、突起電極の周囲に樹脂を介在さ
せて前記半導体装置と回路基板とを固着することを特徴
とする半導体装置の実装構造。
4. The semiconductor device according to claim 1, wherein a bump electrode provided with a resin layer containing conductive particles is provided with a predetermined wiring on the circuit board via the resin layer. A mounting structure of a semiconductor device, wherein the semiconductor device and the circuit board are fixed to each other with a resin interposed around the protruding electrode in a state of being pressed against.
JP20184794A 1994-08-26 1994-08-26 Semiconductor device and production thereof Pending JPH0864638A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20184794A JPH0864638A (en) 1994-08-26 1994-08-26 Semiconductor device and production thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20184794A JPH0864638A (en) 1994-08-26 1994-08-26 Semiconductor device and production thereof

Publications (1)

Publication Number Publication Date
JPH0864638A true JPH0864638A (en) 1996-03-08

Family

ID=16447882

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20184794A Pending JPH0864638A (en) 1994-08-26 1994-08-26 Semiconductor device and production thereof

Country Status (1)

Country Link
JP (1) JPH0864638A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014049642A (en) * 2012-08-31 2014-03-17 Nichia Chem Ind Ltd Light-emitting device and manufacturing method therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014049642A (en) * 2012-08-31 2014-03-17 Nichia Chem Ind Ltd Light-emitting device and manufacturing method therefor

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