JPH06333983A - Semiconductor device and its manufacture - Google Patents

Semiconductor device and its manufacture

Info

Publication number
JPH06333983A
JPH06333983A JP11667993A JP11667993A JPH06333983A JP H06333983 A JPH06333983 A JP H06333983A JP 11667993 A JP11667993 A JP 11667993A JP 11667993 A JP11667993 A JP 11667993A JP H06333983 A JPH06333983 A JP H06333983A
Authority
JP
Japan
Prior art keywords
synthetic resin
semiconductor device
particles
electrode
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11667993A
Other languages
Japanese (ja)
Inventor
Toshiaki Takenaka
敏昭 竹中
Shinji Nakamura
眞治 中村
Kunio Kishimoto
邦雄 岸本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11667993A priority Critical patent/JPH06333983A/en
Publication of JPH06333983A publication Critical patent/JPH06333983A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To obtain stable connection without the increment of connection resistance by bonding an aluminum electrode and the bump electrode of a semiconductor element by means of a conductive binder mixed wherein conductive particles are mixed, and then, charging hardening and shrinkable synthetic resin into the periphery of connection between both. CONSTITUTION:Gold bump electrodes 3 about 70mum in height and about 80mum in diameter made on about 150 pieces of electrode pads arranged at the pitches of 150gm on an IC chip 1 and the electrodes 6 made, in the same number and at the same pitches as the electrode pads 2, on the circuit board 5 being the substrate constituting a liquid crystal display, out of aluminum layers about 3000Angstrom in thickness are connected with each other by means of conductive binders 4, and then fillers 7 consisting of hardening and shrinkable synthetic resin are charged between the IC chip 1 and the circuit board 5. Conductive particles consisting of globular nickel particles 8, harder than aluminum and 5mum in average diameter and scale-shaped silver-platinum particles 9 about 1mum in average diameter are mixed in the conductive binder 4.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ICチップ、LSIチ
ップ等の半導体素子を実装した半導体装置およびその製
造方法、特にマイクロバンプ方式により半導体素子をフ
ェースダウンさせて回路基板上の電極と接続して実装す
る製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device on which a semiconductor element such as an IC chip or an LSI chip is mounted, and a method for manufacturing the same, and more particularly, the semiconductor element is faced down by a micro bump method and connected to an electrode on a circuit board. The present invention relates to a manufacturing method for mounting by mounting.

【0002】[0002]

【従来の技術】最近の液晶ディスプレイのような平面型
ディスプレイにあっては、多数の半導体素子を実装する
必要があるので、その実装面積の小型化と効率的使用を
図るため、裸の半導体素子をガラスからなる回路基板上
の端子電極に直付けしている。半導体素子と回路基板の
電極とを電気的に接続する方法としては、半導体素子の
電極パッド上に形成した突起電極を導電性接着剤を用い
て回路基板の電極と接着することにより接続する方法が
従来より知られている。また、液晶ディスプレイなどが
大型化、高精細化してくると、液晶駆動用ICの1チッ
プ当たりの出力数が多くなり、クロックパルス周波数が
高くなるため、配線抵抗や接続抵抗を小さくする取り組
みがなされている。一方、最近では液晶ディスプレイの
電極材料の主流は、インジウム−錫酸化物となって来て
いるが、この電極材料を用いた場合、配線抵抗や接触抵
抗が大きく、電圧降下によって応答速度の低下や正常な
画像表示ができないことがあるため、特に薄膜トランジ
スタを用いた液晶パネルの場合、この現象が見られるた
め、電極材料としてアルミニウムあるいはアルミニウム
を含む合金を用いて低抵抗化を図る動きが現われて来て
いる。
2. Description of the Related Art In a recent flat panel display such as a liquid crystal display, it is necessary to mount a large number of semiconductor elements. Therefore, in order to reduce the mounting area and to use the semiconductor element efficiently, a bare semiconductor element is required. Are directly attached to the terminal electrodes on the circuit board made of glass. As a method for electrically connecting the semiconductor element and the electrode of the circuit board, there is a method of connecting the protruding electrode formed on the electrode pad of the semiconductor element by adhering it to the electrode of the circuit board using a conductive adhesive. Known from the past. Also, as liquid crystal displays and the like become larger and finer, the number of outputs per chip of the liquid crystal driving IC increases and the clock pulse frequency increases, so efforts are made to reduce wiring resistance and connection resistance. ing. On the other hand, recently, the mainstream of the electrode material for liquid crystal displays has been indium-tin oxide, but when this electrode material is used, the wiring resistance and contact resistance are large, and the voltage drop causes a reduction in the response speed. Since this phenomenon is observed especially in the case of a liquid crystal panel using a thin film transistor because normal image display may not be possible, there is a movement to reduce the resistance by using aluminum or an alloy containing aluminum as an electrode material. ing.

【0003】つぎに、上記の半導体素子を回路基板の電
極に直付けする従来の実装方法および実装した半導体装
置について図2および図3を参照して説明する。図2
(a)〜(f)は従来におけるICチップの実装方法の
工程を示したものであり、図3はその実装された半導体
装置の要部断面図である。図において、1はICチップ
で、150μmピッチで配置した約150個の電極パッ
ド2上には高さ約70μm、径約80μmの金からなる
バンプと言われている突起電極3が形成されている。5
は液晶パネルなどの回路基板で、その端部には、ICチ
ップ1の電極パッド2と同数・同ピッチで膜厚が約30
00Åのアルミニウムあるいはアルミニウムを含む合金
からなる電極6が形成されている。10は平均粒径が約
1μmの鱗片状の銀からなる導電粒子11と熱硬化性樹
脂とで構成された導電性接着剤である。12はシリコー
ン系の熱硬化性の樹脂である。13は膜形成ブレード1
4を用いて導電性接着剤10の膜を作成するための支持
体である。
Next, a conventional mounting method for directly mounting the above semiconductor element on an electrode of a circuit board and a mounted semiconductor device will be described with reference to FIGS. 2 and 3. Figure 2
3A to 3F show steps of a conventional IC chip mounting method, and FIG. 3 is a cross-sectional view of essential parts of the mounted semiconductor device. In the figure, reference numeral 1 denotes an IC chip, on which about 150 electrode pads 2 arranged at a pitch of 150 μm are formed with bump electrodes 3 called gold bumps having a height of about 70 μm and a diameter of about 80 μm. . 5
Is a circuit board such as a liquid crystal panel, and the end portion thereof has the same number and pitch as the electrode pads 2 of the IC chip 1 and a film thickness of about 30.
An electrode 6 made of 00Å aluminum or an alloy containing aluminum is formed. Reference numeral 10 is a conductive adhesive composed of conductive particles 11 made of scaly silver having an average particle diameter of about 1 μm and a thermosetting resin. Reference numeral 12 is a silicone thermosetting resin. 13 is a film forming blade 1
4 is a support for forming a film of the conductive adhesive 10 by using No. 4.

【0004】従来のICチップ実装方法は、まず図2
(a)に示すようにICチップ1の上に配置した電極パ
ッド2の上に形成された突起電極3を、図2(b)に示
すように別に用意した支持体13上に膜形成ブレード1
4を用いて形成された膜厚が約25μmの均一な導電性
接着剤10からなる膜に図2(c)に示すように2秒間
浸積し、ICチップ1の突起電極3に図2(d)に示す
ように導電性接着剤10を転写・塗布する。その後、図
2(e)に示すように導電性接着剤10が塗布されたI
Cチップ1を回路基板5の電極6と位置合わせし、つい
でICチップ1の突起電極3に約1kg/mm2 の押圧を加
えて搭載した後、120℃で3時間加熱して導電性接着
剤10を硬化させてICチップ1の突起電極3と回路基
板5の電極6とを接着接続する。そして、図2(f)で
示すようにICチップ1と回路基板5との間隙に液状の
熱硬化性樹脂を注入し、ついで120℃で3時間加熱し
て硬化させ、ICチップ1と回路基板5との間に熱硬化
性樹脂12を形成してICチップ1の実装を完了する。
上記実装方法により得られた半導体装置は、図3に示す
ように、導電性接着剤10中の導電粒子11がICチッ
プ1の電極パッド2に形成された突起電極3と回路基板
5の電極6との表面に接触した状態で両電極3、5間が
接続され、前記接続部位の周辺やICチップ1と回路基
板の間隙には熱硬化性樹脂12が充填されて封止・絶縁
された構造となっている。
The conventional IC chip mounting method is first shown in FIG.
As shown in FIG. 2A, the protruding electrode 3 formed on the electrode pad 2 arranged on the IC chip 1 is provided on the support 13 separately prepared as shown in FIG.
2 is immersed in a film made of a uniform conductive adhesive 10 having a film thickness of about 25 μm formed by using No. 4 for 2 seconds as shown in FIG. The conductive adhesive 10 is transferred and applied as shown in d). After that, as shown in FIG. 2E, the conductive adhesive 10 was applied
The C chip 1 is aligned with the electrode 6 of the circuit board 5, and then the protruding electrode 3 of the IC chip 1 is mounted by applying a pressure of about 1 kg / mm 2 and then heated at 120 ° C. for 3 hours to form a conductive adhesive. 10 is cured and the protruding electrode 3 of the IC chip 1 and the electrode 6 of the circuit board 5 are adhesively connected. Then, as shown in FIG. 2 (f), a liquid thermosetting resin is injected into the gap between the IC chip 1 and the circuit board 5, and then heated at 120 ° C. for 3 hours to be hardened, so that the IC chip 1 and the circuit board 5 are cured. The thermosetting resin 12 is formed between the IC chip 1 and the resin 5, and the mounting of the IC chip 1 is completed.
As shown in FIG. 3, in the semiconductor device obtained by the above mounting method, the conductive particles 11 in the conductive adhesive 10 are formed on the electrode pads 2 of the IC chip 1 and the electrodes 6 of the circuit board 5. A structure in which both electrodes 3 and 5 are connected to each other in a state of being in contact with the surface of and the thermosetting resin 12 is filled and sealed / insulated around the connection portion and in the gap between the IC chip 1 and the circuit board. Has become.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記の
従来の半導体装置においては、回路基板の電極がアルミ
ニウム、あるいはアルミニウムを含む合金で形成されて
いるので、その電極表面には酸化層が形成され易く、し
かも電極表面に固着している導電性接着剤の導電粒子は
回路基板の電極表面に単に接触した状態で固定されてい
るため、アルミニウムあるいはアルミニウムを含む合金
の酸化層を介して接続されることから接続抵抗が大きく
なり、あるいは突起電極と電極との接続が不充分となっ
て性能が安定しないという問題があった。
However, in the above-mentioned conventional semiconductor device, since the electrode of the circuit board is formed of aluminum or an alloy containing aluminum, an oxide layer is easily formed on the electrode surface. Moreover, since the conductive particles of the conductive adhesive adhered to the electrode surface are fixed in a state where they are simply in contact with the electrode surface of the circuit board, they should be connected through the oxide layer of aluminum or an alloy containing aluminum. Therefore, there is a problem that the connection resistance becomes large, or the connection between the protruding electrode and the electrode is insufficient, resulting in unstable performance.

【0006】本発明は上記課題を解決するもので、回路
基板の電極にアルミニウムあるいはアルミニウムを含む
合金を用い、この回路基板の電極と半導体素子の電極と
を導電性接着剤を介して接続した場合でも接続抵抗の増
大がなく安定した接続が得られる半導体装置およびその
製造方法を提供することを目的としている。
The present invention solves the above problems by using aluminum or an alloy containing aluminum for the electrodes of the circuit board, and connecting the electrodes of the circuit board and the electrodes of the semiconductor element through a conductive adhesive. However, it is an object of the present invention to provide a semiconductor device and a method of manufacturing the same that can achieve stable connection without an increase in connection resistance.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
に、本発明の半導体装置においては、回路基板の電極を
アルミニウム、もしくはアルミニウムを含む合金で構成
し、この電極と半導体素子の突起電極とを導電性粒子を
混入した導電性接着剤により接着、接続し、この両電極
接続部の周辺に硬化収縮性の合成樹脂を充填したもので
ある。
In order to achieve the above object, in a semiconductor device of the present invention, an electrode of a circuit board is made of aluminum or an alloy containing aluminum, and this electrode and a protruding electrode of a semiconductor element are provided. Are bonded and connected by a conductive adhesive containing conductive particles, and a hardening shrinkable synthetic resin is filled around the both electrode connecting portions.

【0008】そして、本発明の半導体装置の製造方法に
おいては、半導体素子の突起電極に導電性粒子を混入し
た導電性接着剤を塗布し、上記半導体素子の突起電極と
アルミニウム、もしくはアルミニウムを含む合金からな
る回路基板の電極とを位置合わせして両電極間を導電性
接着剤により接着し、ついでこの両電極接着部の周辺に
硬化収縮性の合成樹脂を注入して硬化させるものであ
る。
In the method of manufacturing a semiconductor device according to the present invention, a conductive adhesive mixed with conductive particles is applied to the protruding electrodes of the semiconductor element, and the protruding electrodes of the semiconductor element and aluminum or an alloy containing aluminum. The electrodes of the circuit board made of (1) are aligned with each other, and the two electrodes are bonded together by a conductive adhesive, and then a curing and shrinkable synthetic resin is injected into the periphery of the both electrode bonding parts to be cured.

【0009】また、硬化収縮性の合成樹脂としては、熱
硬化型、もしくは光硬化型、あるいは熱硬化と光硬化の
併用型のいずれでも使用することができ、収縮力は突起
電極に対して20kg/mm2 以上あることが好ましくさら
に絶縁性粒子を混入すると収縮力が均一に伝達されてよ
り効果的である。
As the curing shrinkable synthetic resin, either a thermosetting type, a photocuring type, or a combination type of thermosetting and photocuring can be used, and the shrinking force is 20 kg against the protruding electrode. / Mm 2 or more is preferable, and if insulating particles are further mixed in, the shrinkage force is evenly transmitted, which is more effective.

【0010】また、導電性接着剤の導電性粒子としては
回路基板の電極素材よりも硬い導電材料からなるものが
好ましくニッケル、ニッケルを含む合金、銀−パラジウ
ム合金の少なくとも一つからなるものであると効果的で
ある。
The conductive particles of the conductive adhesive are preferably made of a conductive material harder than the electrode material of the circuit board, and are preferably made of at least one of nickel, an alloy containing nickel, and a silver-palladium alloy. And is effective.

【0011】さらに、導電性接着剤の導電性粒子の形状
は、鱗片状、球状、もしくはこれらの混合形状が好まし
い。
Further, the shape of the conductive particles of the conductive adhesive is preferably scaly, spherical, or a mixed shape thereof.

【0012】[0012]

【作用】上記のように構成された本発明によれば回路基
板の電極と半導体素子の突起電極とを導電性接着剤で接
着した部分の周辺に充填した合成樹脂が硬化する時に収
縮して収縮力を発生し、この収縮力により上記電極間に
圧縮力がかかるので、回路基板の電極の表面に酸化膜が
形成されていても、導電性接着剤の導電性粒子が酸化膜
を破って電極と接触し、接続抵抗の増大もなく接続を安
定させるように作用する。
According to the present invention constructed as described above, when the synthetic resin filled around the portion where the electrode of the circuit board and the projecting electrode of the semiconductor element are bonded with the conductive adhesive is cured, the resin shrinks and contracts. Since a force is generated and a compressive force is applied between the electrodes due to this contracting force, even if an oxide film is formed on the electrode surface of the circuit board, the conductive particles of the conductive adhesive break the oxide film and , And acts to stabilize the connection without increasing the connection resistance.

【0013】そして、電極間に充分な圧縮力をかけるに
は、合成樹脂の収縮力が突起電極に対して20kg/mm2
以上になるものが好ましく、また均一に収縮力を伝達さ
せるために絶縁性粒子を混入するのが好ましい。
In order to apply a sufficient compressive force between the electrodes, the contracting force of the synthetic resin is 20 kg / mm 2 with respect to the protruding electrodes.
The above is preferable, and it is preferable to mix insulating particles in order to uniformly transmit the contracting force.

【0014】また、導電性接着剤の導電性粒子は、アル
ミニウム、もしくはアルミニウムを含む合金よりも硬い
導電材料で構成すると導電性粒子が回路基板の電極の表
面に形成された酸化膜を破り、さらに電極の表面に圧入
され、より良好な接続が得られるようになり、さらに導
電性粒子の形状を鱗片状、球状にするとより酸化膜が破
れ易く、電極の表面にも圧入され易くなる。
If the conductive particles of the conductive adhesive are made of a conductive material that is harder than aluminum or an alloy containing aluminum, the conductive particles will break the oxide film formed on the surface of the electrode of the circuit board, and It is pressed into the surface of the electrode so that a better connection can be obtained, and when the conductive particles are scale-shaped or spherical, the oxide film is more likely to be broken and pressed into the surface of the electrode.

【0015】[0015]

【実施例】次に、本発明の一実施例について半導体装置
の要部断面図を示した図1を参照して説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the present invention will be described with reference to FIG. 1 which is a sectional view of an essential part of a semiconductor device.

【0016】ICチップ1に150μmピッチで配置し
た約150個の電極パッド2に形成した高さ約70μ
m、径約80μmの金からなる突起電極3と、液晶表示
装置を構成する基板である回路基板5に上記電極パッド
2と同数、同ピッチで膜厚が約3000Åのアルミニウ
ム層で形成した電極6とを導電性接着剤4により接着し
て接続し、ICチップ1と回路基板5との間に硬化収縮
性の合成樹脂からなる充填材7を充填している。
A height of about 70 μ formed on about 150 electrode pads 2 arranged on the IC chip 1 at a pitch of 150 μm.
m, a projection electrode 3 made of gold having a diameter of about 80 μm, and an electrode 6 formed of an aluminum layer having the same number as the electrode pads 2 and a thickness of about 3000 Å on the circuit board 5 which is a substrate constituting the liquid crystal display device. Are bonded and connected by a conductive adhesive 4, and a filling material 7 made of a curing shrinkable synthetic resin is filled between the IC chip 1 and the circuit board 5.

【0017】導電性接着剤4にはアルミニウムより硬く
平均粒径が約5μmの球状のニッケル粒子8と平均粒径
が約1μmの鱗片状の銀−白金合金粒子9からなる導電
粒子が混入されており、硬化収縮性の合成樹脂からなる
充填材7としてはICチップ1の突起電極3に対して2
0kg/mm2 以上の硬化収縮力が得られるように、平均粒
径が約5μmの酸化珪素を50wt%含有したエポキシ
系の熱硬化性樹脂を用い、120℃で3時間加熱して硬
化させた。この半導体装置の接続抵抗値は、従来の半導
体装置が10Ω以上あるのに対し、非常に低く数100
mΩであった。充填材7の硬化収縮力の測定は標準化さ
れた測定方法がないため、以下の簡易的な手法で行っ
た。まず、抵抗値測定が可能なICチップ1を導電性接
着剤4により抵抗測定端子を設けた回路基板5の電極6
に接続して導電性接着剤4を120℃で3時間加熱硬化
させてサンプルを作成した。そして、前記ICチップ1
の裏面側に金属ブロックを乗せ、金属ブロックの中央部
を点加圧しながらICチップ1と回路基板5との接続抵
抗値を測定することで充填材7の硬化収縮力を求めた。
その結果、加圧力に応じて接続抵抗値は小さくなり、加
圧力が20kg/mm2 以上で安定し、この時の接続抵抗値
の減少率と充填材7の硬化後の抵抗減少率がほぼ一致し
ていることが分かった。
The conductive adhesive 4 is mixed with conductive particles composed of spherical nickel particles 8 which are harder than aluminum and have an average particle size of about 5 μm and scaly silver-platinum alloy particles 9 having an average particle size of about 1 μm. As a filling material 7 made of a hardening and contracting synthetic resin, the filling material 7 is 2 with respect to the protruding electrode 3 of the IC chip 1.
An epoxy thermosetting resin containing 50 wt% of silicon oxide having an average particle size of about 5 μm was used to heat and cure at 120 ° C. for 3 hours so that a curing shrinkage force of 0 kg / mm 2 or more was obtained. . The connection resistance value of this semiconductor device is very low as compared with that of the conventional semiconductor device, which is 10Ω or more, and is several hundreds.
It was mΩ. Since there is no standardized measuring method, the curing shrinkage force of the filler 7 was measured by the following simple method. First, the electrode 6 of the circuit board 5 provided with the resistance measuring terminal is mounted on the IC chip 1 capable of measuring the resistance value by the conductive adhesive 4.
And the conductive adhesive 4 was heated and cured at 120 ° C. for 3 hours to prepare a sample. Then, the IC chip 1
The metal block was placed on the back side of the, and the curing shrinkage force of the filling material 7 was obtained by measuring the connection resistance value between the IC chip 1 and the circuit board 5 while applying a point pressure to the central part of the metal block.
As a result, the connection resistance value becomes smaller according to the applied pressure, and the applied pressure becomes stable at 20 kg / mm 2 or more, and the decrease rate of the connection resistance value at this time and the resistance decrease rate of the filling material 7 after curing are almost equal. I found out what I was doing.

【0018】接続部位の周辺やICチップ1と回路基板
5の間隙に充填した合成樹脂の収縮力により導電性接着
剤4に混入されている球状のニッケル粒子8や鱗片状の
銀−白金合金粒子9の一部分が回路基板5の電極6に圧
入されて埋没している。上記のようにして得た半導体装
置について、回路基板5からICチップ1を取り外し
て、接続箇所の表面を顕微鏡観察すると突起電極3に対
向する回路基板5の電極6の表面に酸化層を破った凹部
が数カ所確認された。
Spherical nickel particles 8 or scale-like silver-platinum alloy particles mixed in the conductive adhesive 4 due to the contracting force of the synthetic resin filled around the connection site or in the gap between the IC chip 1 and the circuit board 5. A part of 9 is pressed into the electrode 6 of the circuit board 5 and buried therein. Regarding the semiconductor device obtained as described above, when the IC chip 1 was removed from the circuit board 5 and the surface of the connection portion was observed with a microscope, the oxide layer was broken on the surface of the electrode 6 of the circuit board 5 facing the protruding electrode 3. Several recesses were confirmed.

【0019】なお、本実施例では、充填材7に熱硬化型
樹脂を用いたが、光硬化型樹脂あるいは光硬化と熱硬化
の併用型樹脂を用いても同様の結果を得ており、また、
導電性接着剤4に鱗片状と球状の導電粒子を用いている
が、鱗片状あるいは球状のみからなる導電粒子を用いて
も同様の結果を得ている。
In this embodiment, the thermosetting resin is used as the filler 7, but the same result is obtained by using the photocuring resin or the photocuring / thermosetting resin. ,
Although scale-like and spherical conductive particles are used as the conductive adhesive 4, similar results are obtained by using scale-like or spherical conductive particles.

【0020】さらに、導電粒子には銀−白金合金粒子と
ニッケル粒子の混合物をもちいたが、これら単独であっ
ても同様の結果を得ており、また回路基板5の電極6を
アルミニウムを含む合金で構成した場合も同様の結果が
得られている。
Further, a mixture of silver-platinum alloy particles and nickel particles was used as the conductive particles, but similar results were obtained by using these alone, and the electrode 6 of the circuit board 5 was made of an alloy containing aluminum. Similar results are obtained even when the above configuration is adopted.

【0021】また、上記半導体装置はつぎの様な工程で
製造し、その製造工程は、ICチップ1の電極パッド2
の上に形成された複数の突起電極3に導電性接着剤4を
転写塗布する工程と、回路基板5の上に形成されたアル
ミニウムからなる電極6と前記ICチップ1の突起電極
3との位置合わせする工程と、前記ICチップ1をフェ
イスダウンさせて前記回路基板5の上に加圧圧着させ、
導電性接着剤4を加熱硬化させて前記突起電極3と電極
6とを接着する工程と、前記ICチップ1と回路基板5
との間隙に硬化収縮性の合成樹脂を注入して加熱硬化さ
せる工程とにより構成しているものである。
The above semiconductor device is manufactured by the following process, and the manufacturing process is performed by the electrode pad 2 of the IC chip 1.
The step of transferring and applying the conductive adhesive 4 to the plurality of protruding electrodes 3 formed on the upper surface, and the positions of the electrodes 6 made of aluminum formed on the circuit board 5 and the protruding electrodes 3 of the IC chip 1. A step of aligning the IC chip 1 with the IC chip 1 face down and press-bonding onto the circuit board 5;
A step of heating and curing the conductive adhesive 4 to bond the protruding electrodes 3 and the electrodes 6, and the IC chip 1 and the circuit board 5.
And a process of injecting a curing shrinkable synthetic resin into the gap between the two and curing them by heating.

【0022】以上のように上記実施例によれば、導電性
接着剤4中の導電粒子を充填材7の硬化収縮力すなわち
突起電極3に対して20kg/mm2 以上の圧縮のアルミニ
ウムからなる回路基板5の電極6に圧着させることで回
路基板5の電極6とICチップ1の接続抵抗が小さくな
り性能が安定した半導体装置が得られる。
As described above, according to the above embodiment, the conductive particles in the conductive adhesive 4 are hardened and contracted by the filler 7, that is, a circuit made of aluminum compressed to the protruding electrodes 3 by 20 kg / mm 2 or more. When the electrode 6 of the substrate 5 is pressure-bonded, the connection resistance between the electrode 6 of the circuit board 5 and the IC chip 1 is reduced, and a semiconductor device with stable performance can be obtained.

【0023】[0023]

【発明の効果】本発明は、以上説明したように構成され
ているので、つぎに記載するような効果を奏する。導電
性接着剤を介して接続した半導体素子の突起電極と回路
基板の電極との接続部周辺に充填した硬化収縮性の合成
樹脂の硬化収縮力により、導電性接着剤の導電粒子の一
部が回路基板の電極に圧着され、回路基板の電極の表面
に酸化層が形成されていても回路基板の電極とICチッ
プとの接続抵抗が低くなり、信頼性の高い接続が実現で
き、性能が安定した半導体装置が提供できるものであ
る。
Since the present invention is constructed as described above, it has the following effects. Due to the curing shrinkage force of the curing shrinkable synthetic resin filled around the connection between the protruding electrode of the semiconductor element and the electrode of the circuit board connected via the conductive adhesive, some of the conductive particles of the conductive adhesive are Even if an oxide layer is formed on the surface of the circuit board electrode by pressure bonding to the circuit board electrode, the connection resistance between the circuit board electrode and the IC chip will be low, and highly reliable connection can be realized and the performance will be stable. The semiconductor device described above can be provided.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例における半導体装置の要部断
面図
FIG. 1 is a sectional view of an essential part of a semiconductor device according to an embodiment of the present invention.

【図2】従来における半導体装置の製造工程の概略説明
FIG. 2 is a schematic explanatory view of a conventional semiconductor device manufacturing process.

【図3】従来における半導体装置の要部断面図FIG. 3 is a sectional view of a main part of a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

1 ICチップ 2 電極パッド 3 突起電極 4 導電性接着剤 5 回路基板 6 電極 7 充填材 8 ニッケル粒子 9 銀−白金合金粒子 DESCRIPTION OF SYMBOLS 1 IC chip 2 Electrode pad 3 Protruding electrode 4 Conductive adhesive 5 Circuit board 6 Electrode 7 Filler 8 Nickel particle 9 Silver-platinum alloy particle

Claims (14)

【特許請求の範囲】[Claims] 【請求項1】回路基板の電極をアルミニウム、もしくは
アルミニウムを含む合金で構成し、この電極と半導体素
子の突起電極とを導電性粒子を混入した導電性接着剤に
より接着・接続し、この両電極の接続周辺部に硬化収縮
性の合成樹脂を充填してなる半導体装置。
1. An electrode of a circuit board is made of aluminum or an alloy containing aluminum, and the electrode and a protruding electrode of a semiconductor element are bonded and connected by a conductive adhesive mixed with conductive particles. A semiconductor device in which the peripheral portion of the connection is filled with a curing shrinkable synthetic resin.
【請求項2】回路基板が液晶表示装置の構成部位である
請求項1記載の半導体装置。
2. The semiconductor device according to claim 1, wherein the circuit board is a component of the liquid crystal display device.
【請求項3】硬化収縮性の合成樹脂が熱硬化型合成樹
脂、光硬化型合成樹脂および熱硬化と光硬化の併用型合
成樹脂の群から選ばれた一種の合成樹脂である請求項1
記載の半導体装置。
3. The synthetic resin having a curing shrinkage property is a synthetic resin selected from the group consisting of a thermosetting synthetic resin, a photocuring synthetic resin, and a thermosetting / photocuring combined type synthetic resin.
The semiconductor device described.
【請求項4】硬化収縮性の合成樹脂が絶縁性粒子を含む
樹脂である請求項1又は3記載の半導体装置。
4. The semiconductor device according to claim 1, wherein the curing shrinkable synthetic resin is a resin containing insulating particles.
【請求項5】導電性接着剤の導電性粒子が回路基板の電
極素材よりも硬い導電材料である請求項1記載の半導体
装置。
5. The semiconductor device according to claim 1, wherein the conductive particles of the conductive adhesive are a conductive material harder than the electrode material of the circuit board.
【請求項6】導電性接着剤の導電性粒子がニッケル、ニ
ッケルを含む合金、銀−パラジウム合金の群から選ばれ
た少なくとも一つである請求項1又は5記載の半導体装
置。
6. The semiconductor device according to claim 1, wherein the conductive particles of the conductive adhesive are at least one selected from the group consisting of nickel, an alloy containing nickel, and a silver-palladium alloy.
【請求項7】導電性接着剤の導電性粒子が鱗片状粒子、
球状粒子、およびそれらの混合粒子の群から選ばれた粒
子である請求項1、5又は6のいずれかに記載の半導体
装置。
7. The conductive particles of the conductive adhesive are scaly particles,
7. The semiconductor device according to claim 1, which is a particle selected from the group consisting of spherical particles and mixed particles thereof.
【請求項8】半導体素子の突起電極に、導電性粒子を混
入した導電性接着剤を塗布し、上記半導体素子の突起電
極とアルミニウム、もしくはアルミニウムを含む合金製
の回路基板の電極とを位置合わせして両電極間を導電性
接着剤により接着し、ついでこの両電極の接着部周辺に
硬化収縮性の合成樹脂を注入して硬化させることを特徴
とする半導体装置の製造方法。
8. A conductive adhesive mixed with conductive particles is applied to a protruding electrode of a semiconductor element, and the protruding electrode of the semiconductor element and the electrode of a circuit board made of aluminum or an alloy containing aluminum are aligned with each other. Then, the two electrodes are adhered to each other with a conductive adhesive, and then a curing shrinkable synthetic resin is injected into the periphery of the adhering portion of the two electrodes to cure the semiconductor device.
【請求項9】硬化収縮性の合成樹脂の収縮力が、突起電
極に対して20kg/mm 2 以上である請求項8記載の半導
体装置の製造方法。
9. The shrinkage force of a curing shrinkable synthetic resin is
20kg / mm for pole 2 The above is the semiconductor according to claim 8.
Body device manufacturing method.
【請求項10】硬化収縮性の合成樹脂が熱硬化型合成樹
脂、光硬化型合成樹脂、および熱硬化と光硬化の併用型
合成樹脂の群から選ばれた一種の合成樹脂である請求項
8又は9記載の半導体装置の製造方法。
10. The shrinkable synthetic resin is one kind of synthetic resin selected from the group of thermosetting synthetic resin, photocurable synthetic resin, and combined thermosetting and photocurable synthetic resin. Or a method of manufacturing a semiconductor device according to 9.
【請求項11】硬化収縮性の合成樹脂が絶縁性粒子を含
む樹脂である請求項8ないし10のいずれかに記載の半
導体装置の製造方法。
11. The method of manufacturing a semiconductor device according to claim 8, wherein the curing shrinkable synthetic resin is a resin containing insulating particles.
【請求項12】導電性接着剤の導電性粒子が回路基板の
電極素材よりも硬い導電材料である請求項8記載の半導
体装置の製造方法。
12. The method of manufacturing a semiconductor device according to claim 8, wherein the conductive particles of the conductive adhesive are a conductive material harder than the electrode material of the circuit board.
【請求項13】導電性接着剤の導電性粒子がニッケル、
ニッケルを含む合金、銀−パラジウム合金の群から選ば
れた少なくとも一つの金属である請求項8又は12記載
の半導体装置の製造方法。
13. The conductive particles of the conductive adhesive are nickel,
13. The method for manufacturing a semiconductor device according to claim 8, wherein the semiconductor device is at least one metal selected from the group consisting of an alloy containing nickel and a silver-palladium alloy.
【請求項14】導電性接着剤の導電性粒子が鱗片状粒
子、球状粒子、およびそれらの混合粒子の群から選ばれ
た一種の粒子である請求項8、12又は13のいずれか
に記載の半導体装置の製造方法。
14. The conductive particle of the conductive adhesive is a kind of particle selected from the group of scale-like particles, spherical particles, and mixed particles thereof, according to claim 8, 12, or 13. Manufacturing method of semiconductor device.
JP11667993A 1993-05-19 1993-05-19 Semiconductor device and its manufacture Pending JPH06333983A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11667993A JPH06333983A (en) 1993-05-19 1993-05-19 Semiconductor device and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11667993A JPH06333983A (en) 1993-05-19 1993-05-19 Semiconductor device and its manufacture

Publications (1)

Publication Number Publication Date
JPH06333983A true JPH06333983A (en) 1994-12-02

Family

ID=14693200

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11667993A Pending JPH06333983A (en) 1993-05-19 1993-05-19 Semiconductor device and its manufacture

Country Status (1)

Country Link
JP (1) JPH06333983A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6188127B1 (en) 1995-02-24 2001-02-13 Nec Corporation Semiconductor packing stack module and method of producing the same
JP2002042098A (en) * 2000-07-31 2002-02-08 Hitachi Chem Co Ltd Connection structure of aluminum conductor and electronic part, connection method thereof, ic card using the same, and manufacturing method thereof
KR20030047085A (en) * 2001-12-07 2003-06-18 엘지전선 주식회사 Electrical Connection Method and Electronic Component Using Nickle
KR100591461B1 (en) * 2005-03-04 2006-06-20 (주)실리콘화일 Aluminum electrode junction method of two semiconductor substrate
JP2012156528A (en) * 2012-03-22 2012-08-16 Spansion Llc Laminated type semiconductor device and manufacturing method of laminated type semiconductor device
CN111180318A (en) * 2020-01-06 2020-05-19 贵州振华风光半导体有限公司 Method for improving bonding quality in integrated circuit by using in-situ bonding technology

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6188127B1 (en) 1995-02-24 2001-02-13 Nec Corporation Semiconductor packing stack module and method of producing the same
JP2002042098A (en) * 2000-07-31 2002-02-08 Hitachi Chem Co Ltd Connection structure of aluminum conductor and electronic part, connection method thereof, ic card using the same, and manufacturing method thereof
KR20030047085A (en) * 2001-12-07 2003-06-18 엘지전선 주식회사 Electrical Connection Method and Electronic Component Using Nickle
KR100591461B1 (en) * 2005-03-04 2006-06-20 (주)실리콘화일 Aluminum electrode junction method of two semiconductor substrate
WO2006093386A1 (en) * 2005-03-04 2006-09-08 Siliconfile Technologies Inc. Method of bonding aluminum electrodes of two semiconductor substrates
JP2012156528A (en) * 2012-03-22 2012-08-16 Spansion Llc Laminated type semiconductor device and manufacturing method of laminated type semiconductor device
CN111180318A (en) * 2020-01-06 2020-05-19 贵州振华风光半导体有限公司 Method for improving bonding quality in integrated circuit by using in-situ bonding technology
CN111180318B (en) * 2020-01-06 2023-08-11 贵州振华风光半导体股份有限公司 Method for improving bonding quality in integrated circuit by in-situ bonding technology

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