JPH08306725A - Semiconductor resin sealing method - Google Patents

Semiconductor resin sealing method

Info

Publication number
JPH08306725A
JPH08306725A JP10559695A JP10559695A JPH08306725A JP H08306725 A JPH08306725 A JP H08306725A JP 10559695 A JP10559695 A JP 10559695A JP 10559695 A JP10559695 A JP 10559695A JP H08306725 A JPH08306725 A JP H08306725A
Authority
JP
Japan
Prior art keywords
wire
resin
assembly
semiconductor
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10559695A
Other languages
Japanese (ja)
Inventor
Yoshitsugu Funada
佳嗣 船田
Koji Matsui
孝二 松井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP10559695A priority Critical patent/JPH08306725A/en
Publication of JPH08306725A publication Critical patent/JPH08306725A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Abstract

PURPOSE: To provide a semiconductor resin sealing method in the bonding of a wire to a lead frame or a bonding pad is not deteriorated and the yield is not decreased because of short circuit at the time of resin sealing. CONSTITUTION: When an assembly where the electrode parts of a semiconductor chip are bonded through a connector wire with the forward end part of leads (i.e., inner lead) arranged around the semiconductor chip is subjected to resin sealing, a protective layer is provided on the surface of connector wire in the assembly and then the assembly is resin sealed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の樹脂封止方
法の改良に関し、特に多ピンパッケージを歩留まり良く
製造することができる半導体樹脂封止方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a resin encapsulation method for a semiconductor device, and more particularly to a semiconductor resin encapsulation method capable of manufacturing a multi-pin package with high yield.

【0002】[0002]

【従来の技術】従来の樹脂封止型半導体装置の一般的な
ものは、リードフレーム中央のダイパッド部に半導体素
子を固着し、該半導体素子の電極部とリードフレームの
前記ダイパッド部の周囲に配されたリード(即ちインナ
ーリード)先端分とをコネクタワイヤボンディングした
組立品を樹脂モールドしたものであり、通常金型を用い
てトランスファ成形し、リードフレームの不要部を切断
して製造される。
2. Description of the Related Art A typical conventional resin-encapsulated semiconductor device has a semiconductor element fixed to a die pad portion at the center of a lead frame and is arranged around the electrode portion of the semiconductor element and the die pad portion of the lead frame. This is a resin-molded assembly of connector wires bonded to the ends of the formed leads (that is, inner leads), and is usually manufactured by transfer molding using a die and cutting unnecessary portions of the lead frame.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記従
来技術において、樹脂をトランスファ成形する工程で樹
脂の流れ等の原因によりワイヤが隣接する他のワイヤや
インナーリード等と接触して、ショート不良を生じ易い
という問題がある。
However, in the above-mentioned prior art, in the transfer molding step of the resin, the wire comes into contact with another adjacent wire or inner lead due to the flow of the resin or the like, causing a short circuit defect. There is a problem that it is easy.

【0004】特に大規模集積回路(LSI)における多
ピン化により、チップとインナーリードとの距離が大き
くなる傾向に伴って、ワイヤのスパンの長さを長くする
必要があり、ますますショート不良が発生し易くなって
いる。
In particular, as the number of pins in a large-scale integrated circuit (LSI) increases, the distance between the chip and the inner lead tends to increase, so that it is necessary to increase the span length of the wire. It is easy to occur.

【0005】そのため、ボンディングワイヤを予め絶縁
膜で被覆することが考えられ、例えば特開平2ー285
648号公報等に、絶縁性の高分子樹脂材料で被覆され
たワイヤを用いることによりショート不良を防げること
が提案されている。
Therefore, it may be considered to coat the bonding wire with an insulating film in advance, for example, Japanese Patent Laid-Open No. 2-285.
It is proposed in Japanese Patent Laid-Open No. 648, etc. that a short circuit defect can be prevented by using a wire covered with an insulating polymer resin material.

【0006】しかしながら、高分子樹脂皮膜を有するワ
イヤを用いると、ワイヤとリードフレームもしくはボン
ディングパッドとの接合性が悪くなりやすいという欠点
があった。
However, when a wire having a polymer resin film is used, there is a drawback that the bondability between the wire and the lead frame or the bonding pad tends to deteriorate.

【0007】本発明は上述の点にかんがみてなされたも
ので、ワイヤとリードフレームもしくはボンディングパ
ッドとの接合性を低下させる欠点がなく、しかも樹脂封
止時におけるショート不良による歩留まり低下を起こさ
ない半導体樹脂封止方法を提供することを目的とする。
The present invention has been made in view of the above points, and does not have the drawback of deteriorating the bondability between the wire and the lead frame or the bonding pad, and does not cause a reduction in the yield due to a short circuit during resin sealing. An object is to provide a resin sealing method.

【0008】[0008]

【課題を解決するための手段】上記の目的を達成するた
めに鋭意検討した結果、半導体素子を樹脂封止する前段
階として、高分子樹脂皮膜を有するワイヤを用いて組み
立てる代わりに、組立品のコネクタワイヤ表面に予め保
護層を設けた後、該組立品を樹脂封止することにより、
目的を達成できることが明らかになった。
Means for Solving the Problems As a result of extensive studies to achieve the above object, as a pre-stage of resin-sealing a semiconductor element, instead of using a wire having a polymer resin film for assembly, After providing a protective layer on the surface of the connector wire in advance, by resin-sealing the assembly,
It became clear that the purpose could be achieved.

【0009】すなわち、本発明は半導体チップの電極部
と該半導体チップの周囲に配されたリード(すなわちイ
ンナーリード)先端部とをコネクタワイヤでワイヤボン
ディングされた組立品を樹脂封止する際、該組立品のコ
ネクタワイヤ表面に予め保護層を設けた後、樹脂封止す
ることを特徴とする。
That is, according to the present invention, when an electrode assembly of a semiconductor chip and a lead (that is, an inner lead) tip portion arranged around the semiconductor chip are wire-bonded with a connector wire, the assembly is resin-sealed. It is characterized in that a connector layer is preliminarily provided with a protective layer on the surface of the connector wire and then resin is sealed.

【0010】また、本発明は前記表面保護層が高分子薄
膜であることを特徴とする。
Further, the present invention is characterized in that the surface protective layer is a polymer thin film.

【0011】また、本発明は前記高分子薄膜が気相重合
で形成されることを特徴とする。
The present invention is also characterized in that the polymer thin film is formed by gas phase polymerization.

【0012】次に本発明をさらに詳細に説明する。Next, the present invention will be described in more detail.

【0013】本発明の樹脂封止方法が適用される半導体
装置は、半導体チップの電極部と該チップの周囲に配さ
れたリード(すなわちインナーリード)先端部とをコネ
クタワイヤでワイヤボンディングされた構造のものであ
る。具体的には前述したように、リードフレーム中央の
ダイパット部に半導体素子を固着し、該半導体素子の電
極部とリードフレームの前記ダイパッド部の周囲に配さ
れたリード(すなわちインナーリード)先端部とをコネ
クタワイヤでワイヤボンディングした構造のものが一般
的であるが、ワイヤボンディングされた構造であれば、
上記構造には限定されない。樹脂封止方法としては、ト
ランスファ成形に最も効果があるが、通常の液状樹脂ポ
ッティング等を行うこともできる。
A semiconductor device to which the resin sealing method of the present invention is applied has a structure in which an electrode portion of a semiconductor chip and a tip of a lead (that is, an inner lead) arranged around the chip are wire-bonded with a connector wire. belongs to. Specifically, as described above, the semiconductor element is fixed to the die pad portion in the center of the lead frame, and the electrode portion of the semiconductor element and the tip portion of the lead (that is, the inner lead) arranged around the die pad portion of the lead frame, It is common for the structure to be wire-bonded with a connector wire, but if the structure is wire-bonded,
The structure is not limited to the above. The most effective resin sealing method is transfer molding, but ordinary liquid resin potting or the like can also be performed.

【0014】上記構造の組立体のコネクタワイヤの保護
層としては、高分子樹脂皮膜が好ましい。コネクタワイ
ヤに高分子樹脂皮膜を形成する際、コネクタワイヤのみ
に該皮膜を形成する必然性はない。すなわち、コネクタ
ワイヤに該皮膜を形成する際に、半導体チップ表面に同
時に形成されても差し支えない。
A polymer resin film is preferable as the protective layer for the connector wire of the assembly having the above structure. When forming the polymer resin film on the connector wire, it is not necessary to form the film only on the connector wire. That is, when the coating is formed on the connector wire, it may be formed on the surface of the semiconductor chip at the same time.

【0015】該皮膜の形成方法としては、特に限定され
ない。例えば、プラズマ重合、蒸着重合や特定のケテン
アセタール蒸気を用いた無触媒的重合等の気相重合法、
シランカップリング剤等の表面処理溶液浸漬後熱処理等
による重合膜の形成法が挙げられる。該皮膜の厚さは、
厚ければ厚いほど絶縁性の点では優れているが、析出速
度が遅いか、または厚膜化が困難である。そのため、適
切な厚さとしては、0.01〜1μm、さらに好ましく
は0.02〜0.8μmである。0.01μm未満で
は、耐電圧が悪く好ましくない。
The method for forming the film is not particularly limited. For example, plasma polymerization, vapor phase polymerization, vapor phase polymerization methods such as non-catalytic polymerization using a specific ketene acetal vapor,
A method for forming a polymer film by heat treatment after immersion in a surface treatment solution such as a silane coupling agent may be mentioned. The thickness of the film is
The thicker the film, the better the insulating property, but the deposition rate is slow or it is difficult to form a thick film. Therefore, the suitable thickness is 0.01 to 1 μm, and more preferably 0.02 to 0.8 μm. If it is less than 0.01 μm, the withstand voltage is poor and it is not preferable.

【0016】プラズマ重合においては、使用するモノマ
ーガスは特に限定されず、供給する放電電力を調整すれ
ば、分子鎖間が橋かけした網目状高分子が形成され、耐
熱性、耐薬品性にも優れた膜が形成できる。
In the plasma polymerization, the monomer gas to be used is not particularly limited, and if the discharge power supplied is adjusted, a network polymer in which the molecular chains are bridged is formed, and the heat resistance and chemical resistance are also improved. An excellent film can be formed.

【0017】蒸着重合は一般的に縮重合性のある2種以
上のモノマーを別々に蒸着させた後、加熱して重縮合は
進行し、芳香族ポリアミド、ポリ尿素、ポリウレタン等
が重合できる。一例としてテレフタル酸クロリドと4、
4´ージアミノジフェニルエーテルにより芳香族ポリア
ミドを重合する場合、100℃程度で真空下での脱塩酸
により重縮合が進行する。
In vapor deposition polymerization, generally, two or more kinds of polycondensable monomers are vapor-deposited separately, and then heated to cause polycondensation, whereby aromatic polyamide, polyurea, polyurethane and the like can be polymerized. As an example, terephthalic acid chloride and 4,
When an aromatic polyamide is polymerized with 4'-diaminodiphenyl ether, polycondensation proceeds by dehydrochlorination under vacuum at about 100 ° C.

【0018】一方、一般的に化1で表される置換基を有
さない環状ケテンアセタールを用いた無触媒的重合は、
5ないし6員環の環状ケテンアセタール、即ち2ーメチ
レンー1、3ージオキソラン、2ーメチレンー1、3ー
ジオキサンを用いた場合に、金属表面で重合性良く、耐
溶剤性にも優れた重合膜が生成することが報告されてい
る。
On the other hand, the non-catalytic polymerization using a cyclic ketene acetal having no substituent, which is generally represented by Chemical Formula 1, is
When a 5- or 6-membered cyclic ketene acetal, that is, 2-methylene-1,3-dioxolane, 2-methylene-1,3-dioxane is used, a polymer film having good polymerizability on the metal surface and excellent solvent resistance is formed. Has been reported.

【0019】[0019]

【化1】 シランカップリング剤の重合層を形成する方法として
は、シランカップリング剤の0.5〜5%程度の溶液中
にコネクトワイヤ部あるいは組立体を浸漬後熱処理する
ことにより形成される。0.5%より薄いと、処理効果
が不十分であり、一方5%より濃い場合、処理効果はそ
れ以上には上がらないのみならず、むしろシランカップ
リング剤自体の凝集等により均一な膜が得られない。ま
た、コスト高にもなり好ましくない。用いる溶媒として
は、水、有機溶剤が使用できるが、水気を嫌う場合は、
揮発性の比較的高い疎水性溶媒、具体的にはヘキサン、
シクロヘキサン等を用いると良い。
Embedded image As a method of forming the polymerized layer of the silane coupling agent, the connect wire portion or the assembly is immersed in a solution of about 0.5 to 5% of the silane coupling agent and then heat-treated. If it is less than 0.5%, the treatment effect is insufficient. On the other hand, if it is more than 5%, not only does the treatment effect not increase, but rather a uniform film is formed due to aggregation of the silane coupling agent itself. I can't get it. Further, the cost is increased, which is not preferable. As the solvent to be used, water or an organic solvent can be used, but if water is disliked,
A relatively volatile hydrophobic solvent, specifically hexane,
It is preferable to use cyclohexane or the like.

【0020】なお、均一な膜を形成するために有利な気
相重合法が好適である。
The gas phase polymerization method, which is advantageous for forming a uniform film, is suitable.

【0021】[0021]

【作用】以上のように、半導体チップの電極部と該半導
体チップの周囲に配されたリード(すなわちインナーリ
ード)先端部とをコネクタワイヤでワイヤボンディング
された組立品を樹脂封止する際、該組立品のコネクタワ
イヤ表面に予め保護層を設けた後、樹脂封止することに
より、ワイヤとリードフレームもしくはボンディングパ
ットとの接合性を低下させる欠点がなく、しかも樹脂封
止時におけるショート不良による歩留まり低下を起こさ
ない。
As described above, when resin-sealing the assembly in which the electrode portion of the semiconductor chip and the tip of the lead (that is, the inner lead) arranged around the semiconductor chip are wire-bonded with the connector wire, By providing a protective layer in advance on the connector wire surface of the assembled product and then resin-sealing, there is no defect that reduces the bondability between the wire and the lead frame or the bonding pad, and the yield due to short-circuit defects during resin sealing Does not cause a drop.

【0022】[0022]

【実施例】以下、本発明の実施例を説明する。なお、本
発明はこれらの実施例に限定されるものでない。 (実施例1)リードフレーム中央のダイパット部(8m
m角)に、半導体素子(7mm角、60ピンQFP)を
固着し、該半導体素子の電極部とリードフレームの前記
ダイパッド部の周囲に配されたリード(すなわちインナ
ーリード)先端部をコネクタワイヤボンディング(ワイ
ヤ長3mm)する。該組立体の所定リード部分をカバー
フィルムで覆った後、これをプラズマ重合装置中にセッ
トし、チャンバー内を減圧する。モノマーガスとしてエ
タンをガス流量50STPml/min、ガス圧力20
0Paでチャンバー内に導入し、13.56MHz、8
0Wattsで連続放電する。この際、コネクトワイヤ
表面にもプラズマ重合膜が生成する。この際膜厚は、概
ね0.1μmとする。重合終了後、該サンプルを取り出
し、カバーフィルムを除去する。
Embodiments of the present invention will be described below. Note that the present invention is not limited to these examples. (Example 1) The die pad part (8 m
A semiconductor element (7 mm square, 60-pin QFP) is fixed to the m-square), and the tip of the lead (that is, inner lead) arranged around the electrode portion of the semiconductor element and the die pad portion of the lead frame is connector wire bonded. (Wire length 3 mm). After covering a predetermined lead portion of the assembly with a cover film, the cover film is set in a plasma polymerization apparatus and the pressure in the chamber is reduced. Ethane as a monomer gas, gas flow rate 50 STPml / min, gas pressure 20
Introduced into the chamber at 0 Pa, 13.56 MHz, 8
It discharges continuously at 0 Watts. At this time, a plasma polymerized film is also formed on the surface of the connect wire. At this time, the film thickness is approximately 0.1 μm. After completion of the polymerization, the sample is taken out and the cover film is removed.

【0023】次いで、トランスファ成形機に上記サンプ
ルをセットし、180℃でクレゾールノボラック型エポ
キシ樹脂を封止した後、175℃で6時間本硬化させ
た。
Next, the above sample was set in a transfer molding machine, and a cresol novolac type epoxy resin was sealed at 180 ° C., followed by full curing at 175 ° C. for 6 hours.

【0024】得られたパッケージは、ワイヤショート等
電気的不良は認められなかった。 (実施例2)実施例1で用いた半導体素子とリードとの
組立体を減圧気化装置内にセットし、該装置内に6員環
の2ーメチレンー1、3ージオキサンを蒸気として、5
0℃、300mmHgの雰囲気下で30分間接触させ
た。この際、減圧気化装置内壁には、蒸気のケテンアセ
タールが接触して重合するのを防止するため、3ーアミ
ノプロピルトリメトキシシラン処理されている。この
際、リードの所定部分は、実施例1と同様にカバーして
おく。重合膜は、コネクタワイヤおよび露出リード部分
に優先的に生成する。この際、膜厚は0.07μmとす
る。
No electrical defects such as wire shorts were found in the obtained package. (Example 2) The assembly of the semiconductor element and the lead used in Example 1 was set in a reduced pressure vaporizer, and 6-membered 2-methylene-1,3-dioxane was used as a vapor in the device.
Contact was performed for 30 minutes in an atmosphere of 0 ° C. and 300 mmHg. At this time, the inner wall of the reduced pressure vaporizer is treated with 3-aminopropyltrimethoxysilane in order to prevent vapor ketene acetal from contacting and polymerizing. At this time, a predetermined portion of the lead is covered as in the first embodiment. Polymeric films preferentially form on the connector wires and exposed lead portions. At this time, the film thickness is 0.07 μm.

【0025】カバーを除去した上記サンプルを、実施例
1と同様にトランスファ成形により封止した。
The sample with the cover removed was sealed by transfer molding in the same manner as in Example 1.

【0026】得られたパッケージは、コネクタワイヤ同
士の接触による電気的ショート不良が認められなかっ
た。 (比較例1)実施例1および実施例2において、重合処
理を行わない以外は全く同様の工程、材料を用いてパッ
ケージを成形した。
In the obtained package, no electrical short circuit failure due to contact between connector wires was observed. (Comparative Example 1) A package was formed by using the same steps and materials as in Example 1 and Example 2 except that the polymerization treatment was not performed.

【0027】得られたパッケージは、コネクタワイヤ同
士の接触による電気的ショート不良が認められた。
In the obtained package, an electrical short circuit failure was recognized due to the contact between the connector wires.

【0028】[0028]

【発明の効果】以上説明したように本発明によれば、半
導体チップの電極部と該半導体チップの周囲に配された
リード(すなわちインナーリード)先端部とをコネクタ
ワイヤでワイヤボンディングされた組立品を樹脂封止す
る際、該組立品のコネクタワイヤ表面に予め保護層を設
けた後、樹脂封止することにより、ワイヤとリードフレ
ームもしくはボンディングパットとの接合性を低下させ
る欠点がないため、樹脂封止時におけるショート不良に
よる歩留まり低下を抑制することができる。
As described above, according to the present invention, an assembly in which the electrode portion of the semiconductor chip and the tip of the lead (ie, inner lead) arranged around the semiconductor chip are wire-bonded with a connector wire. When the resin is sealed with a resin, there is no drawback that the bondability between the wire and the lead frame or the bonding pad is deteriorated by providing a protective layer on the surface of the connector wire of the assembly in advance and then sealing the resin. It is possible to suppress a decrease in yield due to a short circuit defect during sealing.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体チップの電極部と該半導体チップ
の周囲に配されたリード先端部とをコネクタワイヤでワ
イヤボンディングされた組立品を樹脂封止する際、該組
立品のコネクタワイヤ表面に予め保護層を設けた後、樹
脂封止することを特徴とする半導体樹脂封止方法。
1. When resin-sealing an assembly in which an electrode portion of a semiconductor chip and a lead tip portion arranged around the semiconductor chip are wire-bonded with a connector wire, the surface of the connector wire of the assembly is previously sealed. A method for encapsulating a semiconductor resin, which comprises encapsulating with a resin after providing a protective layer.
【請求項2】 前記表面保護層が高分子薄膜であること
を特徴とする請求項1に記載の半導体樹脂封止方法。
2. The method for encapsulating a semiconductor resin according to claim 1, wherein the surface protective layer is a polymer thin film.
【請求項3】 前記高分子薄膜が気相重合で形成される
ことを特徴とする請求項2に記載の半導体樹脂封止方
法。
3. The method for encapsulating a semiconductor resin according to claim 2, wherein the polymer thin film is formed by gas phase polymerization.
JP10559695A 1995-04-28 1995-04-28 Semiconductor resin sealing method Pending JPH08306725A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10559695A JPH08306725A (en) 1995-04-28 1995-04-28 Semiconductor resin sealing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10559695A JPH08306725A (en) 1995-04-28 1995-04-28 Semiconductor resin sealing method

Publications (1)

Publication Number Publication Date
JPH08306725A true JPH08306725A (en) 1996-11-22

Family

ID=14411888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10559695A Pending JPH08306725A (en) 1995-04-28 1995-04-28 Semiconductor resin sealing method

Country Status (1)

Country Link
JP (1) JPH08306725A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06216183A (en) * 1992-12-10 1994-08-05 Internatl Business Mach Corp <Ibm> Constituent of ic chip and its preparation

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06216183A (en) * 1992-12-10 1994-08-05 Internatl Business Mach Corp <Ibm> Constituent of ic chip and its preparation

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