JPH08298356A - Printed wiring board - Google Patents
Printed wiring boardInfo
- Publication number
- JPH08298356A JPH08298356A JP10328495A JP10328495A JPH08298356A JP H08298356 A JPH08298356 A JP H08298356A JP 10328495 A JP10328495 A JP 10328495A JP 10328495 A JP10328495 A JP 10328495A JP H08298356 A JPH08298356 A JP H08298356A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- wiring board
- printed wiring
- electrode
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/361—Assembling flexible printed circuits with other printed circuits
- H05K3/363—Assembling flexible printed circuits with other printed circuits by soldering
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、親基板となるプリント
配線板に、ハンダボール等を用いて表面実装可能な半導
体装置に用いられるプリント配線板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board used for a semiconductor device which can be surface-mounted by using a solder ball or the like on a printed wiring board which is a parent board.
【０００２】[0002]
【従来の技術】従来の半導体装置は、半導体チップをリ
ードフレーム上に搭載し、樹脂封止を行った後、リード
を曲げ加工するというものである。例えば図３に示すよ
うな形状のもので、半導体チップが実装され、樹脂封止
され、封止樹脂３１からリード３２が四方向に延在して
いるものであり、ＱＦＰと呼ばれており、親基板となる
プリント配線板（以下単に親基板という）に実装する際
に、表面実装が可能である。しかし、このような半導体
装置では、リード本数が増加すると共に、パッケージが
大型化するという欠点がある。大型化を避けるために、
リードのピッチを狭くするということが行われ、近年で
は、リードのピッチが０．４ｍｍ、あるいはさらに狭い
ものも用いられている。2. Description of the Related Art A conventional semiconductor device is one in which a semiconductor chip is mounted on a lead frame, resin is sealed, and then the leads are bent. For example, it has a shape as shown in FIG. 3, is mounted with a semiconductor chip, is resin-sealed, and has leads 32 extending in four directions from a sealing resin 31, which is called QFP. Surface mounting is possible when mounting on a printed wiring board (hereinafter simply referred to as a parent board) serving as a parent board. However, such a semiconductor device has drawbacks that the number of leads increases and the package becomes large. In order to avoid upsizing,
The lead pitch has been narrowed, and in recent years, a lead pitch of 0.4 mm or even narrower has been used.
【０００３】ところが、リードのピッチが狭くなるにつ
れ、リードの変形が生じやすくなるという問題があり、
またプリント配線板に実装する際に隣接するリードやプ
リント配線板のパッドの間で、ハンダブリッジが生じや
すくなり、実装が行いにくくなるという問題があった。However, there is a problem in that the lead is likely to be deformed as the lead pitch becomes narrower.
Further, when mounting on a printed wiring board, there is a problem that solder bridges easily occur between adjacent leads and pads of the printed wiring board, which makes mounting difficult.
【０００４】そこで、プリント配線板上の一方の面に半
導体チップを搭載し、親基板との接続面となる他方の面
にハンダボールを形成し、親基板上に実装するボールグ
リッドアレー（ＢＧＡ）と呼ばれる技術が提案されてい
る。例えば、図４に示すようなもので、ガラス−エポキ
シ等の材料からなる絶縁基板４１上の一方の面に半導体
チップ搭載部４２が形成され、半導体チップ搭載部には
銀ペースト等の接着剤４３を介して、半導体チップ４４
が搭載され、半導体チップと半導体チップ接続用電極４
５が、金線等からなるボンディングワイヤ４６を用いて
接続されている。そして、配線４７が半導体チップ接続
用電極４５から連続的に形成されている。配線４７は基
板周囲部まで配線された後、他方の面に形成された配線
４８とスルーホール４９を介して接続されている。そし
て、前記他方の面に形成された配線４８は、格子状に形
成された親基板接続用電極５０に接続されている。そし
て、親基板接続用電極上にはハンダボール５１が形成さ
れている。Therefore, a semiconductor chip is mounted on one surface of a printed wiring board, solder balls are formed on the other surface which is a connection surface with a mother board, and a ball grid array (BGA) is mounted on the mother board. The technique called is proposed. For example, as shown in FIG. 4, a semiconductor chip mounting portion 42 is formed on one surface of an insulating substrate 41 made of a material such as glass-epoxy, and an adhesive 43 such as silver paste is formed on the semiconductor chip mounting portion. Through the semiconductor chip 44
Is mounted, and the semiconductor chip and electrode 4 for connecting the semiconductor chip
5 are connected using a bonding wire 46 made of a gold wire or the like. The wiring 47 is continuously formed from the semiconductor chip connecting electrode 45. The wiring 47 is wired to the peripheral portion of the substrate and then connected to the wiring 48 formed on the other surface through the through hole 49. The wiring 48 formed on the other surface is connected to the parent substrate connecting electrode 50 formed in a grid pattern. A solder ball 51 is formed on the parent board connecting electrode.
【０００５】なお、両面の配線４７、４８等プリント配
線板の両面は保護層（ソルダーレジスト）５２によっ
て、覆われている。そして、半導体チップ搭載面は、半
導体チップおよびワイヤボンディング部等の主要部が、
封止樹脂５３によって保護されている。そして、半導体
チップ搭載部４２は、配線と同材料の銅からなっている
が、特に半導体チップ搭載部として、銅層を設ける必要
性はない。この例では、半導体チップ搭載部が銅からな
り、放熱用スルーホール５２を通じて、親基板接続用電
極５４に接続されており、その上にはハンダボール５５
が設けられている。この例では、半導体チップ搭載部４
２、放熱用スルーホール５２、親基板接続用電極５４、
ハンダボール５５は、放熱のために設けられており、親
基板に効率的に放熱することが可能となっている。Both sides of the printed wiring board such as the wirings 47 and 48 on both sides are covered with a protective layer (solder resist) 52. On the semiconductor chip mounting surface, the main parts such as the semiconductor chip and the wire bonding part are
It is protected by the sealing resin 53. The semiconductor chip mounting portion 42 is made of copper, which is the same material as the wiring, but it is not necessary to provide a copper layer as the semiconductor chip mounting portion. In this example, the semiconductor chip mounting portion is made of copper, and is connected to the parent board connecting electrode 54 through the heat dissipation through hole 52, and the solder ball 55 is provided thereon.
Is provided. In this example, the semiconductor chip mounting portion 4
2, heat dissipation through hole 52, parent board connection electrode 54,
The solder balls 55 are provided for heat dissipation, and can efficiently dissipate heat to the parent board.
【０００６】結果的には、ＢＧＡはプリント配線板５６
に半導体チップが搭載され、ワイヤボンディングされ、
さらに樹脂封止され、また親基板との接続面にはハンダ
ボールが設けられた半導体装置ということができる。ま
た、上記ＢＧＡを親基板接続面側から見た図が、図５で
ある。絶縁基板４１に、親基板接続用電極およびハンダ
ボール５１が、格子状に形成されている。なお、配線４
８は図では省略されている。放熱用スルーホール５２の
周囲には、銅層５７が設けられ、親基板接続用電極と接
続されている。そして、親基板接続用電極上にはハンダ
ボール５５が形成されている。また、周囲にはスルーホ
ール４９が設けられている。As a result, the BGA has a printed wiring board 56.
The semiconductor chip is mounted on, wire bonded,
Further, it can be said that the semiconductor device is resin-sealed and has solder balls provided on the connection surface with the parent substrate. Further, FIG. 5 is a view of the BGA viewed from the side of the parent board connecting surface. The parent board connecting electrodes and solder balls 51 are formed in a grid pattern on the insulating board 41. Wiring 4
8 is omitted in the figure. A copper layer 57 is provided around the heat dissipation through-hole 52 and is connected to the parent board connecting electrode. Then, a solder ball 55 is formed on the parent board connecting electrode. Further, a through hole 49 is provided around the periphery.
【０００７】この方法によれば、親基板上に表面実装が
可能であり、また、格子上に電極を設けることが可能で
あるため、ＱＦＰのように各端子間のピッチを微細化す
ることなく、多ピン化が可能となる。ＢＧＡは、複数の
半導体チップ、抵抗等の部品を搭載することも可能であ
り、より高密度実装が可能となる。また、ＢＧＡは用い
られているプリント配線板の材質を親基板と同材質とす
ることにより、実装時等に熱が加わった場合でも、親基
板とＢＧＡ用プリント配線板の熱膨張係数が等しいた
め、剥離等の問題が生じにくい。According to this method, surface mounting can be performed on the main substrate and electrodes can be provided on the grid, so that the pitch between the terminals is not made finer as in the QFP. It is possible to increase the number of pins. The BGA can also be mounted with a plurality of components such as semiconductor chips and resistors, which enables higher density mounting. Further, in the BGA, the printed wiring board used is made of the same material as the parent board so that the parent board and the BGA printed wiring board have the same coefficient of thermal expansion even when heat is applied during mounting. Problems such as peeling are unlikely to occur.
【０００８】[0008]
【発明が解決しようとする課題】しかし、上述したよう
なＢＧＡでは、次のような問題がある。即ち、半導体チ
ップ搭載面側の配線と、親基板との接続面側の電極との
間を接続するためにスルーホールを設けることが必要と
なる。そのため、プリント配線板の周囲にスルーホー
ル形成のためのスペースが必要となり、プリント配線板
が大型化する。ドリル、メッキ工程が必要となり、工
程が複雑化し、製造コストが増す。また、ドリルの位置
精度には限界があり、信頼性が低下する。高密度化の
ためにはスルーホールの小径化が必要となるが、小径化
するにつれ製造コストが増し、また信頼性も低下する。
また、メッキ厚のばらつきが生じることは避けられず、
スルーホールの小径化には限度があり、従って高密度化
に限度がある。However, the above-mentioned BGA has the following problems. That is, it is necessary to provide a through hole for connecting between the wiring on the semiconductor chip mounting surface side and the electrode on the connection surface side with the parent substrate. Therefore, a space for forming a through hole is required around the printed wiring board, and the printed wiring board becomes large. A drill and plating process are required, which complicates the process and increases the manufacturing cost. Further, there is a limit to the positional accuracy of the drill, which reduces reliability. To increase the density, it is necessary to reduce the diameter of the through hole, but as the diameter decreases, the manufacturing cost increases and the reliability also decreases.
In addition, it is unavoidable that the plating thickness varies,
There is a limit to reducing the diameter of the through hole, and therefore, there is a limit to increasing the density.
【０００９】即ち、小型で、高信頼性で、低コストな半
導体装置を得るためには、スルーホールを形成しなけれ
ばならない構造では限界があった。また、ガラス−エポ
キシ基板等のガラスクロスを含んだ材料を絶縁板として
用いる場合には、ガラスクロスの目の凹凸によって、プ
リント配線板の平滑性に欠けるという問題もあった。ハ
ンダボールを用いて親基板との接続を行う場合には、プ
リント配線板の平滑性は非常に重要で、平滑性が高くな
いと接続不良となる恐れがあった。That is, in order to obtain a semiconductor device which is small in size, highly reliable, and low in cost, there is a limit in the structure in which the through hole has to be formed. Further, when a material including a glass cloth such as a glass-epoxy substrate is used as the insulating plate, there is a problem that the printed wiring board lacks in smoothness due to unevenness of the eyes of the glass cloth. When a solder ball is used to connect to the parent board, the smoothness of the printed wiring board is very important, and if the smoothness is not high, there is a risk of connection failure.
【００１０】本発明は、親基板にハンダボール等の手段
を用いて表面実装を行うことが可能な半導体装置に用い
られるプリント配線板において、小型化が可能で、高い
信頼性を有し、さらに低コストであり、また平滑性も高
いプリント配線板を得ることを目的とする。According to the present invention, a printed wiring board used in a semiconductor device capable of being surface-mounted by using a means such as a solder ball on a mother board can be miniaturized and has high reliability. An object is to obtain a printed wiring board that is low in cost and has high smoothness.
【００１１】[0011]
【課題を解決するための手段】請求項１記載の発明は、
角部を有し、フレキシブルな材料からなる絶縁基板の片
面に、少なくとも一つの半導体チップが搭載可能な半導
体チップ搭載部と、前記半導体チップ搭載部の周囲に設
けられた半導体チップ接続用電極と、前記絶縁基板の角
部付近に設けられる外部接続用電極と、前記半導体チッ
プ接続用電極の間及び前記半導体チップ接続用電極と前
記外部接続用電極の間を電気的に接続する配線とを有す
ることによって構成される片面フレキシブル配線板が、
硬質の材料からなり、両面が平滑である支持体の一方の
面に、少なくとも半導体チップ搭載部の裏面が接着さ
れ、前記半導体チップ接続用電極と、前記外部接続用電
極との間の部位で屈曲され、外部接続用電極が形成され
た部分の裏面が支持体の他方の面に接着されているとい
う構成からなっているプリント配線板である。According to the first aspect of the present invention,
A semiconductor chip mounting portion having at least one semiconductor chip, which has a corner portion and one surface of an insulating substrate made of a flexible material, and a semiconductor chip connecting electrode provided around the semiconductor chip mounting portion, An external connection electrode provided in the vicinity of a corner of the insulating substrate; and a wiring electrically connecting between the semiconductor chip connection electrode and between the semiconductor chip connection electrode and the external connection electrode. The single-sided flexible wiring board composed by
At least the back surface of the semiconductor chip mounting portion is adhered to one surface of the support body made of a hard material and having both smooth surfaces, and bent at a portion between the semiconductor chip connection electrode and the external connection electrode. The printed wiring board has a structure in which the back surface of the portion where the external connection electrode is formed is adhered to the other surface of the support.
【００１２】なお、フレキシブルな材料からなる絶縁基
板の材料としては、電気的絶縁性に優れ、また熱安定性
に優れた材料が用いられ、例えばポリイミドフィルム、
ポリエチレンテレフタラートフィルム、ポリフェニレン
サルファイドフィルム等が用いられ、厚さは２５μｍか
ら１５０μｍ程度、加工性の上から好ましくは５０μｍ
から１２５μｍ程度のものが好ましい。また、電極、配
線の材料としては、銅、アルミニウム等の導電性に優れ
る材料が用いられる。必要に応じて、表面が金、パラジ
ウム等の材料で被覆される。この片面フレキシブル配線
板は、上記絶縁基板に厚さ５μｍから３０μｍ程度の
銅、アルミニウム等の箔からなる電極、配線の材料を、
接着剤を用いて貼着した後、エッチングを行うことによ
って得ることができる。もちろんこの方法に限定される
ことはなく、例えば接着剤を用いることなく、絶縁基板
に、電極、配線の材料を蒸着したり、スパッタリングす
ることによって、形成してもよい。As a material for the insulating substrate made of a flexible material, a material having excellent electrical insulation and thermal stability is used. For example, a polyimide film,
A polyethylene terephthalate film, a polyphenylene sulfide film or the like is used and has a thickness of about 25 μm to 150 μm, preferably 50 μm from the viewpoint of workability.
To about 125 μm is preferable. Further, as the material of the electrodes and wiring, a material having excellent conductivity such as copper or aluminum is used. If necessary, the surface is covered with a material such as gold or palladium. In this single-sided flexible wiring board, electrodes and wiring materials made of foil such as copper and aluminum with a thickness of about 5 μm to 30 μm are provided on the insulating substrate
It can be obtained by applying an adhesive and then performing etching. Of course, the method is not limited to this method, and may be formed by vapor-depositing or sputtering the material of the electrodes and wirings on the insulating substrate without using an adhesive, for example.
【００１３】また、支持体としては、厚さが１ｍｍから
３ｍｍ程度の厚さのポリイミド基板、ポリエチレンテレ
フタラート基板、ポリイミドアミド基板、ポリ四フッ化
エチレン基板、エポキシ基板等を用いることが可能であ
る。なお、これらの材料を上記のような厚みで用いる
と、ある程度の屈曲性を有するが、本請求項中の、硬質
の材料からなり、という意味は、プリント配線板として
の剛性を満足すればよく、全く屈曲されないという意味
ではない。屈曲しすぎる場合は、ガラスクロス等を支持
材料として内部に有する基板を用いることも可能であ
る。さらに、支持体の材料としては、アルミニウム基
板、銅基板等の金属材料を用いてもよい。またセラミッ
ク基板、シリコン基板を用いることも可能である。そし
て、片面フレキシブル配線板を支持体に接着する際に用
いられる接着材料としては、密着強度、耐熱性、耐湿性
に優れる材料で、例えばポリイミド系やエポキシ系の接
着剤や接着フィルムを用いることができる。As the support, it is possible to use a polyimide substrate, a polyethylene terephthalate substrate, a polyimideamide substrate, a polytetrafluoroethylene substrate, an epoxy substrate or the like having a thickness of about 1 mm to 3 mm. . It should be noted that when these materials are used in the thickness as described above, they have a certain degree of flexibility, but in the claims, it means that they are made of a hard material as long as they satisfy the rigidity as a printed wiring board. It doesn't mean that you won't be bent at all. If it bends too much, it is possible to use a substrate having a glass cloth or the like as a supporting material inside. Furthermore, as the material of the support, a metal material such as an aluminum substrate or a copper substrate may be used. It is also possible to use a ceramic substrate or a silicon substrate. Then, as the adhesive material used when adhering the one-sided flexible wiring board to the support, adhesion strength, heat resistance, a material having excellent moisture resistance, for example, a polyimide-based or epoxy-based adhesive or adhesive film may be used. it can.
【００１４】[0014]
【作用】請求項１記載の発明では、上述のような構成を
採用するため、半導体チップ搭載面側の配線と、親基板
との接続面側の配線を接続するために、スルーホールを
形成する必要がない。また、支持体は特に加工されない
ため、支持体の材料の選択性が広く、平滑性の高い材料
を選択することが可能となる。According to the first aspect of the invention, since the structure as described above is adopted, the through hole is formed for connecting the wiring on the semiconductor chip mounting surface side and the wiring on the connection surface side with the parent substrate. No need. In addition, since the support is not particularly processed, the material of the support has a wide selectivity and a material having high smoothness can be selected.
【００１５】[0015]
【実施例】以下、実施例に従い本発明を詳細に説明す
る。なお、図１、図２に従って説明する。図２に、本発
明の一実施例に係るプリント配線板の構成材料である、
片面フレキシブル配線板を示す。この片面フレキシブル
配線板は、厚さ５０μｍのポリイミドフィルムからなる
絶縁基板２１上に厚さ１８μｍの銅からなる配線２２等
が形成されている。半導体チップ搭載部２３は、配線と
同じ材料で、配線等と同様にエッチング時にエッチング
せずに残すことによって形成されている。そして、半導
体チップ搭載部の周囲には、半導体チップ接続用電極２
４が形成されている。この電極は、銅上にニッケルメッ
キ、金メッキが施されている。The present invention will be described in detail below with reference to examples. Note that the description will be given with reference to FIGS. 1 and 2. FIG. 2 shows a constituent material of a printed wiring board according to an embodiment of the present invention,
A single sided flexible wiring board is shown. In this single-sided flexible wiring board, a wiring 22 made of copper having a thickness of 18 μm is formed on an insulating substrate 21 made of a polyimide film having a thickness of 50 μm. The semiconductor chip mounting portion 23 is made of the same material as the wiring, and is formed by leaving it without etching at the time of etching like the wiring. The semiconductor chip connecting electrode 2 is provided around the semiconductor chip mounting portion.
4 are formed. This electrode has nickel plated and gold plated on copper.
【００１６】そして、半導体チップ接続用電極から配線
２２が形成され、角部付近に形成される外部接続用電極
２５に接続されている。またこの実施例では、半導体装
置として用いられる際に、接地される配線２６は、半導
体チップ接続用電極２４、配線２７を通して半導体チッ
プ搭載部２３に接続されている。また、屈曲部２８が屈
曲し、支持体に接着されることになる。この屈曲部２８
を薄く加工しておくことは、支持体に接着する際の作業
性を高め、好ましい。なお、半導体チップ接続用電極２
４、外部接続用電極２５等を除く部分に、保護層（ソル
ダーレジスト）を形成した。ガラスクロスにポリイミド
樹脂を含浸させた、大きさが４０ｍｍ角で、厚さ３ｍｍ
の支持体を用意し、熱硬化型のポリイミド系接着シート
（例えば、ＹＥＦ−０４０：商品名；三菱化学製）を両
面に接着し、支持体の一方の面に、絶縁基板２１の半導
体チップ搭載面となる部分２９を接着した。さらに、屈
曲部２８で絶縁基板を屈曲させ、絶縁基板２１の、親基
板との接続面となる部分３０を支持体の他方の面に接着
した。Then, the wiring 22 is formed from the semiconductor chip connecting electrode and is connected to the external connecting electrode 25 formed near the corner. Further, in this embodiment, the wiring 26 that is grounded when used as a semiconductor device is connected to the semiconductor chip mounting portion 23 through the semiconductor chip connecting electrode 24 and the wiring 27. Further, the bent portion 28 is bent and adhered to the support. This bent portion 28
It is preferable to process thinly so as to improve workability when adhering to the support. The semiconductor chip connecting electrode 2
4. A protective layer (solder resist) was formed on the portion excluding the external connection electrodes 25 and the like. Glass cloth impregnated with polyimide resin, 40 mm square, 3 mm thick
Of the support, a thermosetting polyimide adhesive sheet (for example, YEF-040: trade name; manufactured by Mitsubishi Chemical) is adhered on both sides, and the semiconductor chip of the insulating substrate 21 is mounted on one side of the support. The surface portion 29 was adhered. Furthermore, the insulating substrate was bent at the bent portion 28, and the portion 30 of the insulating substrate 21 that was to be the connection surface with the parent substrate was bonded to the other surface of the support.
【００１７】以下図１も併せて参照して説明すると、支
持体１に、上記接着シート２を介して、絶縁基板のベー
スとなる上述のポリイミドフィルム３が接着されてい
る。ポリイミドフィルム上には、上述のように、配線２
２、半導体チップ搭載部２３、外部接続用電極２５が形
成され、屈曲部２８で屈曲され、接着されている。な
お、支持体１の周囲部４は、角部が滑らかになるように
加工しておいたほうが、屈曲部の配線に力が加わらず好
ましい。そして、半導体チップ接続用電極２４、外部接
続用電極２５等を除く部分には保護層（ソルダーレジス
ト）５が形成されている。なお本実施例では、半導体チ
ップ搭載部は一か所であるが、複数か所設け、半導体チ
ップを複数個搭載する構成にしてもよい。上述のように
して本発明に係るプリント配線板が製造された。Referring to FIG. 1 together, the above-mentioned polyimide film 3 serving as the base of the insulating substrate is bonded to the support 1 via the adhesive sheet 2. As described above, the wiring 2 is formed on the polyimide film.
2. The semiconductor chip mounting portion 23 and the external connection electrode 25 are formed, bent at the bent portion 28, and bonded. In addition, it is preferable that the peripheral portion 4 of the support 1 is processed so that the corners are smooth, because no force is applied to the wiring at the bent portion. Further, a protective layer (solder resist) 5 is formed on a portion excluding the semiconductor chip connecting electrode 24, the external connecting electrode 25, and the like. In this embodiment, the semiconductor chip mounting portion is provided at one place, but it may be provided at a plurality of places and a plurality of semiconductor chips may be mounted. The printed wiring board according to the present invention was manufactured as described above.
【００１８】さらに、本発明に係るプリント配線板に、
銀ペースト等の接着剤１１を介して半導体チップ１２を
接着し、ボンディングワイヤ１３を用い、半導体チップ
１２と半導体チップ接続用電極２４を接続した。そし
て、半導体チップ、ボンディングワイヤ等を含む部分を
封止樹脂１４を用いて、樹脂封止した。さらに、親基板
との接続面の外部接続用電極２５上に、ハンダボール１
５を形成し、半導体装置が完成した。Further, in the printed wiring board according to the present invention,
The semiconductor chip 12 was adhered via an adhesive 11 such as silver paste, and the bonding wire 13 was used to connect the semiconductor chip 12 and the semiconductor chip connecting electrode 24. Then, the portion including the semiconductor chip, the bonding wire, and the like was resin-sealed with the sealing resin 14. Further, on the external connection electrode 25 on the connection surface with the mother board, the solder ball 1
5 was formed, and the semiconductor device was completed.
【００１９】[0019]
【発明の効果】本発明によれば、プリント配線板にスル
ーホールを形成する必要がないため、プリント配線板の
小型化が可能であり、非常に簡易な工程で、コストが上
昇することなく高密度配線が可能となる、さらにスルー
ホールがないため、高い信頼性が得られる。また、支持
体として平滑性の高い材料を選択することが可能なた
め、平滑性の高いプリント配線板を得ることができる。According to the present invention, since it is not necessary to form through holes in the printed wiring board, the printed wiring board can be downsized, and the cost can be increased by a very simple process without increasing the cost. High-reliability is obtained because there is no through hole, which enables dense wiring. Further, since a material having high smoothness can be selected as the support, a printed wiring board having high smoothness can be obtained.
【００２０】[0020]
【図１】実施例に係るプリント配線板を用いた半導体装
置の説明図。FIG. 1 is an explanatory diagram of a semiconductor device using a printed wiring board according to an embodiment.
【図２】実施例に係るプリント配線板に用いられる片面
フレキシブル配線板の説明図。FIG. 2 is an explanatory view of a single-sided flexible wiring board used for the printed wiring board according to the embodiment.
【図３】従来の半導体装置の説明図。FIG. 3 is an explanatory diagram of a conventional semiconductor device.
【図４】従来の半導体装置の説明図。FIG. 4 is an explanatory diagram of a conventional semiconductor device.
【図５】図４の半導体装置を親基板接続面側から見た説
明図。5 is an explanatory view of the semiconductor device of FIG. 4 viewed from the parent board connection surface side.
１ 支持体 ２ 接着シート ３ ポリイミドフィルム ４ 支持体の周囲部 ５、５２ 保護層 １１、４３ 接着剤 １２、４４ 半導体チップ １３、４６ ボンディングワイヤ １４、３１、５３ 封止樹脂 １５、５１、５５ ハンダボール ２１、４１ 絶縁基板 ２２、２７、４７、４８ 配線 ２３、４２ 半導体チップ搭載部 ２４、４５ 半導体チップ接続用電極 ２５ 外部接続用電極 ２６ 接地される配線 ２８ 屈曲部 ２９ 半導体チップ搭載面となる部分 ３０ 親基板との接続面となる部分 ３２ リード ４９ スルーホール ５０、５４ 親基板接続用電極 ５６ プリント配線板 ５７ 銅層 1 Support 2 Adhesive Sheet 3 Polyimide Film 4 Periphery of Support 5,52 Protective Layer 11,43 Adhesive 12,44 Semiconductor Chip 13,46 Bonding Wire 14,31,53 Sealing Resin 15,51,55 Solderball 21, 41 Insulating substrate 22, 27, 47, 48 Wiring 23, 42 Semiconductor chip mounting portion 24, 45 Semiconductor chip connecting electrode 25 External connection electrode 26 Grounding wiring 28 Bending portion 29 Semiconductor chip mounting surface portion 30 Portion to be a connection surface with the mother board 32 Lead 49 Through hole 50, 54 Mother board connecting electrode 56 Printed wiring board 57 Copper layer
Claims (1)
絶縁基板の片面に、少なくとも一つの半導体チップが搭
載可能な半導体チップ搭載部と、前記半導体チップ搭載
部の周囲に設けられた半導体チップ接続用電極と、前記
絶縁基板の角部付近に設けられる外部接続用電極と、前
記半導体チップ接続用電極の間及び前記半導体チップ接
続用電極と前記外部接続用電極の間を電気的に接続する
配線とを有することによって構成される片面フレキシブ
ル配線板が、硬質の材料からなり、両面が平滑である支
持体の一方の面に、少なくとも半導体チップ搭載部の裏
面が接着され、前記半導体チップ接続用電極と、前記外
部接続用電極との間の部位で屈曲され、外部接続用電極
が形成された部分の裏面が支持体の他方の面に接着され
ているプリント配線板。1. A semiconductor chip mounting part having at least one semiconductor chip mounted on one surface of an insulating substrate having a corner and made of a flexible material, and a semiconductor chip provided around the semiconductor chip mounting part. The connection electrodes, the external connection electrodes provided near the corners of the insulating substrate, the semiconductor chip connection electrodes, and the semiconductor chip connection electrodes and the external connection electrodes are electrically connected. A single-sided flexible wiring board constituted by having a wiring is made of a hard material, and at least the back surface of the semiconductor chip mounting portion is adhered to one surface of a support body having smooth both surfaces, for connecting the semiconductor chip. The printed wiring board is bent at a portion between the electrode and the external connection electrode, and the back surface of the portion where the external connection electrode is formed is adhered to the other surface of the support. Plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10328495A JPH08298356A (en) | 1995-04-27 | 1995-04-27 | Printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10328495A JPH08298356A (en) | 1995-04-27 | 1995-04-27 | Printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08298356A true JPH08298356A (en) | 1996-11-12 |
Family
ID=14350031
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10328495A Pending JPH08298356A (en) | 1995-04-27 | 1995-04-27 | Printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08298356A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005244211A (en) * | 2004-01-30 | 2005-09-08 | Matsushita Electric Ind Co Ltd | Module with built-in components and electronic devices provided with same |
| JP2005291922A (en) * | 2004-03-31 | 2005-10-20 | Nhk Spring Co Ltd | Inspection block |
-
1995
- 1995-04-27 JP JP10328495A patent/JPH08298356A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005244211A (en) * | 2004-01-30 | 2005-09-08 | Matsushita Electric Ind Co Ltd | Module with built-in components and electronic devices provided with same |
| JP4619807B2 (en) * | 2004-01-30 | 2011-01-26 | パナソニック株式会社 | Component built-in module and electronic device equipped with component built-in module |
| JP2005291922A (en) * | 2004-03-31 | 2005-10-20 | Nhk Spring Co Ltd | Inspection block |
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