JPH08288659A - Metal base multilayered circuit board - Google Patents

Metal base multilayered circuit board

Info

Publication number
JPH08288659A
JPH08288659A JP8804595A JP8804595A JPH08288659A JP H08288659 A JPH08288659 A JP H08288659A JP 8804595 A JP8804595 A JP 8804595A JP 8804595 A JP8804595 A JP 8804595A JP H08288659 A JPH08288659 A JP H08288659A
Authority
JP
Japan
Prior art keywords
metal
layer
circuit board
double
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8804595A
Other languages
Japanese (ja)
Other versions
JP3282776B2 (en
Inventor
Makoto Fukuda
誠 福田
Toshiki Saito
俊樹 斉藤
Naoki Yonemura
直己 米村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denka Co Ltd
Original Assignee
Denki Kagaku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denki Kagaku Kogyo KK filed Critical Denki Kagaku Kogyo KK
Priority to JP8804595A priority Critical patent/JP3282776B2/en
Priority to US08/629,229 priority patent/US6175084B1/en
Priority to KR1019960010843A priority patent/KR100382631B1/en
Priority to EP96105663A priority patent/EP0738007A3/en
Publication of JPH08288659A publication Critical patent/JPH08288659A/en
Priority to US09/593,059 priority patent/US6369332B1/en
Application granted granted Critical
Publication of JP3282776B2 publication Critical patent/JP3282776B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE: To enable mounting a power electronic element which generates heat, by making the surface roughness of a circuit surface of the lower layer of a metal base circuit board which is laminated on a metal plate be in a specified range. CONSTITUTION: On at least a part or the whole part of the main surface of a metal plate 1, a double-sided resin board 3 having metal layer 5 and a metal layer 4 which have at least circuits like a shield circuit is laminated via an insulating adhesive layer 2, and unified in a body. According to need, electronic elements as well as circuits are mounted on the double-sided resin board 3. A Cu-plating layer 7 is formed on the metal layer 5 surface. The surface roughness of the lower layer circuit surface of the double-sided resin board 3 is set as 1μm<=Rz<=10μm. In the case that the surface roughness is Rz>=0.1μm, bonding power is improved and heat dissipation can be enhanced.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は金属ベース多層回路基
板、とくに多層化された部分に発熱性の高いパワー電子
素子の搭載が可能であり、かつその信頼性に優れた金属
ベース多層回路基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a metal-based multi-layered circuit board, and more particularly to a metal-based multi-layered circuit board which is capable of mounting a power electronic device having a high heat-generating property on a multi-layered portion and has excellent reliability. .

【0002】[0002]

【従来の技術】近年、半導体搭載用の回路基板では高密
度実装化および高性能化が要求され、半導体素子の小型
化、高性能化、配線密度の微細化にともない、半導体素
子から発生した熱を如何に放散するかということが問題
となっている。
2. Description of the Related Art In recent years, circuit boards for mounting semiconductors have been required to have high density mounting and high performance. With the miniaturization of semiconductor elements, high performance, and miniaturization of wiring density, heat generated from semiconductor elements has been increased. How to dissipate is a problem.

【0003】この様な要求のもと、電源分野を中心に、
金属板上に絶縁層を介して金属箔を積層した金属ベース
回路基板が熱放散性が良いという理由で使用されてきて
いるが、金属板の上に薄い絶縁層を塗布した構造である
ため、ノイズが発生しやすく、モジュールの誤動作を引
き起こしやすいという問題があった。
Under these demands, mainly in the power supply field,
A metal base circuit board in which a metal foil is laminated on a metal plate via an insulating layer has been used because it has good heat dissipation, but since it has a structure in which a thin insulating layer is applied on the metal plate, There is a problem in that noise is likely to occur and a malfunction of the module is likely to occur.

【0004】上記ノイズ対策として、金属板上または表
面に絶縁剤層を設けた金属板上に接着剤層を介して上層
基板を積層した金属ベース多層回路基板が広く使用され
てきているが、この様な金属ベース多層回路基板では、
一般に、金属板と上層基板の間の絶縁剤層にエポキシ含
浸ガラスクロス等の熱放散性の悪い材料が使用されてい
ること、加えて接着剤層が介在するということのため
に、高パワーの電子素子を搭載する場合には、熱放散性
が不十分であり、電子素子の温度が上昇し、ひいては誤
動作を生ぜしめるという問題があった。
As a countermeasure against the noise, a metal-based multi-layer circuit board in which an upper layer substrate is laminated on a metal plate or a metal plate having an insulating layer provided on the surface via an adhesive layer has been widely used. In such a metal-based multilayer circuit board,
In general, a material with a low heat dissipation property such as epoxy impregnated glass cloth is used for the insulating agent layer between the metal plate and the upper substrate, and in addition, since an adhesive layer is present, high power is required. When the electronic element is mounted, there is a problem that the heat dissipation is insufficient, the temperature of the electronic element rises, and eventually a malfunction occurs.

【0005】この対策として、ガラスエポキシ多層基板
等の樹脂基板や無機物を充填した樹脂を介して2つの金
属箔を接合した両面樹脂基板等の回路基板を、熱伝導性
を高める為の無機フィラーを充填した絶縁接着材層を介
して、金属板に積層した金属ベース多層回路基板が考案
されている。(特願平6−223692号)しかしなが
ら、この様な金属ベース多層回路基板には、絶縁接着剤
層と回路基板との接着力が不十分なため、この界面で剥
離してしまうという問題があった。
As a countermeasure against this, a circuit board such as a resin board such as a glass epoxy multilayer board or a double-sided resin board in which two metal foils are joined via a resin filled with an inorganic material is provided with an inorganic filler for enhancing thermal conductivity. A metal-based multi-layer circuit board has been devised which is laminated on a metal plate through a filled insulating adhesive layer. (Japanese Patent Application No. 6-223692) However, such a metal-based multi-layer circuit board has a problem in that the insulating adhesive layer and the circuit board have insufficient adhesive force, and thus peel off at this interface. It was

【0006】[0006]

【発明が解決しようとする課題】本発明はかかる問題点
に鑑みてなされたものであって、多層化された部分に発
熱性の高パワー電子素子の搭載が可能であり、信頼性に
優れた金属ベース多層回路基板を提供するものである。
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and it is possible to mount a heat-generating high-power electronic element on a multi-layered portion, which is excellent in reliability. A metal-based multilayer circuit board is provided.

【0007】[0007]

【課題を解決するための手段】本発明は、少なくとも下
層に回路形成された両面樹脂基板を絶縁接着剤層を介し
て金属板上に積層した金属ベース回路基板において、前
記の下層の回路表面の表面粗さがRzで0.1μm以上10
μm以下であることを特徴とする金属ベース多層回路基
板である。
SUMMARY OF THE INVENTION The present invention is a metal base circuit board in which a double-sided resin board having a circuit formed in at least a lower layer is laminated on a metal plate through an insulating adhesive layer. Surface roughness Rz is 0.1 μm or more 10
The metal-based multi-layer circuit board is characterized by having a thickness of not more than μm.

【0008】更に、本発明は、前記下層の回路表面にC
uメッキ層を設けることを特徴とする前記の金属ベース
多層回路基板であり、更に詳しくは、前記のCuメッキ
層が少なくともNiまたはCoのいずれかを含むことを
特徴とする前記の金属ベース多層回路基板である。
Further, according to the present invention, C is formed on the circuit surface of the lower layer.
The metal-based multi-layer circuit board according to claim 1, further comprising a u-plated layer, and more specifically, the Cu-plated layer includes at least Ni or Co. The substrate.

【0009】以下、図を用いて本発明について詳細に説
明する。図1は、本発明の金属ベース多層回路基板の一
例を示す断面図である。本発明の金属ベース多層回路基
板は、金属板1上の少なくとも一主面上の一部または全
面に、少なくとも下層にシールド回路等の回路を有する
金属層5と上層に金属層4を有する両面樹脂基板3を、
絶縁接着剤層2を介して積層され一体化された構造を有
する。図示していないが両面樹脂基板3上には、一般に
回路だけでなく電子素子も必要に応じ搭載されるし、両
面樹脂基板3上にさらに複数層の回路基板が積層されて
いても構わない。図2は、本発明の金属ベース多層回路
基板の他の一例を示す断面図で、両面樹脂基板3の下層
の金属層5の表面にCuメッキ層7を有している。
The present invention will be described in detail below with reference to the drawings. FIG. 1 is a sectional view showing an example of the metal-based multilayer circuit board of the present invention. The metal-based multi-layer circuit board of the present invention is a double-sided resin having a metal layer 5 having a circuit such as a shield circuit at least as a lower layer and a metal layer 4 as an upper layer on a part or the entire surface of at least one main surface of the metal plate 1. Board 3
It has a structure in which the insulating adhesive layer 2 is laminated and integrated. Although not shown, generally not only circuits but also electronic elements are mounted on the double-sided resin substrate 3 as needed, and a plurality of layers of circuit boards may be laminated on the double-sided resin substrate 3. FIG. 2 is a cross-sectional view showing another example of the metal-based multilayer circuit board of the present invention, which has a Cu plating layer 7 on the surface of the lower metal layer 5 of the double-sided resin board 3.

【0010】本発明の両面樹脂基板3とは、無機質充填
剤を含んだ樹脂を硬化して得られる絶縁接着剤層6を介
して2層以上の金属層4、5が積層されているものであ
り、無機質充填剤として窒化硼素、酸化アルミニウム、
酸化珪素のいずれか或いはこれらの2種以上を含む混合
物を45体積%〜80体積%樹脂に含有させたものである。
The double-sided resin substrate 3 of the present invention is one in which two or more metal layers 4 and 5 are laminated via an insulating adhesive layer 6 obtained by curing a resin containing an inorganic filler. There, boron nitride, aluminum oxide, as an inorganic filler,
It is a resin containing 45% by volume to 80% by volume of any one of silicon oxide or a mixture containing two or more of these.

【0011】上記の樹脂としては、エポキシ樹脂、ポリ
イミド樹脂、フェノール樹脂等が挙げられるが、接着力
が強いことからエポキシ樹脂が好ましい。尚、両面樹脂
基板3の絶縁接着剤層6の厚みについては、得られる金
属ベース多層回路基板の熱放散性と耐電圧特性の面から
20μm以上200μm以下のものが好ましい。又、金属ベ
ース多層回路基板に要求される特性に応じて、両面樹脂
基板3に替えて、従来から知られているガラスエポキシ
樹脂基板、ポリイミド樹脂基板、フェノール樹脂基板等
の樹脂基板や、表面を電気絶縁性とした金属基板あるい
はセラミック基板等を用いることも可能である。
Examples of the above-mentioned resin include epoxy resin, polyimide resin, phenol resin and the like, and epoxy resin is preferable because of its strong adhesive force. Regarding the thickness of the insulating adhesive layer 6 of the double-sided resin substrate 3, in terms of heat dissipation and withstand voltage characteristics of the obtained metal-based multilayer circuit board.
It is preferably 20 μm to 200 μm. Depending on the characteristics required for the metal-based multilayer circuit board, the double-sided resin board 3 may be used instead of the conventionally known glass epoxy resin board, polyimide resin board, phenol resin board, or other resin board or surface. It is also possible to use an electrically insulating metal substrate or ceramic substrate.

【0012】本発明に於いて、両面樹脂基板3の下層の
回路の表面は、Rzで0.1μm以上10μm以下の表面粗
さである。両面樹脂基板3は、金属板1上に絶縁接着剤
層2を介して積層されるが、その接合力は回路自身の有
する凹凸に加え、絶縁接着剤層2と接する回路及び両面
樹脂基板3の絶縁接着剤層6の材質と表面性状に影響さ
れる。発明者らは、この点について実験的に検討を重
ね、回路表面の表面粗さが前記接合力を支配しているこ
と、特に、回路表面がCuあるいは少なくともNi又は
Coを含むCuメッキした層であって、しかもその表面
の粗さがRzで0.1μm以上の時に前記接合力が向上で
きることを見いだし、本発明に至ったものである。
In the present invention, the surface of the circuit underlying the double-sided resin substrate 3 has a surface roughness Rz of 0.1 μm or more and 10 μm or less. The double-sided resin substrate 3 is laminated on the metal plate 1 with the insulating adhesive layer 2 interposed therebetween. The bonding force of the double-sided resin substrate 3 is not only unevenness of the circuit itself, but also the circuit and double-sided resin substrate 3 in contact with the insulating adhesive layer 2. It is affected by the material and surface properties of the insulating adhesive layer 6. The inventors repeatedly conducted experiments on this point and found that the surface roughness of the circuit surface governs the bonding force, especially when the circuit surface is Cu or a Cu-plated layer containing at least Ni or Co. It was found that the bonding force can be improved when the surface roughness Rz is 0.1 μm or more, and the present invention has been achieved.

【0013】両面樹脂基板3の下層の回路表面の表面粗
さがRzで0.1μm未満の場合には、充分な接合力が得
られず、使用中あるいは使用前から、両面樹脂基板の下
層回路と絶縁接着剤層2との間に隙間を生じ、その結
果、熱放散性が著しく不良となる。一方、表面粗さがR
zで10μmを越える場合には、表面の凹凸部において電
界集中が起き、耐電圧性が不良となる。又、両面樹脂基
板3の下層の回路の表面の材質について、理由は不明で
あるが、銅である時に強固な接合力が得られるので好ま
しく、特に、少なくともNi又はCoを含有するCuメ
ッキ層7が積層されている時に、上記効果が顕著であ
り、好ましい。
When the surface roughness of the circuit surface of the lower layer of the double-sided resin substrate 3 is less than 0.1 μm in Rz, sufficient bonding force cannot be obtained, and the lower layer circuit of the double-sided resin substrate is not used during or before use. A gap is generated between the insulating adhesive layer 2 and the heat dissipation property is significantly deteriorated. On the other hand, the surface roughness is R
When z exceeds 10 μm, electric field concentration occurs in the uneven portion of the surface, resulting in poor withstand voltage. Although the reason for the surface material of the lower layer of the double-sided resin substrate 3 is unknown, it is preferable that it is copper because a strong bonding force can be obtained, and particularly, the Cu plating layer 7 containing at least Ni or Co. The above-mentioned effects are remarkable when the are laminated, which is preferable.

【0014】両面樹脂基板3の下層の回路の材質につい
ては、特に規定するものでなく、銅、アルミニウム、ニ
ッケル、鉄、錫、銀、チタニウムあるいはこれら金属の
合金あるいはこれらの金属あるいは合金を数種積層した
クラッド箔あるいはNiメッキ、(Ni+金)メッキ等
の金属メッキがほどこされていてもかまわない。これら
の金属あるいは合金は、一般的に9〜500μm程度の薄い
層状の箔の形態で供給され、その表面の粗さはRzで0.
1μm未満である。
The material of the lower layer circuit of the double-sided resin substrate 3 is not particularly specified, and copper, aluminum, nickel, iron, tin, silver, titanium, alloys of these metals, or several metals or alloys thereof. A laminated clad foil or metal plating such as Ni plating or (Ni + gold) plating may be applied. These metals or alloys are generally supplied in the form of a thin layered foil having a thickness of about 9 to 500 μm, and the surface roughness is Rz of 0.
It is less than 1 μm.

【0015】本発明では、両面樹脂基板3の下層の回路
の表面となる金属層5の表面を荒らし、前記の0.1μm
以上10μm以下となるように調整する。表面の粗さを調
整する方法としては機械加工によることもできる。ま
た、前記の両面樹脂基板の下層回路がCuからなる場合
には、いろいろな液で腐食処理する方法(エッチング処
理)あるいは酸化性の液で処理する方法(黒化処理ある
いはブラウン処理)等の公知の表面処理方法を用いるこ
とができる。
In the present invention, the surface of the metal layer 5 which is the surface of the circuit below the double-sided resin substrate 3 is roughened to the above-mentioned 0.1 μm.
Adjust so that it is 10 μm or less. Machining may also be used as a method of adjusting the surface roughness. In addition, when the lower layer circuit of the double-sided resin substrate is made of Cu, a method of performing corrosion treatment with various liquids (etching treatment) or a method of treating with an oxidizing liquid (blackening treatment or browning treatment) is known. The surface treatment method can be used.

【0016】又、本発明は、Cuメッキの条件を選択す
ることで前記の表面粗さがRzで0.1μm以上10μm以
下であるCuメッキ層をえることができるという知見に
もとづいたものである。本発明の両面樹脂基板3の下層
の回路形成された金属層5の表面に設けられるCu合金
層7は、その表面粗さがRzで0.1μm以上10μm以下
の表面粗さを有するものであり、更に、少なくともNi
又はCoを含むものである。
The present invention is also based on the finding that a Cu plated layer having a surface roughness Rz of 0.1 μm or more and 10 μm or less can be obtained by selecting the Cu plating conditions. The Cu alloy layer 7 provided on the surface of the circuit-formed metal layer 5 under the double-sided resin substrate 3 of the present invention has a surface roughness Rz of 0.1 μm or more and 10 μm or less, Furthermore, at least Ni
Alternatively, it contains Co.

【0017】Cuメッキを行う方法としては電気Cuメ
ッキと無電解Cuメッキがあるが、本発明では、得られ
るCuメッキの表面粗さがRzで0.1μm〜10μmのも
のが得られる限りいずれの方法でも良いが、無電解Cu
メッキはいろいろな合金、表面構造のメッキ層を得るこ
とができるので好ましい方法である。無電解Cuメッキ
は、例えば、還元剤にホルマリン、グリオキシル酸塩或
いは次亜リン酸ナトリウムを含む硫酸銅水溶液中に被メ
ッキ物を数十秒浸漬することで容易に行うことができ
る。この時、電解液の安定性を確保するために、例えば
ほう酸等の緩衝剤、クエン酸ナトリウム等の錯化剤を用
いる。本発明に利用できるCuメッキの一例としては、
浴組成として硫酸銅0.032M、次亜リン酸ナトリウム0.2
7M、クエン酸ナトリウム0.052M、ほう酸0.5Mを基本
とし、所望に応じて硫酸コバルト、硫酸ニッケルを0.00
1〜0.01Mを加えたものを用い、浴温度50〜70℃の条件
下で被メッキ物を数十秒〜数時間浸漬することがあげら
れ、このメッキ条件で得られるCuメッキ層の表面粗さ
も調整することができる。
There are electric Cu plating and electroless Cu plating as a method of performing Cu plating. In the present invention, any method is available as long as the obtained Cu plating has a surface roughness Rz of 0.1 μm to 10 μm. However, electroless Cu
Plating is a preferred method because it is possible to obtain plated layers of various alloys and surface structures. The electroless Cu plating can be easily performed, for example, by immersing the object to be plated in a copper sulfate aqueous solution containing formalin, glyoxylate or sodium hypophosphite in a reducing agent for several tens of seconds. At this time, in order to ensure the stability of the electrolytic solution, for example, a buffering agent such as boric acid or a complexing agent such as sodium citrate is used. As an example of Cu plating that can be used in the present invention,
Bath composition as copper sulfate 0.032M, sodium hypophosphite 0.2
7M, 0.052M sodium citrate, 0.5M boric acid as the base, cobalt sulfate, nickel sulfate 0.00
It is possible to immerse the object to be plated for several tens of seconds to several hours under the condition of a bath temperature of 50 to 70 ° C. using 1 to 0.01 M added, and the surface roughness of the Cu plating layer obtained under these plating conditions. It can also be adjusted.

【0018】Ni及び/又はCoの含有量は特に規定す
るものでないが、Cuメッキ層7中0.1重量%以上15重
量%以下が好ましい。Ni及び/又はCoの含有量は、
Cuメッキする際に0.001M以上の所望の量が電解液中
に加えられ、Cuが析出する際の核形成剤の役割を果た
すとともに、Cuとともに共析出されると考えられる。
Ni及び/又はCoをCuメッキ層中に15重量%を越え
る場合には、得られるCuメッキ層の表面粗さが10μm
を越えることがある。このように、Ni及び/又はCo
の加える量を調整することで、Rzで0.1μm以上10μ
m以下の表面粗さを有するCuメッキ層を容易に、しか
も後処理することなく得ることができる。
The content of Ni and / or Co is not particularly limited, but is preferably 0.1% by weight or more and 15% by weight or less in the Cu plating layer 7. The content of Ni and / or Co is
It is considered that a desired amount of 0.001 M or more is added to the electrolytic solution during Cu plating, plays a role of a nucleating agent when Cu is deposited, and is co-deposited with Cu.
When Ni and / or Co exceeds 15% by weight in the Cu plating layer, the surface roughness of the obtained Cu plating layer is 10 μm.
May exceed. Thus, Ni and / or Co
By adjusting the amount added, Rz is 0.1μm or more and 10μ
A Cu plated layer having a surface roughness of m or less can be easily obtained without post-treatment.

【0019】同様に、例えば、Cuメッキする時に電解
液温度を低く保つことで、Ni及びCoのいずれも含ま
ないCuメッキ層であって、しかも表面粗さがRzで0.
1μm以上10μm以下のものを得ることができる。尚、
Cuメッキ層7の厚みについては、Ni及び/又はCo
を含むと含まないに拘らず、0.01〜10μmであることが
好ましい。Cuメッキ層の厚みが0.01μm未満である
と、その接着力が発揮されないし、厚みが10μmを越え
るとメッキ層が凝集破壊を生じ、期待する接着強度を得
られない。
Similarly, for example, by keeping the temperature of the electrolytic solution low at the time of Cu plating, a Cu plating layer containing neither Ni nor Co and having a surface roughness Rz of 0.
It is possible to obtain one having a size of 1 μm or more and 10 μm or less. still,
Regarding the thickness of the Cu plating layer 7, Ni and / or Co
Regardless of whether or not it is included, it is preferably 0.01 to 10 μm. If the thickness of the Cu plating layer is less than 0.01 μm, the adhesive force is not exerted, and if the thickness exceeds 10 μm, the plating layer undergoes cohesive failure and the expected adhesive strength cannot be obtained.

【0020】本発明に用いる絶縁接着剤層2としては、
金属酸化物及び/または金属窒化物の一種以上よりなる
粉体を含有する樹脂であり、含有される金属酸化物、金
属窒化物としては、放熱性の点から酸化アルミニウム、
酸化珪素、窒化硼素が好ましい。樹脂としては、特に規
定するものではなく、エポキシ樹脂、ポリイミド樹脂、
BTレジン、フェノール樹脂、フッ素樹脂、ブチラール
樹脂、およびその混合物等が用いられる。前記の樹脂の
うちでは、両面樹脂基板3の下層の回路形成された金属
層5の表面にCuメッキを施した時に接合力の向上が図
れることからエポキシ樹脂が特に好ましい。尚、絶縁接
着剤層2の厚みは、特に規定するものではないが、熱伝
導性を考慮すると200μm以下のものが好ましい。
As the insulating adhesive layer 2 used in the present invention,
A resin containing a powder of one or more kinds of metal oxides and / or metal nitrides. The metal oxides and metal nitrides contained are aluminum oxides from the viewpoint of heat dissipation,
Silicon oxide and boron nitride are preferable. The resin is not particularly specified, but an epoxy resin, a polyimide resin,
BT resin, phenol resin, fluororesin, butyral resin, and a mixture thereof are used. Among the above-mentioned resins, epoxy resin is particularly preferable because the bonding strength can be improved when the surface of the metal layer 5 on which the circuit is formed, which is the lower layer of the double-sided resin substrate 3, is plated with Cu. The thickness of the insulating adhesive layer 2 is not particularly limited, but is preferably 200 μm or less in consideration of thermal conductivity.

【0021】本発明の金属ベース多層回路基板に用いる
金属板1としては、良熱伝導性を持つアルミニウムおよ
びアルミニウム合金、銅および銅合金、鉄および鉄合金
等あるいは銅/鉄−ニッケル系合金/銅、アルミニウム
/鉄−ニッケル系合金/アルミニウム等の複合材料等が
使用可能である。また、金属板1の厚みとしては、特に
制限はないが0.5mm〜3.0mmが一般に用いられる。
As the metal plate 1 used in the metal-based multilayer circuit board of the present invention, aluminum and aluminum alloys having good thermal conductivity, copper and copper alloys, iron and iron alloys, etc. or copper / iron-nickel alloy / copper. A composite material such as aluminum / iron-nickel alloy / aluminum can be used. The thickness of the metal plate 1 is not particularly limited, but 0.5 mm to 3.0 mm is generally used.

【0022】以下、実施例に基づき、発明を更に詳しく
説明する。
The present invention will be described in more detail based on the following examples.

【実施例】【Example】

〔実施例1〕厚さ1.5mmのアルミニウム板上に絶縁接
着剤層として、破砕状酸化アルミニウムを78重量%含有
させたエポキシ樹脂を200μmの厚みで塗布した。一
方、60μmの基材厚みで両面に35μm厚みの金属層を有
するガラスエポキシ樹脂基板を、所望の回路及びスルー
ホールを形成後、その一面の回路についてエッチング処
理により表面を粗化し、更にCuメッキ処理を施した。
この時、Cuメッキ層の表面粗さは、Rzで0.1μmで
あった。次に、前記のアルミニウム板上の絶縁接着剤層
の上に、Cuメッキを施した回路を前記絶縁接着剤層に
面して、ラミネート法により直接張り合わせ、金属ベー
ス多層回路基板を作製した。この金属ベース多層回路基
板について、絶縁接着剤層と回路基板との接着強さをJI
S C6481による90度剥離法にて調べた。又、同じ金属ベ
ース多層回路基板を260℃のはんだバス上に浮かべ、60
分処理した後の接着強さと、膨れの有無を観察した。は
んだバスでの処理前後の90度剥離強さは、それぞれ1.
9、1.8kgf/cmで良好であった。また、膨れの発生もな
かった。
Example 1 An epoxy resin containing 78% by weight of crushed aluminum oxide was applied as an insulating adhesive layer on an aluminum plate having a thickness of 1.5 mm to a thickness of 200 μm. On the other hand, a glass epoxy resin substrate having a substrate thickness of 60 μm and metal layers of 35 μm thickness on both sides is formed with a desired circuit and through holes, and then the surface of one side of the circuit is roughened by etching and further Cu-plated. Was applied.
At this time, the surface roughness of the Cu plating layer was 0.1 μm in Rz. Next, on the insulating adhesive layer on the aluminum plate, a circuit plated with Cu was faced to the insulating adhesive layer and directly laminated by a laminating method to produce a metal-based multilayer circuit board. Regarding this metal-based multi-layer circuit board, the adhesion strength between the insulating adhesive layer and the circuit board
It was examined by a 90 ° peeling method according to S C6481. Also, float the same metal-based multilayer circuit board on a solder bath at 260 ℃,
The adhesive strength after the minute treatment and the presence or absence of swelling were observed. The 90 degree peel strength before and after the solder bath treatment is 1.
It was good at 9 and 1.8 kgf / cm. In addition, no swelling occurred.

【0023】〔実施例2〜7、比較例1〕Cuメッキ層
を作製する条件をいろいろ変えたこと以外は、実施例1
と同一の操作を経て得られたいろいろの金属ベース多層
回路基板について、実施例1と同一の評価を行い実施例
2〜7とした。又、比較例として、エッチングによる表
面の粗化とCuメッキ層を設けないものについても同様
の操作、評価を行った。これらの結果を、実施例1の結
果とともに表1に示す。
Examples 2 to 7 and Comparative Example 1 Example 1 was repeated except that the conditions for producing the Cu plating layer were changed variously.
Various metal-based multilayer circuit boards obtained through the same operation as above were evaluated in the same manner as in Example 1 to be Examples 2 to 7. In addition, as a comparative example, the same operation and evaluation were performed for a surface not roughened by etching and having no Cu plating layer. The results are shown in Table 1 together with the results of Example 1.

【0024】〔実施例8〕厚さ1.5mmのアルミニウム
板上に絶縁接着剤層として、破砕状酸化アルミニウムを
78重量%含有させたエポキシ樹脂を200μmの厚みで塗
布した。一方、60μmの基材厚みで両面に35μm厚みの
金属層を有するガラスエポキシ樹脂基板を、所望の回路
及びスルーホールを形成後、その一面の回路について亜
塩素酸塩を主剤とするアルカリ水溶液で黒化処理を行っ
た。この時、黒化処理した回路の表面粗さはRzで0.2
μmであった。次に、前記のアルミニウム板上の絶縁接
着剤層の上に、黒化処理を施した回路を前記絶縁接着剤
層に面して、ラミネート法により直接張り合わせ、金属
ベース多層回路基板を作製した。この金属ベース多層回
路基板について、実施例1と同一の評価を行った。この
結果を表1に示す。
Example 8 On a 1.5 mm thick aluminum plate, crushed aluminum oxide was used as an insulating adhesive layer.
An epoxy resin containing 78% by weight was applied to a thickness of 200 μm. On the other hand, a glass epoxy resin substrate with a base material thickness of 60 μm and metal layers of 35 μm thickness on both sides is formed with a desired circuit and through holes, and then the one side circuit is blackened with an alkaline aqueous solution containing chlorite as a main component. The chemical treatment was performed. At this time, the surface roughness of the blackened circuit is 0.2 in Rz.
μm. Next, on the insulating adhesive layer on the aluminum plate, the circuit subjected to the blackening treatment was faced to the insulating adhesive layer and directly laminated by a laminating method to prepare a metal-based multilayer circuit board. The same evaluation as in Example 1 was performed on this metal-based multilayer circuit board. Table 1 shows the results.

【0025】〔実施例9〕黒化処理に変えて、硫酸−過
酸化水素水溶液にてエッチング処理をしたこと以外は実
施例8と同一の操作で得た金属ベース多層回路基板につ
いて、実施例1と同一の評価を行った。その結果を表1
に示す。
Example 9 A metal-based multilayer circuit board obtained by the same operation as in Example 8 except that etching treatment was performed with a sulfuric acid-hydrogen peroxide aqueous solution instead of the blackening treatment, The same evaluation was performed. The results are shown in Table 1.
Shown in

【0026】[0026]

【表1】 [Table 1]

【0027】[0027]

【発明の効果】本発明によれば、両面樹脂基板と金属板
とが絶縁接着剤層を介して強固に接合され、その結果と
して熱放散性に優れた金属ベース多層回路基板を容易に
得ることができる。
According to the present invention, the double-sided resin substrate and the metal plate are firmly bonded via the insulating adhesive layer, and as a result, a metal-based multi-layer circuit substrate having excellent heat dissipation can be easily obtained. You can

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の金属ベース多層回路基板の一例を示す
断面図。
FIG. 1 is a sectional view showing an example of a metal-based multilayer circuit board of the present invention.

【図2】本発明の金属ベース多層回路基板の他の一例を
示す断面図。
FIG. 2 is a cross-sectional view showing another example of the metal-based multilayer circuit board of the present invention.

【符号の説明】[Explanation of symbols]

1 金属板 2 絶縁接着剤層 3 両面樹脂基板 4 両面樹脂基板の上層の金属層 5 両面樹脂基板の下層の回路形成された金属層 6 両面樹脂基板の絶縁接着剤層 7 Cuメッキ層 DESCRIPTION OF SYMBOLS 1 Metal plate 2 Insulating adhesive layer 3 Double-sided resin substrate 4 Metal layer as upper layer of double-sided resin substrate 5 Metal layer on which lower layer of double-sided resin substrate is formed circuit 6 Insulating adhesive layer of double-sided resin substrate 7 Cu plating layer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも下層に回路形成された両面樹
脂基板を絶縁接着剤層を介して金属板上に積層した金属
ベース回路基板において、前記の下層の回路表面の表面
粗さがRzで0.1μm以上10μm以下であることを特徴
とする金属ベース多層回路基板。
1. A metal base circuit board in which a double-sided resin substrate having a circuit formed in at least a lower layer is laminated on a metal plate via an insulating adhesive layer, and the surface roughness of the circuit surface of the lower layer is 0.1 μm in Rz. A metal-based multilayer circuit board having a thickness of 10 μm or more.
【請求項2】 前記下層の回路表面に銅(Cu)メッキ
層を設けることを特徴とする請求項1記載の金属ベース
多層回路基板。
2. The metal-based multi-layer circuit board according to claim 1, wherein a copper (Cu) plating layer is provided on a surface of the lower circuit.
【請求項3】 前記Cuメッキ層が少なくともニッケル
(Ni)またはコバルト(Co)のいずれかを含むこと
を特徴とする請求項2記載の金属ベース多層回路基板。
3. The metal-based multilayer circuit board according to claim 2, wherein the Cu plating layer contains at least either nickel (Ni) or cobalt (Co).
JP8804595A 1995-04-12 1995-04-13 Metal-based multilayer circuit board Expired - Fee Related JP3282776B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP8804595A JP3282776B2 (en) 1995-04-13 1995-04-13 Metal-based multilayer circuit board
US08/629,229 US6175084B1 (en) 1995-04-12 1996-04-08 Metal-base multilayer circuit substrate having a heat conductive adhesive layer
KR1019960010843A KR100382631B1 (en) 1995-04-12 1996-04-10 Metal-based multilayer circuit board and semiconductor module having the same
EP96105663A EP0738007A3 (en) 1995-04-12 1996-04-10 Metal-base multilayer circuit substrate
US09/593,059 US6369332B1 (en) 1995-04-12 2000-06-13 Metal-base multilayer circuit substrate with heat conducting adhesive

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8804595A JP3282776B2 (en) 1995-04-13 1995-04-13 Metal-based multilayer circuit board

Publications (2)

Publication Number Publication Date
JPH08288659A true JPH08288659A (en) 1996-11-01
JP3282776B2 JP3282776B2 (en) 2002-05-20

Family

ID=13931869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8804595A Expired - Fee Related JP3282776B2 (en) 1995-04-12 1995-04-13 Metal-based multilayer circuit board

Country Status (1)

Country Link
JP (1) JP3282776B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6286207B1 (en) 1998-05-08 2001-09-11 Nec Corporation Resin structure in which manufacturing cost is cheap and sufficient adhesive strength can be obtained and method of manufacturing it
JPWO2019112048A1 (en) * 2017-12-08 2020-10-08 積水化学工業株式会社 Laminates and electronic devices

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6286207B1 (en) 1998-05-08 2001-09-11 Nec Corporation Resin structure in which manufacturing cost is cheap and sufficient adhesive strength can be obtained and method of manufacturing it
US6449835B1 (en) 1998-05-08 2002-09-17 Nec Corporation Resin structure in which manufacturing cost is cheap and sufficient adhesive strength can be obtained and method of manufacturing it
US6564448B1 (en) 1998-05-08 2003-05-20 Nec Corporation Resin structure in which manufacturing cost is cheap and sufficient adhesive strength can be obtained and method of manufacturing it
JPWO2019112048A1 (en) * 2017-12-08 2020-10-08 積水化学工業株式会社 Laminates and electronic devices
US11798863B2 (en) 2017-12-08 2023-10-24 Sekisui Chemical Co., Ltd. Laminate and electronic device

Also Published As

Publication number Publication date
JP3282776B2 (en) 2002-05-20

Similar Documents

Publication Publication Date Title
US6175084B1 (en) Metal-base multilayer circuit substrate having a heat conductive adhesive layer
JP4962228B2 (en) Multi-layer circuit board and motor drive circuit board
KR101044127B1 (en) Heat-dissipating substrate and fabricating method of the same
WO2007086498A1 (en) Substrate with built-in semiconductor element and built-in semiconductor element type multilayered circuit board
JP4953499B2 (en) Printed wiring board
JP5634185B2 (en) Hybrid heat dissipation board and method for manufacturing the same
US20100025099A1 (en) Circuit board and method of manufacturing the same
JP2007235164A (en) Multilayer printed wiring board
JP2002271032A (en) Printed wiring board and manufacturing method therefor
JP4863559B2 (en) Printed wiring board and printed wiring board manufacturing method
JP2801896B2 (en) Manufacturing method of metal-based multilayer circuit board
JP3595152B2 (en) Wiring board and method of manufacturing the same
JP3282776B2 (en) Metal-based multilayer circuit board
JP3174026B2 (en) Metal-based multilayer circuit board
JPH06350213A (en) Metal base board
JPH06224561A (en) Heat dissipating structure printed board and its manufacture
JP2003218287A (en) Board for mounting semiconductor element and semiconductor device
JPH08130372A (en) Manufacture of multilayer printed wiring board
JP3257953B2 (en) Method for manufacturing substrate for hybrid integrated circuit
JPH08148781A (en) Metal base multilayer circuit board
JP4187082B2 (en) Metal base circuit board and manufacturing method thereof
JPH08274123A (en) Method for manufacturing conductor for hybrid integrated circuit substrate
JP2000077804A (en) Wiring board and manufacture thereof
JP2003174262A (en) Manufacturing method of multilayer wiring plate
JPH10117069A (en) Metallic base multilayer circuit board

Legal Events

Date Code Title Description
S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080301

Year of fee payment: 6

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090301

Year of fee payment: 7

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100301

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110301

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110301

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120301

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130301

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130301

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140301

Year of fee payment: 12

LAPS Cancellation because of no payment of annual fees