JP2007235164A - Multilayer printed wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board where high-densification of wiring is easily achieved, peeling and occurrence of a crack can be suppressed, diffusion of metal ions in a filler can be prevented, and corrosion prevention of the filler by a laser beam is advantageously achieved. <P>SOLUTION: In the multilayer printed wiring board, a conductor circuit is formed on a substrate through an interlayer resin insulating layer. A through-hole is formed in the substrate, and the through-hole is filled with the filler. A conductor layer covering an exposed surface of the filler from the through-hole is formed immediately above the through-hole. Roughened layers in the same type are formed in whole surfaces of the conductor layer and the conductor circuit positioned in the same plane as the conductor layer. The roughened layers are formed on an inner wall of the through-hole. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a multilayer printed wiring board, and in particular, proposes a multilayer printed wiring board that can easily realize high-density wiring and that does not generate cracks or the like in a through-hole portion due to a heat cycle or the like.

Generally, a core substrate in a double-sided multilayer printed wiring board is formed with a through hole for electrically connecting the front surface and the back surface. However, this through hole becomes a dead space, and the high density of wiring is significantly hindered.
On the other hand, conventionally, in order to reduce this dead space, for example, in Patent Document 1, a resin is filled in a through hole, the surface of the resin is roughened, and a mounting pad is formed on the roughened surface by plating. Technology is disclosed.
Patent Document 2 discloses a technique for filling a through hole with a conductive paste and dissolving and removing an electrodeposition film covering the through hole to form a landless through hole.
Patent Document 3 discloses a technique in which a through-hole is filled with a conductive paste and copper plating is performed to form a plating film that covers the paste.
Furthermore, in Patent Document 4, after forming a copper plating film, for example, by electroless plating over the entire substrate surface including the inner wall of the through hole, the through hole is filled with a conductive material (conductive paste), and the conductivity A technique for coating a material with a copper plating film so as to seal the material in a through hole is disclosed.
Japanese Patent Laid-Open No. 9-8424 JP 2-196494 JP-A-1-143292 JP-A-4-92496

  However, in the double-sided multilayer printed wiring board as described in Patent Document 1, the resin surface must be roughened in order to ensure adhesion between the resin filled in the through hole and the mounting pad. In addition, since the thermal expansion coefficient is different between the resin and the metal, there is a problem that the conductor layer on the through hole is peeled off or a crack is generated due to the heat cycle.

  Further, in the technique described in Patent Document 2, when an opening for a via hole is formed with a laser beam at a position immediately above a through hole of an interlayer resin insulating layer, the conductive paste is exposed from the opening, so that the resin in the conductive paste There was a problem that even the ingredients were eroded.

  Moreover, in the printed wiring board as described in Patent Document 3, since the conductive paste is in direct contact with the inner wall of the through hole of the resin substrate, metal ions are likely to diffuse from the wall surface into the substrate when moisture is absorbed. There is a problem that a short circuit between conductors (through holes) is caused due to diffusion (migration) of the metal ions.

  Furthermore, in the printed wiring board as described in Patent Document 4, since the close contact between the conductive film of the through hole and the conductive material is poor, a gap is likely to exist between them. Therefore, if there is a gap between the conductive material and the through hole, the conductor layer on the through hole may be peeled off or cracked due to air or water in the gap under high temperature and high humidity conditions. There was a problem.

  The present invention has been made in order to solve the above-mentioned problems of the prior art, and its main purpose is to easily realize high-density wiring, and to suppress the occurrence of peeling and cracking, conductive paste (filling). It is an object of the present invention to provide a multilayer printed wiring board that can advantageously realize prevention of diffusion of metal ions in the material) and prevention of erosion of the conductive paste (filler) by laser light. Another object of the present invention is to propose a method that can advantageously manufacture such a multilayer printed wiring board.

The inventors diligently studied to realize the above object. As a result, the gist of the invention conceived by the inventors is as follows.
A multilayer printed wiring board having a structure in which a conductor circuit is formed on a substrate via an interlayer resin insulation layer, the substrate is provided with a through hole, and the through hole is filled with a filler.
A conductor layer that covers the exposed surface of the filler from the through hole is formed immediately above the through hole, and the conductor layer and the entire surface of the conductor circuit located in the same plane as the conductor layer are the same. The multilayer printed wiring board is characterized in that a roughened layer of a kind is formed and a roughened layer is formed on the inner wall of the through hole.

In the multilayer printed wiring board, a via hole is preferably formed in a portion located immediately above the through hole of the interlayer resin insulating layer.
In the multilayer printed wiring board, the filler is preferably made of metal particles and a thermosetting or thermoplastic resin.

  According to the present invention, it is possible to easily increase the density of wiring, suppress the occurrence of peeling and cracking, prevent the diffusion of metal ions in the filler, and further, on the filler filled in the through hole. By forming the conductor layer on the multilayer printed wiring board, the filler can be prevented from being eroded by the laser beam.

  In the multilayer printed wiring board of the present invention, a roughened layer is formed on the inner wall conductor surface of the through hole filled with the filler, and more preferably, the exposed from the through hole is formed on the filler filled in the through hole. It is characterized in that a conductor layer covering the surface is formed. According to such a configuration of the present invention, since a via hole can be formed immediately above the through hole, it is possible to easily realize high density wiring without a dead space.

  In the present invention, the roughened layer is formed on the conductor surface of the inner wall of the through hole because the filler and the through hole are in close contact with each other through the roughened layer and no gap is generated. If there is a gap between the filler and the through hole, the conductor layer formed by electroplating directly above it will not be flat, or the air in the gap will thermally expand and crack or peel off. On the other hand, water accumulates in the voids and causes migration and cracks. In this respect, the occurrence of such a defect can be prevented if the roughened layer is formed.

  In the present invention, the conductor layer is formed on the filler filled in the through hole when the via hole opening is formed with a laser beam at a position immediately above the through hole in the interlayer resin insulating layer. This is because the conductive layer prevents the resin component in the filler from being eroded.

  In the present invention, it is advantageous that a roughening layer similar to the roughening layer formed on the conductor surface of the inner wall of the through hole is formed on the surface of the conductor layer covering the exposed surface of the filler from the through hole. is there. This is because the roughened layer can improve the adhesion with the interlayer resin insulation layer and via hole. In particular, when a roughened layer is formed on the side surface of the conductor layer, cracks generated toward the interlayer resin insulating layer starting from these interfaces due to insufficient adhesion between the side surface of the conductor layer and the interlayer resin insulating layer are suppressed. Can do.

  The thickness of such a roughened layer is preferably 0.1 to 10 μm. This is because if it is too thick, it will cause a short circuit between layers, and if it is too thin, the adhesion to the adherend will be low. The roughened layer is formed by subjecting the conductor of the inner wall of the through hole or the surface of the conductor layer to oxidation (blackening) -reduction treatment, or treatment with a mixed aqueous solution of an organic acid and a cupric complex. Alternatively, those formed by plating a copper-nickel-phosphorus needle-like alloy are preferable.

Among these treatments, in the method using oxidation (blackening) -reduction treatment, NaOH (10 g / l), NaClO ₂ (40 g / l), and Na ₃ PO ₄ (6 g / l) are oxidized bath (blackening bath). , NaOH (10 g / l), NaBH ₄
(6 g / l) is the reducing bath.

Moreover, in the process using the mixed aqueous solution of an organic acid-cupric complex, it acts as follows under oxygen coexistence conditions such as spraying and bubbling to dissolve a metal foil such as copper which is a conductor circuit.
Cu + Cu (II) A _n → 2Cu (I) A _{n / 2}
2Cu (I) A _{n / 2} + n / 4O ₂ + nAH (aeration)
→ 2Cu (II) A _n + n / 2H ₂ O
A is a complexing agent (acting as a chelating agent), and n is a coordination number.

The cupric complex used in this treatment is preferably an azole cupric complex. This cupric complex of azoles acts as an oxidizing agent for oxidizing metallic copper and the like. As azoles, diazole, triazole, and tetrazole are preferable. Of these, imidazole, 2-methylimidazole, 2-ethylimidazole, 2-ethyl-4-methylimidazole, 2-phenylimidazole, 2-undecylimidazole and the like are preferable.
The content of the cupric complex of the azole is preferably 1 to 15% by weight. It is because it is excellent in solubility and stability if it is within this range.

The organic acid is added to dissolve the copper oxide.
Specific examples include formic acid, acetic acid, propionic acid, butyric acid, valeric acid, caproic acid, acrylic acid, crotonic acid, oxalic acid, malonic acid, succinic acid, glutaric acid, maleic acid, benzoic acid, glycolic acid, lactic acid, apple Any one selected from acids and sulfamic acids is preferable.
The content of the organic acid is preferably 0.1 to 30% by weight. This is to maintain the solubility of oxidized copper and to ensure dissolution stability.
In addition, the generated cuprous complex is dissolved by the action of an acid and combined with oxygen to form a cupric complex, which again contributes to the oxidation of copper.

In order to assist the dissolution of copper and the oxidizing action of azoles, halogen ions such as fluorine ions, chlorine ions and bromine ions may be added to the etching solution comprising the organic acid-cupric complex. This halogen ion can be supplied by adding hydrochloric acid, sodium chloride or the like.
The halogen ion amount is preferably 0.01 to 20% by weight. This is because, if it is within this range, the formed roughened layer has excellent adhesion to the interlayer resin insulating layer.

  The etching solution comprising this organic acid-cupric complex is prepared by dissolving a cupric complex of an azole and an organic acid (halogen ions as required) in water.

  Moreover, in the plating treatment of the acicular alloy composed of copper-nickel-phosphorus, copper sulfate 1-40 g / l, nickel sulfate 0.1-6.0 g / l, citric acid 10-20 g / l, hypophosphite 10-100 It is desirable to use a plating bath having a liquid composition comprising g / l, boric acid 10 to 40 g / l, and surfactant 0.01 to 10 g / l.

  In the present invention, the filler is preferably made of metal particles, a thermosetting resin and a curing agent, or made of metal particles and a thermoplastic resin, and a solvent may be added as necessary. When such a filler contains metal particles, the metal particles are exposed by polishing the surface, and are integrated with the plating film formed thereon via the exposed metal particles. Further, even under severe hot and humid conditions such as PCT (pressure cooker test), peeling hardly occurs at the interface with the conductor layer. Moreover, since this filler is filled in the through-hole in which the metal film is formed on the wall surface, migration of metal ions does not occur.

  As the metal particles, copper, gold, silver, aluminum, nickel, titanium, chromium, tin / lead, palladium, platinum or the like can be used. The particle diameter of the metal particles is preferably 0.1 to 50 μm. The reason is that if the thickness is less than 0.1 μm, the copper surface is oxidized and the wettability with respect to the resin is deteriorated, and if it exceeds 50 μm, the printability is deteriorated. The blending amount of the metal particles is preferably 30 to 90 wt% with respect to the total amount. This is because if the amount is less than 30 wt%, the adhesion of the conductor layer covering the filler exposed from the through hole is deteriorated, and if it exceeds 90 wt%, the printability is deteriorated.

Examples of resins used include epoxy resins, phenol resins, polyimide resins, polytetrafluoroethylene (PTFE) and other fluorine resins, bismaleimide triazine (BT) resins, FEP, PFA, PPS, PEN, PES, nylon, aramid, PEEK, PEKK, PET, etc. can be used.
As the curing agent, an imidazole-based, phenol-based, or amine-based curing agent can be used.
As the solvent, NMP (normal methyl pyrrolidone), DMDG (diethylene glycol dimethyl ether), glycerin, water, 1- or 2- or 3-cyclohexanol, cyclohexanone, methyl cellosolve, methyl cellosolve acetate, methanol, ethanol, butanol, propanol, Bisphenol A type epoxy can be used.

In particular, the optimum composition of this filler is a mixture of a 6: 4 to 9: 1 weight ratio of Cu powder and a bisphenol F type solventless epoxy (manufactured by Yuka Shell, trade name: E-807) and a curing agent. Or a combination of 8: 2: 3 Cu powder, PPS and NMP in weight ratio.
This filler is preferably non-conductive (specific resistance of 10 ⁸ Ω · cm or more). This is because the non-conductive material has a smaller curing shrinkage and is less likely to be peeled off from the conductor layer or via hole.

In the present invention, as the interlayer resin insulating layer, a thermosetting resin, a thermoplastic resin, or a composite of a thermosetting resin and a thermoplastic resin can be used.
As the thermosetting resin, epoxy resin, polyimide resin, phenol resin, thermosetting polyphenylene ether (PPE), or the like can be used.
Examples of the thermoplastic resin include fluorine resins such as polytetrafluoroethylene (PTFE), polyethylene terephthalate (PET), polysulfone (PSF), polyphenylene sulfide (PPS), thermoplastic polyphenylene ether (PPE), and polyether sulfone (PES). ), Polyetherimide (PEI), polyphenylene sulfone (PPES), tetrafluoroethylene hexafluoropropylene copolymer (FEP), tetrafluoroethylene perfluoroalkoxy copolymer (PFA), polyethylene naphthalate (PEN) , Polyether ether ketone (PEEK), polyolefin resin and the like can be used.
As the composite of the thermosetting resin and the thermoplastic resin, epoxy resin-PES, epoxy resin-PSF, epoxy resin-PPS, epoxy resin-PPES, and the like can be used.

  In the present invention, a glass cloth impregnated resin composite can be used as the interlayer resin insulation layer. Examples of the glass cloth-impregnated resin composite include glass cloth-impregnated epoxy, glass cloth-impregnated bismaleimide triazine, glass cloth-impregnated PTFE, glass cloth-impregnated PPE, and glass cloth-impregnated polyimide.

In the present invention, an adhesive for electroless plating can be used as the interlayer resin insulating layer.
As the electroless plating adhesive, heat-resistant resin particles that are soluble in a cured acid or oxidizing agent are dispersed in an uncured heat-resistant resin that becomes insoluble in an acid or oxidizing agent by the curing treatment. What is best. This is because the heat-resistant resin particles are dissolved and removed by treatment with an acid or an oxidizing agent, and a roughened surface made of crucible-like anchors can be formed on the surface.

In the above-mentioned adhesive for electroless plating, the heat-resistant resin particles particularly cured are (i) a heat-resistant resin powder having an average particle size of 10 μm or less, and (ii) a heat-resistant resin having an average particle size of 2 μm or less. Agglomerated particles obtained by agglomerating powder, (iii) a mixture of heat-resistant resin powder having an average particle diameter of 2 to 10 μm and heat-resistant resin powder having an average particle diameter of 2 μm or less, and (iv) an average particle diameter of 2 to 10 μm Pseudo particles formed by adhering at least one of a heat-resistant resin powder or an inorganic powder having an average particle size of 2 μm or less to the surface of the heat-resistant resin powder, and (v) a heat-resistant resin having an average particle size of 0.1 to 0.8 μm Powder and average particle size
It is desirable to use at least one selected from a mixture with a heat-resistant resin powder of more than 0.8 μm and less than 2 μm, and (vi) a heat-resistant resin powder having an average particle size of 0.1 to 1.0 μm. This is because more complex anchors can be formed. As the heat-resistant resin used in the electroless plating adhesive, the above-mentioned thermosetting resin, thermoplastic resin, and composite of thermosetting resin and thermoplastic resin can be used.

  In the present invention, the conductor layer formed on the substrate (including the one covering the filler filled in the through hole) and the conductor circuit formed on the interlayer resin insulating layer can be connected by a via hole. In this case, the via hole may be filled with a plating film or a filler.

  Hereinafter, a method for producing the multilayer printed wiring board of the present invention will be specifically described with an example. The method described below relates to a method for producing a multilayer printed wiring board by a semi-additive method, but the method for producing a multilayer printed wiring board in the present invention employs a full additive method, a multi-lamination method, and a pin lamination method. can do.

(1) Formation of through holes
(i). First, a through hole is drilled in the substrate, and electroless plating is applied to the wall surface of the through hole and the copper foil surface to form a through hole.
As the substrate, a glass epoxy substrate, a polyimide substrate, a bismaleimide-triazine resin substrate, a fluororesin substrate, or a resin substrate, a copper-clad laminate of these resin substrates, a ceramic substrate, a metal substrate, or the like can be used. In particular, when considering the dielectric constant, it is preferable to use a double-sided copper-clad fluororesin substrate. This substrate is obtained by thermocompression bonding a copper foil having one surface roughened to a fluororesin substrate such as polytetrafluoroethylene. Copper plating is preferable as the electroless plating. In the case of a substrate with poor plating, such as a fluororesin substrate, surface modification such as a pretreatment agent (trade name: manufactured by Junko Co., Ltd .: Tetra Etch) made of organic metal sodium, plasma treatment or the like is performed.

(ii). Next, electrolytic plating is performed for thickening. As this electrolytic plating, copper plating is preferable.
(iii). Further, a roughening layer is provided by roughening the inner wall of the through hole and the surface of the electrolytic plating film. The roughened layer may be formed by blackening (oxidation) -reduction treatment, formed by spraying a mixed aqueous solution of an organic acid and a cupric complex, or by copper-nickel-phosphorus needle alloy plating. is there.

(2) Filling with filler
(i). Fill the through hole formed in (1) with a filler. Specifically, the filler is filled in the through-hole by applying it by a printing method on a substrate on which a mask having an opening in the through-hole portion is placed, and is dried and cured after filling.

  In order to increase the adhesion between the metal powder and the resin, a metal surface modifier such as a silane coupling agent may be added to the filler. Further, as other additives, an antifoaming agent such as an acrylic antifoaming agent or a silicon antifoaming agent, or an inorganic filler such as silica, alumina or talc may be added. Moreover, you may make a silane coupling agent adhere to the surface of a metal particle.

  Such a filler is printed under the following conditions, for example. That is, printing is performed under the conditions of a Cu paste viscosity: 120 Pa · s, a squeegee speed: 13 mm / min, and a squeegee indentation amount: 1 mm using a Tetron mesh mask printing mask plate and a 45 ° square squeegee.

(ii). The filler protruding from the through hole and the roughened layer on the surface of the electrolytic plating film of the substrate are removed by polishing to flatten the substrate surface. Polishing is preferably a belt sander or buffing.

(3) Formation of conductor layer (In the invention described in claim 1 or 6, step (4) is directly performed without going through this step.)
(i). After applying catalyst nuclei to the surface of the substrate flattened in (2) above, electroless plating, electroplating, further forming an etching resist, and etching the non-resist forming part, the conductor circuit part and filling A conductor layer portion covering the material is formed. As the etching solution, an aqueous solution of sulfuric acid-hydrogen peroxide, an aqueous solution of persulfate such as ammonium persulfate, sodium persulfate, or potassium persulfate, or an aqueous solution of ferric chloride or cupric chloride is preferable.

(ii). Then, after removing the etching resist to form independent conductor circuits and conductor layers, a roughened layer is formed on the surfaces of the conductor circuits and conductor layers. When the roughened layer is formed on the surface of the conductor layer covering the conductor circuit and the filler, the conductor is excellent in adhesion to the interlayer resin insulation layer. Therefore, the side surface of the conductor layer covering the conductor circuit and the filler and the resin insulation layer No cracks starting from the interface with. On the other hand, the conductive layer covering the filler improves the adhesion with the electrically connected via hole.
The method for forming the roughened layer is as described above, and includes a method of forming by blackening (oxidation) -reduction treatment, acicular alloy plating, or etching.

Furthermore, after roughening, in order to eliminate unevenness due to the conductor layer on the substrate surface, a resin is applied and filled between the conductor circuits, this is cured, and the surface is polished and flattened until the conductor is exposed. Is desirable.
As the resin, it is desirable to use a bisphenol type epoxy resin such as a bisphenol A type epoxy resin or a bisphenol F type epoxy resin, a resin comprising an imidazole curing agent and inorganic particles. This is because the bisphenol type epoxy resin has a low viscosity and is easy to apply. In particular, the bisphenol F type epoxy resin is advantageous in that it does not require the use of a solvent, and therefore can prevent cracks and peeling due to the volatilization of the solvent during heat curing.
Furthermore, it is desirable to provide a roughened layer on the surface of the conductor layer after polishing.

In addition, the following processes are employable as a formation method of a conductor layer.
That is, a plating resist is formed on the substrate after the above steps (1) and (2), and then electroplating is performed on the non-resist forming portion to form a conductor circuit and a conductor layer portion, on these conductors. After forming a solder plating film using an electrolytic solder plating solution consisting of tin borofluoride, lead borofluoride, borohydrofluoric acid, and peptone, the plating resist is removed, and the electroless plating film and copper foil under the plating resist Is removed by etching to form an independent pattern, and the solder plating film is dissolved and removed with an aqueous borofluoric acid solution to form a conductor layer.

(4) Formation of interlayer resin insulation layer and conductor circuit
(i). An interlayer resin insulation layer is formed on the wiring board thus produced. As the interlayer resin insulation layer, a thermosetting resin, a thermoplastic resin, or a composite of a thermosetting resin and a thermoplastic resin can be used. In the present invention, the above-described adhesive for electroless plating can be used as the interlayer resin insulating material.
The interlayer resin insulation layer is formed by applying an uncured liquid of these resins or laminating a film-like resin by thermocompression bonding.

(ii). Next, an opening is provided in the interlayer resin insulation layer in order to ensure electrical connection with the underlying conductor circuit covered by this interlayer resin insulation layer.
The perforation of the opening is performed by exposure and development processing when the interlayer resin insulating layer is made of a photosensitive resin, and laser light is used when the interlayer resin insulating layer is made of a thermosetting resin or a thermoplastic resin. At this time, the laser beam used includes a carbon dioxide laser, an ultraviolet laser, an excimer laser, and the like. When drilling with laser light, a desmear treatment may be performed. This desmear treatment can be performed using an oxidant composed of an aqueous solution such as chromic acid or permanganate, or may be treated with oxygen plasma or the like.

(iii). After forming the interlayer resin insulation layer having an opening, the surface is roughened as necessary.
When the above-described electroless plating adhesive is used as an interlayer resin insulation layer, the surface is treated with an oxidizing agent to selectively remove only the heat-resistant resin particles and roughen. Even when a thermosetting resin or a thermoplastic resin is used, a surface roughening treatment with an oxidizing agent selected from aqueous solutions such as chromic acid and permanganate is effective. In the case of a resin such as a fluororesin (polytetrafluoroethylene or the like) that is not roughened by an oxidizing agent, the surface is roughened by plasma treatment or tetraetching.

(iv). Next, a catalyst nucleus for electroless plating is applied.
In general, the catalyst nucleus is a palladium-tin colloid, and the substrate is immersed in this solution, dried, and heat-treated to fix the catalyst nucleus on the resin surface. Moreover, a metal nucleus can be driven into the resin surface by CVD, sputtering, or plasma to form a catalyst nucleus. In this case, metal nuclei are embedded in the resin surface, and plating is deposited around the metal nuclei to form a conductor circuit, so that it is difficult to roughen such as resin or fluororesin (polytetrafluoroethylene, etc.) Even with a resin having poor adhesion between the resin and the conductor circuit, adhesion can be secured. The metal nucleus is preferably at least one selected from palladium, silver, gold, platinum, titanium, copper and nickel. The amount of metal core is preferably 20 μg / cm ² or less. This is because if this amount is exceeded, the metal nuclei must be removed.

(v). Next, electroless plating is performed on the surface of the interlayer resin insulation layer to form an electroless plating film on the entire surface. The thickness of the electroless plating film is 0.1 to 5 μm, more preferably 0.5 to 3 μm.
(vi). Then, a plating resist is formed on the electroless plating film. The plating resist is formed by laminating a photosensitive dry film and exposing and developing as described above.
(vii). Further, electrolytic plating is performed to thicken the conductor circuit portion. The electrolytic plating film is preferably 5 to 30 μm.
(viii). Further, after the plating resist is peeled off, the electroless plating film under the plating resist is dissolved and removed by etching to form independent conductor circuits (including via holes). As an etching solution, an aqueous solution of sulfuric acid-hydrogen peroxide, an aqueous solution of persulfate such as ammonium persulfate, sodium persulfate, or potassium persulfate, or an aqueous solution of ferric chloride or cupric chloride is preferable. In the following, description will be given based on examples.

Example 1
(1) Copper-clad laminate in which a 0.8 mm thick polytetrafluoroethylene resin (hereinafter abbreviated as trade name: Teflon) substrate 1 is laminated with a roughened 18 μm copper foil 2 on one side of the substrate side A plate (a glass fluororesin substrate manufactured by Matsushita Electric Works, trade name: R4737) was used as a starting material (see FIG. 1 (a)). First, this copper-clad laminate was drilled, and the inner wall surface was treated with an organic acid modifier (trade name: Tetra Etch) to improve surface wettability (Figure 1 (b) reference).

Next, a palladium-tin colloid was adhered and electroless plating was performed with the following composition to form an electroless plating film having a thickness of 2 μm on the entire surface of the substrate.
[Electroless plating aqueous solution]
EDTA 150g / l
Copper sulfate 20g / l
HCHO 30ml / l
NaOH 40g / l
α, α'-bipyridyl 80mg / l
PEG 0.1g / l
[Electroless plating conditions]
30 minutes at a liquid temperature of 70 ° C

Furthermore, electrolytic copper plating was performed under the following conditions to form an electrolytic copper plating film having a thickness of 15 μm (see FIG. 1 (c)).
(Electrolytic plating aqueous solution)
Sulfuric acid 180 g / l
Copper sulfate 80 g / l
Additive (product name: Kaparaside GL, manufactured by Atotech Japan)
1 ml / l
[Electrolytic plating conditions]
Current density 1A / dm ²
Time 30 minutes Temperature Room temperature

(2) A substrate on which an electroless copper plating film and a conductor made of an electrolytic copper plating film (including through-holes 3) are formed on the entire surface is washed with water, dried, then NaOH (10 g / l), NaClO ₂ (40 g / l), Na ₃ PO ₄ (6 g / l) is subjected to an oxidation-reduction treatment using an oxidation bath (blackening bath), NaOH (10 g / l), and NaBH ₄ (6 g / l) as a reduction bath. The roughening layer 4 was provided on the entire surface of the conductor including (see FIG. 1 (d)).

(3) Next, filler 5 containing copper particles having an average particle diameter of 10 μm (non-conductive hole-filled copper paste made by Tatsuta Electric Wire, trade name: DD paste) is filled in through-hole 3 by screen printing, and dried. Cured. Then, the filler 5 protruding from the roughened layer 4 and the through hole 3 on the upper surface of the conductor is removed by belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku), and scratches due to this belt sander polishing are further removed Buffing for removal was performed to flatten the substrate surface (see FIG. 1 (e)).

(4) Forming an electroless copper plating film 6 having a thickness of 0.6 μm by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate flattened in (3) and applying electroless copper plating according to a conventional method. (Fig. 1 (f)
reference).

(5) Next, electrolytic copper plating is performed under the following conditions to form an electrolytic copper plating film 7 having a thickness of 15 μm, thickening a portion to become the conductor circuit 9, and filling material 5 filled in the through hole 3 A portion to be the conductor layer 10 to be covered was formed.
(Electrolytic plating aqueous solution)
Sulfuric acid 180g / l
Copper sulfate 80g / l
Additive (product name: Kaparaside GL, manufactured by Atotech Japan)
1ml / l
[Electrolytic plating conditions]
Current density 1A / dm ²
Time 30 minutes Temperature Room temperature

(6) A commercially available photosensitive dry film is pasted on both sides of the substrate on which the conductor circuit 9 and the conductor layer 10 are formed, placed on a mask, exposed at 100 mJ / cm ² , and developed with 0.8% sodium carbonate. Then, an etching resist 8 having a thickness of 15 μm was formed (see FIG. 2A).

(7) Then, the portion of the plating film where the etching resist 8 is not formed is dissolved and removed by etching using a mixed solution of sulfuric acid and hydrogen peroxide, and the etching resist 8 is peeled and removed with 5% KOH. A conductor layer 10 covering the independent conductor circuit 9 and the filler 5 was formed (see FIG. 2B).

(8) Next, a roughened layer (concave / convex layer) 11 made of Cu-Ni-P alloy is formed on the surface of the conductor layer 10 covering the conductor circuit 9 and the filler 5, and this roughening is further performed. An Sn layer having a thickness of 0.3 μm was formed on the surface of the layer 11 (see FIG. 2C, the Sn layer is not shown).
The formation method is as follows. That is, the substrate is acid degreased and soft etched, and then treated with a catalyst solution composed of palladium chloride and an organic acid to give a Pd catalyst. After activating this catalyst, copper sulfate 8 g / l, nickel sulfate Plating in an electroless plating bath consisting of 0.6 g / l, citric acid 15 g / l, sodium hypophosphite 29 g / l, boric acid 31 g / l, surfactant 0.1 g / l, pH = 9, conductor A roughened layer 10 of Cu—Ni—P alloy was provided on the surface of the conductor layer 8 covering the circuit 7 and the filler 5. Next, a Cu-Sn substitution reaction was carried out under the conditions of tin borofluoride 0.1 mol / l, thiourea 1.0 mol / l, temperature 50 ° C., pH = 1.2, and a 0.3 μm thick Sn layer was provided on the surface of the roughened layer 10. (The Sn layer is not shown).

(9) on both sides of a substrate, a Teflon sheet (DuPont of FEP film, trade name: Teflon ^R FEP) having a thickness of 25μm temperature 200 ° C., after stacking a pressure 20 kg / cm ^2, and annealed at 290 ° C. interlayer A resin insulating layer 12 was provided (see FIG. 2 (d)).

(10) A via hole opening 13 having a diameter of 25 μm was provided in the Teflon resin insulating layer 12 with an ultraviolet laser having a wavelength of 10.6 μm (see FIG. 2 (e)). Further, the surface of the Teflon resin insulating layer 12 was roughened by plasma treatment. The plasma processing conditions are 500 W, 500 mTorr, 10 minutes.

(11) Sputtering using Pd as a target was performed under the conditions of an atmospheric pressure of 0.6 Pa, a temperature of 100 ° C., a voltage of 200 W, and a time of 1 minute, and Pd nuclei were implanted into the surface of the Teflon resin insulating layer 12. At this time, SV-4540 manufactured by Nippon Vacuum Technology Co., Ltd. was used as an apparatus for sputtering.
The amount of Pd to be implanted was 20 μg / cm ² or less. The amount of Pd was determined by immersing the substrate in a 6N hydrochloric acid aqueous solution, measuring the total amount of eluted Pd by the atomic absorption method, and dividing the total amount of Pd by the exposed area.

(12) The electroless plating of (1) was applied to the substrate after the processing of (11), and an electroless plating film 14 having a thickness of 0.7 μm was formed on the surface of the Teflon resin insulating layer 12 (FIG. 3 (a)).

(13) A commercially available photosensitive dry film is pasted on both sides of the substrate on which the electroless plating film 14 is formed in the above (12), a photomask film is placed, exposed at 100 mJ / cm ² , 0.8% sodium carbonate And a plating resist 16 having a thickness of 15 μm was provided (see FIG. 3B).

(14) Further, the electrolytic plating of the above (1) was performed to form an electrolytic plating film 15 having a thickness of 15 μm, the conductor circuit 9 was thickened, and the via hole 17 was filled with plating ( (See FIG. 3 (c)).
(15) Further, after removing the plating resist 16 with 5% KOH, the electroless plating film 14 under the plating resist 16 is dissolved and removed by etching using a mixed solution of sulfuric acid and hydrogen peroxide. A conductor circuit 9 (including the via hole 17) having a thickness of 16 μm composed of the copper plating film 14 and the electrolytic copper plating film 15 was formed to manufacture a multilayer printed wiring board (see FIG. 3D).

(Example 2)
A multilayer printed wiring board was manufactured in the same manner as in Example 1 except that a copper paste was filled in the through hole, but no conductor layer covering the exposed surface of the copper paste from the through hole was provided. In this method, when the opening is formed in the resin insulating layer with a laser beam, the surface of the copper paste is easily removed, and a dent may occur.

(Example 3)
A multilayer printed wiring board was produced in the same manner as in Example 1 except that the following composition was used as the filler.
Bisphenol F epoxy resin (Oilized Shell, E-807) 100 parts by weight imidazole curing agent (Shikoku Kasei, 2E4MZ-CN) 5 parts by weight Copper powder with a particle size of 15 μm or less (Fukuda Metal Foil Powder Industries, SCR- Cu-15) 735 parts by weight Aerosil (# 200) 10 parts by weight Defoamer (San Nopco, Perenol S4) 0.5 parts by weight

(Comparative Example 1)
A multilayer printed wiring board was produced in the same manner as in Example 1 except that through holes were provided in the substrate and the through holes were directly filled with copper paste.

(Comparative Example 2)
A multilayer printed wiring board was produced in the same manner as in Example 1 except that the through hole was filled with an epoxy resin and the surface of the epoxy resin exposed from the through hole was roughened with chromic acid and then covered with a conductor layer.

(Comparative Example 3)
A multilayer printed wiring board was produced in the same manner as in Example 1 except that no roughening layer was provided on the conductor surface of the inner wall of the through hole.

The multilayer printed wiring boards of Examples and Comparative Examples thus produced were subjected to 1000 heat cycle tests at −55 ° C. × 15 minutes, normal temperature × 10 minutes, and 125 ° C. × 15 minutes.
In addition, PCT test (pressure) for 200 hours under the conditions of humidity 100%, temperature 121 ° C, pressure 2 atm.
cooker test), and the presence or absence of copper migration between through holes was observed.

  As a result, according to the multilayer printed wiring board of the example, since a via hole can be formed immediately above the through hole, high density can be easily realized, and cracks and migration due to a heat cycle test or a PCT test were not observed. . On the other hand, in the multilayer printed wiring board of Comparative Example 1, copper diffusion (migration) was observed along the glass cloth in the Teflon substrate. In the multilayer printed wiring boards of Comparative Examples 2 and 3, peeling of the conductor layer covering the vicinity of the through hole was observed.

(a)-(f) is a figure which shows a part of manufacturing process of the multilayer printed wiring board concerning this invention. (a)-(e) is a figure which shows a part of manufacturing process of the multilayer printed wiring board concerning this invention. (a)-(d) is a figure which shows a part of manufacturing process of the multilayer printed wiring board concerning this invention.

Explanation of symbols

1 Substrate 2 Copper foil 3 Through hole 4, 11 Roughening layer 5 Filler 6, 14 Electroless plating film 7, 15 Electrolytic plating film 8 Etching resist 9 Conductor circuit
10 Conductor layer
12 Interlayer resin insulation layer (Teflon resin insulation layer)
13 Opening for via hole
16 Plating resist
17 Bahia Hall

Claims (3)

A multilayer printed wiring board having a structure in which a conductor circuit is formed on a substrate via an interlayer resin insulation layer, the substrate is provided with a through hole, and the through hole is filled with a filler.
A conductor layer that covers the exposed surface of the filler from the through hole is formed immediately above the through hole, and the conductor layer and the entire surface of the conductor circuit located in the same plane as the conductor layer are the same. A multilayer printed wiring board, wherein a roughened layer of a kind is formed and a roughened layer is formed on an inner wall of the through hole. 2. The multilayer printed wiring board according to claim 1, wherein a via hole is formed in a portion of the interlayer resin insulating layer located immediately above the through hole. The multilayer printed wiring board according to claim 1, wherein the filler is made of metal particles and a thermosetting or thermoplastic resin.

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