JP2002050868A - Method of manufacturing multilayered printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To manufacture a multilayered printed wiring board in which an opening for via hole is completely filled up with a metal and the upper surfaces of the via hole and a conductor circuit are almost made flush with each other. SOLUTION: A method of manufacturing multilayered printed wiring board includes a step of forming a resin insulating layer having the opening for via hole by performing exposure, development, or laser beam machining, a step of forming a metallic layer composed at least of one kind selected from among a group composed of Cu, Ni, P, Pd, Co, and W on the surfaces of the resin insulating layer and opening for via hole, and a step of forming an electroplated film on the metallic layer by using an electroplating solution containing a copper sulfate, a sulfuric acid, chlorine ions, and an additive composed at least of a leveling agent and a brightening agent at mixing rations of 50-300 g/l, 30-200 g/l, 25-90 mg/l, and 1-1,000 mg/l, respectively. The method also includes a step of forming the conductor circuit by etching after an etching resist is formed on the electroplated layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed wiring board using an electrolytic plating solution having a specific composition.

[0002]

2. Description of the Related Art A multilayer printed wiring board called a so-called multilayer build-up wiring board is manufactured by a semi-additive method or the like.
m on a resin substrate reinforced with glass cloth, etc.
It is manufactured by alternately laminating a conductor circuit made of copper or the like and a resin insulating layer. The connection between the conductor circuits via the resin insulating layer of the multilayer printed wiring board is performed by via holes.

Conventionally, build-up multilayer printed wiring boards have been manufactured by a method disclosed in, for example, Japanese Patent Application Laid-Open No. 9-130050. That is, first, a through-hole is formed in the copper-clad laminate on which the copper foil is stuck, and then a through-hole is formed by performing an electroless copper plating process. Subsequently, a conductive circuit is formed by etching the surface of the substrate into a conductive pattern, and a roughened surface is formed on the surface of the conductive circuit by electroless plating, etching, or the like. Then, after forming a resin insulating layer on the conductor circuit having the roughened surface, exposure and development processing are performed to form an opening for a via hole, and then the resin insulating layer is subjected to UV curing and main curing. Form.

Further, after a resin insulating layer is subjected to a roughening treatment with an acid or an oxidizing agent, a thin metal layer is formed, a plating resist is formed on the metal layer, and a thickening is performed by electrolytic plating. After the plating resist is peeled off, etching is performed to form a conductor circuit connected to the underlying conductor circuit by a via hole. After repeating this step, finally, a solder resist layer for protecting the conductor circuit is formed, and plating or the like is applied to a portion where the opening is exposed for connection with an electronic component such as an IC chip or a motherboard. After that, the solder paste is printed to form solder bumps, thereby completing the manufacture of the build-up multilayer printed wiring board.

In the manufacture of such a build-up multilayer printed wiring board, when a conductive circuit connected to a lower conductive circuit and a via hole is formed by performing electroless plating and electrolytic plating, a via hole opening is required. Is not completely filled with metal, and as shown in FIG.
A recess was formed around the via hole. In addition,
FIG. 15 is a sectional view showing a section of a via hole of a conventional multilayer printed wiring board.

[0006]

As described above, in the conventional build-up multilayer printed wiring board, since the upper surface of the conductor circuit, especially the periphery of the via hole, is not flat, when a resin insulating layer is formed on the upper surface of the conductor circuit, In some cases, undulation occurs in the resin insulating layer, causing peeling or cracking of the resin insulating layer, or causing disconnection in a conductor circuit formed in an upper layer of the resin insulating layer.

As a structure of a build-up multilayer printed wiring board for shortening the wiring distance in order to increase the speed and fineness of the printed wiring board, a stacked via structure (a structure in which a via hole is formed immediately above a via hole, FIG. 1) See). However, as described above, the build-up multilayer printed wiring board manufactured by the conventional method is
Since the via hole opening is not completely filled with metal, it has been difficult to form a stacked via structure.

[0008]

Means for Solving the Problems The inventors of the present invention have conducted intensive studies in view of the above problems, and as a result, have found that an electrolytic plating solution containing a specific leveling agent and an additive consisting of a brightener in a specific ratio is used. It has been found that a via hole opening can be completely filled with metal, and a multilayer printed wiring board can be manufactured in which the upper surface of the via hole and the upper surface of the conductor circuit in the same layer are substantially flush with each other. The inventors have arrived at the invention having the contents shown in the summary.

That is, the method for manufacturing a multilayer printed wiring board according to the present invention comprises at least the following steps (a) to (d), ie, (a) exposure and development processing, or laser processing, whereby a via hole opening is formed. (B) forming at least one selected from the group consisting of Cu, Ni, P, Pd, Co and W on the surfaces of the resin insulating layer and the via hole opening; Forming a metal layer, (c) 50-300 g / l copper sulfate, 30-200 g / l sulfuric acid, 25-90 mg / l chloride ion, and 1-1000 mg comprising at least a leveling agent and a brightening agent (D) forming an electrolytic plating film on the metal layer using an electrolytic plating solution containing an / l additive, and (d) forming an etching resist on the electrolytic plating film. Forming a conductor circuit by etching, characterized in that it comprises a.

In the method for manufacturing a multilayer printed wiring board according to the present invention, in the step (b), the metal layer is preferably formed by performing sputtering, plating, or sputtering and plating. Further, the resin insulating layer is at least one selected from the group consisting of a fluororesin, a polyolefin-based resin, and a polyphenylene-based resin, or is a resin composite containing a thermoplastic resin and a thermosetting resin. Is desirable.

In the step (c), it is preferable to use at least one selected from the group consisting of polyethylene, derivatives thereof, gelatin and derivatives thereof as the leveling agent contained in the electrolytic plating solution. In addition, as the brightener, it is desirable to use at least one selected from the group consisting of oxide sulfur, its related compound, hydrogen sulfide, its related compound, and other sulfur compounds.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION The method for manufacturing a multilayer printed wiring board according to the present invention is characterized in that at least the following steps (a) to (d), ie, (a) exposure and development processing or laser processing are performed, Forming a resin insulating layer having an opening for use in a substrate, and (b) forming at least one selected from the group consisting of Cu, Ni, P, Pd, Co and W on the surfaces of the resin insulating layer and the opening for the via hole. Forming a metal layer consisting of (c) 50-300 g / l copper sulfate, 30-200 g / l sulfuric acid, 25-90 mg / l chloride ion, and at least a leveling agent and a brightener A step of forming an electrolytic plating film on the metal layer using an electrolytic plating solution containing -1000 mg / l of an additive; and (d) forming an etching resist on the electrolytic plating film. , Characterized in that it comprises a step, to form a conductor circuit by etching.

In the method for manufacturing a multilayer printed wiring board, when forming the electrolytic plating film in step (c),
300 g / l copper sulfate, 30-200 g / l sulfuric acid, 2
It is characterized by using an electrolytic plating solution containing 5 to 90 mg / l of chloride ions and 1 to 1000 mg / l of an additive composed of at least a leveling agent and a brightening agent.

By performing electrolytic plating using an electrolytic plating solution having such a composition, the via hole opening is completely filled with metal, and the upper surface of the via hole and the upper surface of the conductor circuit in the same layer are substantially the same. This makes it possible to manufacture a multilayer printed wiring board having via holes in a plane (hereinafter, such via holes are also referred to as field vias). That is, the electrolytic plating solution having such a composition is most suitable for the field via electrolytic plating solution.

In the above electrolytic plating solution, if the concentration of copper sulfate is less than 50 g / l, a field via cannot be formed,
If it exceeds 300 g / l, the variation in plating film thickness will be large. On the other hand, when the concentration of sulfuric acid is less than 30 g / l, the liquid resistance becomes large, so that the plating is difficult to deposit, and
If it exceeds 00 g / l, copper sulfate tends to be crystallized. If the chlorine ion concentration is less than 25 mg / l, the gloss of the plating film is reduced, and if it exceeds 90 mg / l, the anode is difficult to dissolve.

Further, by using the electrolytic plating solution having such a composition, regardless of the opening diameter of the via hole, the material and thickness of the resin insulating layer, the presence or absence of the roughened surface of the resin insulating layer, etc.
Field vias can be formed.

Further, since the electrolytic plating solution contains copper ions at a high concentration, the copper ions are sufficiently supplied to the via hole openings, and the plating speed of the via hole openings is 40 to 100 μm / hour. Can be plated with
The speed of the electrolytic plating process can be increased.

Further, since the electrolytic plating solution contains sulfuric acid at a high concentration, the liquid resistance during plating can be reduced. Therefore, the current density of the plating solution increases,
The growth of the plating film in the via hole opening is not hindered, and is suitable for forming a field via structure.

The desirable composition of the above electrolytic plating solution is 10
0-250 g / l of copper sulfate, 50-150 g / l of sulfuric acid, 30-70 mg / l of chloride ion, and 1-600 mg / l of at least a leveling agent and a brightening agent
This is a composition containing 1 additive.

The above additives only need to be composed of at least a leveling agent and a brightening agent, and may contain other components.

As the leveling agent, for example, it is desirable to use at least one selected from the group consisting of polyethylene, derivatives thereof, gelatin and derivatives thereof.

The polyethylene derivative is not particularly restricted but includes, for example, polyethylene isophthalate, polyethylene imine, polyethylene oxide, polyethylene glycol, polyethylene glycol ester, polyethylene glycol ether, polyethylene sulfide, polyether and the like. Among these, it is desirable to use polyethylene glycol or gelatin. This is because the versatility is high and there is no damage to the resin insulating layer and the metal film.

As the brightener, it is desirable to use, for example, at least one selected from the group consisting of sulfur oxides, its related compounds, hydrogen sulfide, its related compounds and other sulfur compounds.

The above-mentioned sulfur oxide and its related compounds are not particularly restricted but include, for example, sulfonic acid compounds, sulfone compounds, sulfite compounds and other oxide sulfur compounds.

The sulfonic acid compound is not particularly restricted but includes, for example, sulfobenzoic acid, sulfobenzoate,
Sulfoanthraquinone, sulfomethane, sulfoethane,
Sulfocarbamide, sulfosuccinic acid, sulfosuccinate, sulfoacetic acid, sulfosalicylic acid, sulfocyanuric acid, sulfocyanic acid, sulfocyanic acid ester, sulfonine, sulfovinic acid, sulfophthalic acid, sulfonamide, sulfonimide, etc., and sulfocarbanilide etc. And the like.

The sulfone compound is not particularly restricted but includes, for example, sulfonal, sulfonyldiacetate, sulfonyldiphenylmethane, sulfoxylic acid, sulfoxylate, sulfonamide, sulfonimide and the like;
Sulfonyl chloride compounds and the like can be mentioned.

The sulfite compound is not particularly limited, and examples thereof include sulfurous acid, ammonium sulfite, potassium sulfite, diethyl sulfite, dimethyl sulfite, sodium hydrogen sulfite, and sulfite compounds.

The above-mentioned other oxide sulfur compounds are not particularly restricted but include, for example, sulfoxide.

The above-mentioned hydrogen sulfide and its related compounds are not particularly restricted but include, for example, sulfonium compounds and
Sulfonium salts and the like can be mentioned.

The above-mentioned other sulfur compounds are not particularly restricted but include, for example, bisdisulfide.

The above-mentioned electrolytic plating solution further contains the above-mentioned brightener so that the via hole opening can be completely filled with metal when a multilayer printed wiring board is manufactured, and the above-mentioned leveling agent is contained. By doing so, the upper surface of the via hole and the upper surface of the conductor circuit in the same layer can be formed on substantially the same plane.

This is because the brightener activates a low current portion of the via hole opening, thereby accelerating plating deposition on the via hole opening, and adsorbing the leveling agent on the surface of the conductor circuit. This suppresses the deposition of plating on the surface of the conductor circuit.

The amount of the leveling agent is from 1 to 100.
0 mg / l is desirable, and the blending amount of the brightener is 0.1
-100 mg / l is desirable. The mixing ratio of the two is preferably 2: 1 to 10: 1.

If the amount of the leveling agent is too small, the amount of the leveling agent adsorbed on the surface of the conductor circuit is small, and
Plating deposition on conductor circuits becomes faster. On the other hand, if the amount of the leveling agent is too large, the amount of the leveling agent adsorbed on the bottom of the via hole opening is large, and the deposition of plating on the via hole opening becomes slow.

On the other hand, if the amount of the brightener is too small, the bottom of the via hole opening cannot be activated, and the via hole opening cannot be completely filled with metal by plating. On the other hand, if the amount is too large, the deposition of the plating on the conductor circuit portion is accelerated, and a step occurs between the upper surface of the conductor circuit and the upper surface of the via hole.

The electrolytic plating method using such an electrolytic plating solution is not particularly limited, and the following electrolytic plating method and the like can be used. That is, a DC electrolytic plating method (DC plating method), which is a general electrolytic plating method, or a method of controlling a current to a rectangular wave pulse current by alternately repeating supply and interruption of a cathode current (PC plating method). A pulse-reverse electroplating method (PR plating method) in which the supply of the cathode current and the supply of the anode current are alternately inverted and repeated to control the current using a periodic reversal wave; A method of alternately applying a pulse and a low-density current pulse can be used. Among them, the DC electrolytic plating method is preferable because it is suitable for forming a field via when manufacturing a multilayer printed wiring board, and does not require an expensive power supply device or control device.

Hereinafter, a method for manufacturing a multilayer printed wiring board of the present invention using the above electrolytic plating solution will be described in the order of steps. (1) In the method for manufacturing a multilayer printed wiring board according to the present invention, first, a substrate having a conductive circuit formed on a surface of an insulating substrate is prepared.

As the insulating substrate, a resin substrate is desirable, and specific examples thereof include a glass epoxy substrate, a polyimide substrate, a bismaleimide triazine resin substrate, a fluororesin substrate, a ceramic substrate, and a copper-clad laminate. In the method for manufacturing a multilayer printed wiring board according to the present invention, a through hole is formed in the insulating substrate by a drill or the like, and the surface conductive film and the through hole are formed by performing electroless plating on the wall surface of the through hole and the copper foil surface. . Copper plating is preferred as the electroless plating.

After the electroless plating, a roughened surface forming process is usually performed on the inner wall of the through hole and the surface of the electroless plated film. Examples of the roughening treatment method include blackening (oxidation) -reduction treatment, spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, and treatment with Cu-Ni-P needle-like alloy plating.

(2) Next, a conductive circuit-shaped etching resist is formed on the substrate on which electroless plating has been performed, and etching is performed to form a conductive circuit. Next, a resin filler is applied to the surface of the substrate on which the conductive circuit is formed, dried to a semi-cured state, then polished, the resin filler layer is ground, and the upper part of the conductive circuit is also ground. Then, both main surfaces of the substrate are flattened. Thereafter, the layer of the resin filler is completely cured. When forming the resin filler layer, using a mask having openings formed in the conductor circuit non-forming portions, only the conductor circuit non-forming portions in which the concave portions are formed by etching are filled with the resin filler, and then, The above-described polishing treatment or the like may be performed.

(3) Next, a roughened layer or a roughened surface (hereinafter, also referred to as a roughened layer) is formed on the conductor circuit, if necessary. Examples of the roughening treatment method include a blackening (oxidation) -reduction treatment, a spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, and a treatment with Cu-Ni-P alloy plating.

(4) Then, if necessary, a coating layer made of tin, zinc, copper, nickel, cobalt, thallium, lead, or the like is formed on the surface of the formed roughened layer by electroless plating, vapor deposition, or the like. By depositing the coating layer in the range of 0.01 to 2 μm, the conductor circuit exposed from the resin insulating layer can be protected from a roughening solution or an etching solution, and discoloration and dissolution of the inner layer pattern can be reliably prevented. Because.

(5) Thereafter, an uncured resin layer to be a resin insulating layer is formed on the conductor circuit on which the roughened layer has been formed through a post-process. As the material of the resin insulating layer, a thermosetting resin, a thermoplastic resin, a resin obtained by sensitizing a part of the thermosetting resin, or a composite resin thereof can be used. The uncured resin layer may be formed by applying an uncured resin, or may be formed by thermocompression bonding an uncured resin film. Further, a resin film in which a metal layer such as a copper foil is formed on one surface of an uncured resin film may be attached. When such a resin film is used, an opening is provided by etching a metal layer in a via hole forming portion and then irradiating a laser beam. As the resin film having the metal layer formed thereon, a resin-coated copper foil or the like can be used.

Among these resin insulating layer materials, polyolefin resins and polyphenylene resins (PPE,
PPO, etc.) and fluorine-based resins are desirable. This is because it is suitable for forming a resin insulating layer having a low dielectric constant. Examples of the polyolefin-based resin include the polyethylene, polypropylene, polyisobutylene, polybutadiene, polyisoprene, 2-norbornene, 5-ethylidene-2-norbornene, and copolymers of these resins. As, for example, ethyl /
Examples include tetrafluoroethylene copolymer resin (ETFE) and polychlorotrifluoroethylene (PCTFE).

As the material of the resin insulating layer, it is desirable to use a resin composite containing the thermoplastic resin and the thermosetting resin. This is because they are excellent in heat resistance, crack resistance, insulation properties, shape retention of via holes, and the like. Therefore, the multilayer printed wiring board having the above-mentioned resin insulating layer has excellent electrical connectivity and reliability.

Examples of the thermoplastic resin include polysulfone (PSF) and polyethersulfone (PE).
S), polyphenylene sulfone (PPS), polyphenylene sulfide (PPES), polyphenylene ether (PPE), polyetherimide (PI), phenoxy resin, fluorine resin and the like. Of these, polysulfone (PSF), polyethersulfone (PES), polyetherimide (PI) and / or phenoxy resin are desirable. It has excellent heat resistance and insulation properties, and has a high toughness value.
This is because it is particularly suitable for forming a resin insulating layer having excellent shape retention.

Examples of the thermosetting resin include an epoxy resin, a phenol resin, and a polyimide resin. The thermosetting resin may be a photosensitized resin, and specifically, for example, a resin obtained by subjecting a thermosetting group to methacrylic acid, acrylic acid, or the like to undergo an acrylation reaction. In particular, an acrylated epoxy resin is desirable. Among these, an epoxy resin having two or more epoxy groups in one molecule is more desirable.

Examples of the epoxy resin include cresol novolak type epoxy resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, phenol novolak type epoxy resin, alkylphenol novolak type epoxy resin, biphenol F type epoxy resin, and naphthalene type epoxy resin. Resin, dicyclopentadiene type epoxy resin, epoxidized product of condensate of phenols and aromatic aldehyde having phenolic hydroxyl group,
Triglycidyl isocyanurate, alicyclic epoxy resin and the like. These may be used alone or in combination of two or more. Thereby, it becomes excellent in heat resistance and the like.

The mixing ratio of the thermoplastic resin and the thermosetting resin in the above resin composite is desirably thermosetting resin / thermoplastic resin = 95/5 to 50/50. This is because a high toughness value can be secured without impairing the heat resistance. Further, the resin composite may be a photosensitive resin provided with photosensitivity. When a photosensitive resin is used, the opening for the via hole can be formed by exposure and development processing.

As a specific example of the above resin composite, for example, particles soluble in an acid or an oxidizing agent (hereinafter, referred to as soluble particles) are contained in a resin which is hardly soluble in an acid or oxidizing agent (hereinafter, referred to as a hardly soluble resin). Dispersed resin compositions for forming a roughened surface are exemplified. In addition, the above "poorly soluble" and "soluble"
The term, when immersed in the same roughening liquid for the same time,
Those with a relatively fast dissolution rate are called "soluble" for convenience, and those with a relatively slow dissolution rate are called "poorly soluble" for convenience.

Examples of the soluble particles include resin particles soluble in an acid or an oxidizing agent (hereinafter referred to as “soluble resin particles”), inorganic particles soluble in an acid or an oxidizing agent (hereinafter referred to as “soluble inorganic particles”), and an acid or an oxidizing agent. Soluble metal particles (hereinafter referred to as “soluble metal particles”) and the like. These soluble particles may be used alone or in combination of two or more.

The shape of the soluble particles is not particularly limited.
Spherical, crushed and the like. The shape of the soluble particles is desirably a uniform shape. This is because a roughened surface having unevenness with a uniform roughness can be formed.

The average particle size of the above-mentioned soluble particles is 0.1.
1 to 10 μm is desirable. Within this particle size range, 2
It may contain more than one kind of different particle size. That is, it contains soluble particles having an average particle size of 0.1 to 0.5 μm and soluble particles having an average particle size of 1 to 3 μm. Thereby, a more complicated roughened surface can be formed, and the adhesion to the conductor circuit is excellent. In addition, in this specification, the particle size of a soluble particle is the length of the longest part of a soluble particle.

The soluble resin particles are not particularly limited as long as they have a higher dissolution rate than the hardly soluble resin when immersed in a solution containing an acid or an oxidizing agent. Epoxy resin, phenol resin, polyimide resin, polyphenylene resin, polyolefin resin, fluororesin, amino resin (melamine resin,
(Urea resin, guanamine resin) and the like, and may be one of these resins or a mixture of two or more resins.

The soluble resin particles include (a) a soluble resin powder having an average particle size of 10 μm or less, (b) an aggregated particle obtained by aggregating a soluble resin powder having an average particle size of 2 μm or less,
(c) a mixture of a soluble resin powder having an average particle size of 2 to 10 μm and a soluble resin powder having an average particle size of 2 μm or less, and (d) an average particle size of 2 to 10 μm on the surface of the soluble resin powder. Pseudo particles obtained by adhering at least one of a soluble resin powder or an inorganic powder of 2 μm or less, (e) a soluble resin powder having an average particle size of 0.1 to 0.8 μm and an average particle size of 0.8 μm; (F) It is desirable to use a soluble resin powder having an average particle diameter of 0.1 to 1.0 μm. This is because these can form a more complicated anchor.

As the soluble resin particles, resin particles made of rubber can be used. Examples of the rubber include polybutadiene rubber, various modified polybutadiene rubbers such as epoxy-modified, urethane-modified, (meth) acrylonitrile-modified, and (meth) acrylonitrile-butadiene rubber containing a carboxyl group.

By using these rubbers, the soluble resin particles are easily dissolved in an acid or an oxidizing agent. In other words, when dissolving the soluble resin particles using an acid, an acid other than a strong acid can be dissolved, and when dissolving the soluble resin particles using an oxidizing agent, permanganese having a relatively weak oxidizing power is used. It can also dissolve in acids. Even when chromic acid is used, it can be dissolved at a low concentration. Therefore, no acid or oxidizing agent remains on the resin surface,
As will be described later, when a catalyst such as palladium chloride is applied after the formation of the roughened surface, no catalyst is applied or the catalyst is not oxidized.

Examples of the soluble inorganic particles include particles made of at least one selected from the group consisting of aluminum compounds, calcium compounds, potassium compounds, magnesium compounds and silicon compounds.

Examples of the aluminum compound include alumina and aluminum hydroxide. Examples of the calcium compound include calcium carbonate and
Calcium hydroxide and the like, as the potassium compound, for example, potassium carbonate and the like, as the magnesium compound, for example, magnesia, dolomite, basic magnesium carbonate and the like, as the silicon compound, For example, silica, zeolite and the like can be mentioned. These may be used alone or in combination of two or more.

The soluble metal particles include, for example,
Copper, nickel, iron, zinc, lead, gold, silver, aluminum,
Examples include particles made of at least one selected from the group consisting of magnesium, calcium, and silicon. These soluble metal particles may have a surface layer coated with a resin or the like in order to ensure insulation.

When two or more of the above-mentioned soluble particles are used in combination, the combination of the two types of soluble particles to be mixed is preferably a combination of resin particles and inorganic particles. Both have low conductivity, so that insulation between the upper and lower conductor circuits can be ensured, and thermal expansion can be easily adjusted with the poorly soluble resin. This is because peeling does not occur between the layer and the conductor circuit.

The hardly soluble resin may be any resin that can retain the shape of the roughened surface when the roughened surface is formed on the resin insulating layer using an acid or an oxidizing agent. A mixture with a thermosetting resin can be used.

When a resin composition for forming a roughened surface is used as the resin composite, it is desirable that the soluble particles are substantially uniformly dispersed in the hardly-soluble resin. This is because a roughened surface having unevenness with a uniform roughness can be formed, and adhesion to a conductor circuit including via holes can be ensured. Alternatively, a film containing soluble particles only in the surface layer forming the roughened surface may be used. In this case, since the portions other than the surface layer of the film are not exposed to the acid or the oxidizing agent, the insulation between the conductor circuits via the resin insulating layer is reliably maintained.

The mixing weight ratio of the soluble particles is desirably 5 to 50% by weight based on the solid content of the hardly-soluble resin.
40% by weight is more desirable. If the mixing weight ratio of the soluble particles is less than 5% by weight, a roughened surface having a sufficient roughness may not be formed. If the mixing ratio exceeds 50% by weight, the soluble particles may be dissolved using an acid or an oxidizing agent. When forming a roughened surface, it may melt down to the depth of the resin insulation layer, making it impossible to ensure insulation between the upper and lower conductor circuits via the resin insulation layer, which may cause a short circuit. is there.

The resin composition for forming a roughened surface preferably contains a curing agent, other components, and the like, in addition to the thermoplastic resin and the thermosetting resin. Examples of the curing agent include imidazole-based curing agents, amine-based curing agents, guanidine-based curing agents, epoxy adducts of these curing agents and those obtained by microencapsulating these curing agents, triphenylphosphine, and tetraphenylphosphonate. Organic phosphine-based compounds such as ammonium tetraphenylborate.

The content of the curing agent is desirably 0.05 to 10% by weight based on the resin composition for forming a roughened surface. If the content is less than 0.05% by weight, when forming the resin insulating layer, the resin composite is not sufficiently cured, and a roughened surface is formed on the surface of the resin insulating layer by using an acid or an oxidizing agent, and the acid or the like is removed. The degree of penetration into the film increases, and the insulation of the resin insulating layer may be impaired. On the other hand, if it exceeds 10% by weight, an excessive curing agent component may modify the composition of the resin, which may cause a decrease in reliability.

Examples of the other components include fillers such as inorganic compounds and resins which do not affect the formation of the roughened surface. Examples of the inorganic compound include silica, alumina, and dolomite. Examples of the resin include a polyimide resin, a polyacryl resin, a polyamideimide resin, a polyphenylene resin, a melanin resin, and an olefin resin. By incorporating these fillers, the thermal expansion coefficient can be matched, heat resistance, chemical resistance can be improved, and the performance of the multilayer printed wiring board can be further improved.

Further, the resin composition for forming a roughened surface may contain a solvent. As the solvent, for example,
Examples include ketones such as acetone, methyl ethyl ketone and cyclohexanone, ethyl acetate, butyl acetate, aromatic hydrocarbons such as cellosolve acetate, toluene and xylene. These may be used alone or in combination of two or more.

By forming a resin insulating layer using the above-described resin composite, a roughened surface can be easily formed on the resin insulating layer, and the resin insulating layer on which the roughened surface is formed can be formed. When a plating layer is formed using an electrolytic plating solution having the above composition, excessively large stress does not occur in this plating layer, and since the stress is reduced, cracks and peeling occur in the resin insulating layer. Does not occur. Particularly, a favorable effect can be obtained in the peripheral portion of the field via.

(6) Next, a resin insulating layer having a via hole opening is formed by performing exposure and development processing or laser processing. In the case where the resin matrix of the resin composite is a thermosetting resin, a polyolefin-based resin, a cycloolefin-based resin, or the like, the opening for the via hole is formed using a laser beam, oxygen plasma, or the like, and is a photosensitive resin. In this case, it is performed by exposure and development processing or laser processing. The exposure and development treatment is performed before the uncured photosensitive resin layer is cured. The laser treatment can be performed before or after thermal curing or light curing. In the exposure and development process, a photomask (preferably a glass substrate) on which a circular pattern for forming an opening for a via hole is drawn is placed with the circular pattern side in close contact with the photosensitive resin insulating layer. After that, exposure is performed, and immersion in a developing solution or spraying of the developing solution is performed. By curing an uncured resin layer formed on a conductor circuit having a roughened surface with a sufficient unevenness, a resin insulating layer having excellent adhesion to the conductor circuit can be formed.

When a via hole opening is provided by using the above laser light, examples of the laser light used include a carbon dioxide (CO ₂ ) laser, an ultraviolet laser, an excimer laser, and a YAG laser. Of these, excimer lasers and short-pulse carbon dioxide lasers are preferred.

As will be described later, the excimer laser can form a large number of via hole openings at once by using a mask or the like in which penetrating light is formed in a portion where the via hole opening is formed. In addition, the short-pulse carbon dioxide gas laser has a small amount of resin remaining in the opening, and causes little damage to the resin around the opening.

It is desirable to use a hologram type excimer laser among the excimer lasers. The hologram method is a method of irradiating a target object with a laser beam through a hologram, a condensing lens, a laser mask, a transfer lens, and the like. By using this method, a large number of openings can be efficiently irradiated with a single irradiation. Can be formed.

When a carbon dioxide laser is used, the pulse interval is desirably 10 ^-4 to 10 ^-8 seconds. The time for irradiating a laser beam for forming the opening is preferably 10 to 500 μsec.

When an excimer laser is used, the through hole of the mask in which the through hole is formed in the portion where the opening for the via hole is formed needs to be a perfect circle in order to make the spot shape of the laser beam a perfect circle. The diameter of the through hole is 0.1
About 2 mm is desirable.

When the opening is formed by a laser beam, particularly when a carbon dioxide gas laser is used, desmearing is preferably performed. The desmear treatment can be performed using an oxidizing agent composed of an aqueous solution such as chromic acid and permanganate. Alternatively, the treatment may be performed using oxygen plasma, a mixed plasma of CF ₄ and oxygen, corona discharge, or the like. The surface can also be modified by irradiating ultraviolet rays using a low-pressure mercury lamp.

(7) Next, if necessary, the surface of the resin insulating layer provided with the via hole opening is roughened. For example, when a resin composition for forming a roughened surface is used as a material for the resin insulating layer, the roughening is performed by dissolving and removing soluble resin particles present on the surface of the resin insulating layer with an acid or an oxidizing agent.

The height of the roughened surface formed by acid treatment or the like is as follows:
Rmax = 0.01 to 20 μm is desirable. This is for ensuring adhesion to the conductor circuit. In particular, in the semi-additive method, 0.1 to 5 μm is desirable. This is because the metal layer can be removed while ensuring adhesion.

When performing the above acid treatment, phosphoric acid, hydrochloric acid,
Sulfuric acid or an organic acid such as formic acid or acetic acid can be used, and it is particularly preferable to use an organic acid. This is because, when the roughening process is performed, the metal conductor layer exposed from the via hole is hardly corroded. The oxidation treatment is performed using chromic acid,
It is desirable to use permanganate (such as potassium permanganate).

(8) Next, Cu, Ni, P, Pd, Co and W are formed on the surfaces of the resin insulating layer and the opening for the via hole.
Forming a thin metal layer of at least one kind selected from the group consisting of The thickness of this metal layer is 0.1-5 μm.
m is desirable, and 0.5 to 2 μm is more desirable. The metal layer is preferably formed by performing sputtering, plating, or sputtering and plating.

(9) Next, an electrolytic plating film is formed on the metal layer formed in (8) using the electrolytic plating solution having the above composition. This is performed by immersing the substrate on which the metal layer is formed in the electrolytic plating solution. Further, as the leveling agent contained in the electrolytic plating solution, polyethylene,
It is desirable to use at least one selected from the group consisting of derivatives thereof, gelatin and derivatives thereof, and as the brightener contained in the electrolytic plating solution, sulfur oxide, its related compounds, hydrogen sulfide, It is desirable to use at least one selected from the group consisting of related compounds and other sulfur compounds. As the electrolytic plating, electrolytic copper plating is desirable, and its thickness is desirably 3 to 25 μm in the conductor circuit portion other than the via hole. If the thickness is less than 3 μm, the upper surface of the via hole and the upper surface of the conductor circuit in the same layer may not be substantially flush with each other, or the conductor circuit may be disconnected at the time of etching. Layers and metal layers may not be completely removed. More preferably, it is 5 to 15 μm. It is desirable that the distance from the bottom surface to the top surface of the formed via hole is 2 to 7 times the thickness of the conductor circuit portion. The electrolytic plating method is not particularly limited, but as described above, it is desirable to use the direct current electrolytic plating method.

(10) After forming an etching resist on the electrolytic plating film, etching is performed to form a conductor circuit. As the etching resist, a commercially available photosensitive dry film or liquid resist can be used. Then, after applying a photosensitive dry film or applying a liquid resist, an ultraviolet exposure process is performed, and a developing process is performed with an alkaline aqueous solution.

(11) Then, after removing the metal layer and the electrolytic plating layer of the non-conductor circuit forming portion by etching, the etching resist is peeled off with a strong alkaline aqueous solution, so that the upper layer conductor circuit and the via hole are separated by an independent pattern. And The etching is performed by chemical etching using an aqueous solution of persulfate such as sulfuric acid / hydrogen peroxide aqueous solution, ferric chloride, cupric chloride, and ammonium persulfate as an etching solution, physical etching by ion beam etching, or the like. Is done. The palladium catalyst nuclei exposed on the non-conductor circuit portion are dissolved and removed with chromic acid, sulfuric acid, hydrogen peroxide or the like.

(12) If necessary, the steps (3) to (11) are repeated, and the uppermost conductive circuit is subjected to electroless plating, etching or the like under the same conditions as in the above step (3). A roughened layer or a roughened surface is formed on the conductor circuit.

Next, a solder resist layer is formed on the substrate surface including the uppermost conductive circuit. As the solder resist layer, for example, polyphenylene ether resin, polyolefin resin, fluororesin, thermoplastic elastomer,
Examples include those made of a solder resist resin composition and the like. The solder resist layer is formed by applying an uncured resin (resin composition) by a roll coater method or the like, and performing the above-described opening treatment, curing treatment, and the like.

Examples of the solder resist resin composition include (meth) acrylate of novolak type epoxy resin, imidazole curing agent, difunctional (meth) acrylate monomer, and (meth) acrylic acid having a molecular weight of about 500 to 5,000. Examples include ester polymers, thermosetting resins composed of bisphenol-type ester resins, etc., photosensitive monomers such as polyvalent acrylic monomers, paste-like fluids containing glycol ether solvents and the like, and the viscosity thereof is 25 ° C. Is preferably adjusted to 1 to 10 Pa · s.

(Meth) of the above novolak type epoxy resin
Examples of the acrylate include an epoxy resin obtained by reacting glycidyl ether of phenol novolak or cresol novolak with acrylic acid, methacrylic acid, or the like. The bifunctional (meth) acrylate monomer is not particularly limited, and examples thereof include various diols and esters of acrylic acid and methacrylic acid.

Thereafter, solder bumps are formed in the openings of the solder resist layer to complete the manufacture of the printed wiring board. In addition, a plasma treatment with oxygen, carbon tetrachloride, or the like may be performed as needed for a character printing process for forming a product recognition character or the like or for modifying a solder resist layer.

The multilayer printed wiring board having the above structure can be manufactured by another manufacturing method (semi-additive method). The method of manufacturing this other multilayer printed wiring board is as follows.
At least the following steps (a) to (e): (a) a step of forming a resin insulating layer having an opening for a via hole by performing exposure and development processing or laser processing; and (b) resin insulation. Forming a metal layer made of at least one selected from the group consisting of Cu, Ni, P, Pd, Co, and W on the surface of the layer and the opening for via hole; (c) plating on the metal layer A step of forming a resist, (d) a step of forming an electrolytic plating film on the plating resist non-formed portion using the electrolytic plating solution used in the method of manufacturing a multilayer printed wiring board, and (e) peeling of the plating resist. Forming a conductive circuit by etching the metal layer under the plating resist.

The other method of manufacturing the multilayer printed wiring board is the same as that of the above-described method of manufacturing a multilayer printed wiring board according to the present invention except that the steps (c), (d) and (e) are different. Steps other than the above (c), (d), and (e) can be performed using the same method as the above-described manufacturing method of the present invention. Therefore, here, (c), (d)
The steps (e) and (e) will be mainly described.

(1) First, (1) to (5) of the production method of the present invention described above.
In the same manner as in the step (8), a thin metal layer is formed on the insulating layer and the via hole opening. (2) Next, a plating resist is formed on the metal layer.
As the plating resist, a commercially available photosensitive dry film or liquid resist can be used.

The plating resist can be formed by attaching a photosensitive dry film or applying a liquid resist, and then performing an ultraviolet exposure treatment and developing with an aqueous alkali solution.

(3) Next, an electrolytic plating film is formed on the plating resist non-formed portion formed in (2) using the electrolytic plating solution used in the above-mentioned method for manufacturing a multilayer printed wiring board.
This is performed by immersing the substrate on which the metal layer and the plating resist are formed in the electrolytic plating solution. As the leveling agent contained in the electrolytic plating solution, it is desirable to use at least one selected from the group consisting of polyethylene, derivatives thereof, gelatin and derivatives thereof, and the leveling agent is contained in the electrolytic plating solution. As the brightener, it is preferable to use at least one selected from the group consisting of sulfur oxides, its related compounds, hydrogen sulfide, its related compounds, and other sulfur compounds. As the electrolytic plating, electrolytic copper plating is desirable, and the thickness thereof is 3 to 3 in the conductor circuit portion other than the via hole.
25 μm is desirable. If the thickness is less than 3 μm, the upper surface of the via hole and the upper surface of the conductor circuit in the same layer may not be substantially flush with each other. If a conductor circuit having a thickness exceeding 25 μm is to be formed, the thickness of the plating resist is increased. This may make it difficult for the electrolytic plating solution to enter into the plating resist non-formed portion. More preferably, 5 to 15
μm. It is desirable that the distance from the bottom surface to the top surface of the formed via hole is 2 to 7 times the thickness of the conductor circuit portion. The electrolytic plating method is not particularly limited, but as described above, it is desirable to use the direct current electrolytic plating method.

(4) Next, after the plating resist is stripped with a strong alkaline aqueous solution or the like, the underlying metal layer is etched to form the upper conductor circuit and the via hole as independent patterns. The etching is performed by chemical etching using an aqueous solution of persulfate such as sulfuric acid / hydrogen peroxide aqueous solution, ferric chloride, cupric chloride, and ammonium persulfate as an etching solution, physical etching by ion beam etching, or the like. Is done. The palladium catalyst nuclei exposed on the non-conductor circuit portion are dissolved and removed with chromic acid, sulfuric acid, hydrogen peroxide or the like.

(5) If necessary, similar to the manufacturing method of the present invention, the steps from the step of forming the roughened layer on the surface of the conductor circuit to the step of forming the conductor circuit (the step (4)) are repeated. Thereafter, a roughened layer or a roughened surface is formed on the uppermost conductive circuit. Next, a solder resist layer is formed in the same manner as in the manufacturing method of the present invention, and solder bumps are formed in the openings of the solder resist layer, thereby completing the manufacture of the printed wiring board.

FIG. 1 is a sectional view showing one section of a multilayer printed wiring board manufactured by the above method. According to such a method of manufacturing a multilayer printed wiring board, as shown in FIG. Opening is completely filled with metal,
The upper surface of the via hole 7 and the conductor circuits 4 and 5 in the same layer
Can be manufactured, and a printed wiring board having a stacked via structure can be manufactured. The stacked via structure is a structure in which an upper via hole 7 is provided immediately above the via hole 7.

Further, according to the above method,
Filled with metal, the upper surface of the via hole and the upper surface of the conductor circuit in the same layer are substantially in the same plane, and
A multilayer printed wiring board in which the distance from the bottom surface to the top surface of the via hole is 2 to 7 times the thickness of the conductor circuit can be manufactured.

In such a multilayer printed wiring board, the via hole opening is completely filled with metal, and the upper surface of the via hole and the upper surface of the conductor circuit in the same layer are substantially flush with each other. No peeling or cracking occurs between the conductor circuit including the conductive circuit and the resin insulating layer, and the conductor circuit in the upper layer of the conductor circuit does not break.
In addition, the multilayer printed wiring board may have a stacked via structure in which the wiring distance is shortened in order to achieve higher speed and finer printed wiring boards.

In the multilayer printed wiring board, the distance from the bottom surface to the top surface of the via hole is preferably 2 to 7 times the thickness of the conductor circuit. If the distance from the bottom surface to the top surface of the via hole exceeds 7 times the thickness of the conductor circuit, it is difficult to completely fill the opening for the via hole with metal. The upper surface may not be substantially flush with the upper surface, making it difficult to form a stacked via structure. On the other hand, the shallower the depth of the via hole is, the easier the field via structure is formed. However, if the distance from the bottom surface to the top surface of the via hole is less than twice the thickness of the conductor circuit, May be higher than the upper surface of the conductor circuit or if etching is performed, disconnection may occur in the conductor circuit.

The resin insulation layer of the multilayer printed wiring board is
It is desirable that the dielectric constant at 1 GHz be 3.0 or less. By using a resin insulating layer having a dielectric constant of 3.0 or less, it is possible to prevent delays and errors relating to electronic signals even when used in a high frequency band of 1 GHz or more. Examples of the resin used for the resin insulating layer include the same resins as those used in the method for manufacturing a multilayer printed wiring board according to the present invention.

[0101]

The present invention will be described in more detail with reference to the following examples. Example 1 A. Preparation of Resin Composite (Adhesive for Upper Layer) (i) A 25% acrylate of cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight: 2500) is dissolved in diethylene glycol dimethyl ether (DMDG) at a concentration of 80% by weight. 35 parts by weight of resin solution, photosensitive monomer (Aronix M315, manufactured by Toagosei Co., Ltd.) 3.1
5 parts by weight, antifoaming agent (S-65, manufactured by San Nopco) 0.5
Parts by weight and 3.6 parts by weight of N-methylpyrrolidone (NMP) were placed in a container and mixed by stirring to prepare a mixed composition.

(Ii) Polyether sulfone (PES) 1
2 parts by weight, 7.2 parts by weight of an epoxy resin particle (manufactured by Sanyo Kasei Co., polymer pole) having an average particle diameter of 1.0 μm and 3.09 parts by weight of an epoxy resin particle having an average particle diameter of 0.5 μm were placed in another container, After stirring and mixing, 30 parts by weight of NMP was further added and stirred and mixed with a bead mill to prepare another mixed composition.

(Iii) 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals) and a photopolymerization initiator (Irgacure, manufactured by Ciba Specialty Chemicals)
I-907) 2 parts by weight, photosensitizer (manufactured by Nippon Kayaku Co., Ltd., DE
TX-S) 0.2 part by weight and 1.5 parts by weight of NMP were further placed in another container, and mixed by stirring to prepare a mixed composition. Then, a resin composite was obtained by mixing the mixed compositions prepared in (i), (ii) and (iii).

B. Preparation of resin composite (adhesive for lower layer) (i) A 25% acrylate of cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight: 2500) is dissolved in diethylene glycol dimethyl ether (DMDG) at a concentration of 80% by weight. 35 parts by weight of a resin solution, 4 parts by weight of a photosensitive monomer (manufactured by Toagosei Co., Aronix M315), 0.5 parts by weight of an antifoaming agent (S-65 manufactured by San Nopco) and 3.6 parts of N-methylpyrrolidone (NMP). A part by weight was placed in a container and mixed by stirring to prepare a mixed composition.

(Ii) Polyether sulfone (PES) 1
2 parts by weight and epoxy resin particles (manufactured by Sanyo Chemical Industries,
14.4 having an average particle size of 0.5 μm
9 parts by weight were placed in another container and mixed with stirring.
30 parts by weight of MP was added and mixed by stirring with a bead mill to prepare another mixed composition.

(Iii) 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals), a photopolymerization initiator (Irgacure, manufactured by Ciba Specialty Chemicals)
I-907) 2 parts by weight, photosensitizer (manufactured by Nippon Kayaku Co., Ltd., DE
TX-S) 0.2 part by weight and 1.5 parts by weight of NMP were further placed in another container, and mixed by stirring to prepare a mixed composition. Then, a resin composite was obtained by mixing the mixed compositions prepared in (i), (ii) and (iii).

C. Preparation of resin filler (i) 100 parts by weight of bisphenol F type epoxy monomer (manufactured by Yuka Shell Co., molecular weight: 310, YL983U),
SiO ₂ spherical particles having an average particle diameter of 1.6 μm and a maximum particle diameter of 15 μm or less (manufactured by Admatechs, CRS 11)
01-CE) 170 parts by weight and 1.5 parts by weight of a leveling agent (Perenol S4 manufactured by San Nopco) are placed in a container and mixed by stirring to obtain a resin filler having a viscosity of 23 ± 1 ° C. and 40 to 50 Pa · s. Prepared. As a curing agent, an imidazole curing agent (2E, manufactured by Shikoku Chemicals Co., Ltd.)
4MZ-CN) 6.5 parts by weight.

D. Manufacturing method of printed wiring board (1) 1 mm thick glass epoxy resin or BT (bismaleimide triazine) resin
A copper-clad laminate on which an 8 μm copper foil 8 was laminated was used as a starting material (see FIG. 2A). First, the copper-clad laminate was drilled, subjected to electroless plating, and etched in a pattern to form a lower conductor circuit 4 and through holes 9 on both surfaces of the substrate 1.

(2) Through hole 9 and lower conductor circuit 4
After the substrate on which was formed was washed with water and dried, NaOH (1
0 g / l), NaClO ₂ (40 g / l), Na ₃ PO
₄ A blackening treatment using an aqueous solution containing (6 g / l) as a blackening bath (oxidizing bath), NaOH (10 g / l), NaBH
₄ A reduction treatment was performed using an aqueous solution containing (6 g / l) as a reducing bath, and roughened surfaces 4a and 9a were formed on the entire surface of the lower conductor circuit 4 including the through holes 9 (see FIG. 2 (b)). .

(3) After preparing the resin filler described in the above C, within 24 hours after the preparation by the following method, the inside of the through hole 9 and the conductor circuit non-molded portion on one side of the substrate 1 and the conductor circuit 4 A layer of the resin filler 10 was formed on the outer edge.
That is, first, the resin filler was pressed into the through holes using a squeegee, and then dried at 100 ° C. for 20 minutes. Next, a mask having an opening corresponding to the conductive circuit non-forming portion is placed on the substrate, and a layer of the resin filler 10 is formed in the concave conductive circuit non-forming portion using a squeegee, It was dried at 100 ° C. for 20 minutes (FIG. 2).
(C)).

(4) One side of the substrate after the treatment of the above (3) is subjected to belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku Co., Ltd.) to fill the resin formed on the outer edge of the conductor circuit. The upper portion of the layer of the material 10 and the layer of the resin filler 10 formed on the portion where the conductive circuit was not formed were polished, and then buffing was performed to remove the scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. If necessary, the lands 9a of the through holes 9 and the roughened surface 4a formed in the lower conductor circuit 4 may be planarized by etching before and after polishing. Thereafter, a heat treatment was performed at 100 ° C. for 1 hour and at 150 ° C. for 1 hour to completely cure the resin filler layer.

In this way, the surface portion of the resin filler 10 formed in the through hole 9 and the portion where the conductor circuit is not formed and the surface of the lower conductor circuit 4 are flattened, and the resin filler 10 and the side surfaces of the lower conductor circuit 4 are flattened. 4a is firmly adhered through the roughened surface, and the inner wall surface 9a of the through hole 9 and the resin filler 10
Was firmly adhered through the roughened surface to obtain an insulating substrate (see FIG. 2D). That is, by this step, the surface of the resin filler and the surface of the inner layer copper pattern are flush with each other.

(5) The substrate is rinsed with water, acid degreased, and then soft-etched. Then, an etching solution is sprayed on both surfaces of the substrate by spraying, and then sent by a transport roll to form a through hole with the surface of the lower conductive circuit 4. By etching the land surface and the inner wall of the hole 9, roughened surfaces 4 a and 9 a having a thickness of 3 μm were formed on the entire surface of the lower conductor circuit 4 (FIG. 3).
(A)). Imidazole copper as etchant
(II) An etching solution (Mec etch bond, manufactured by Mec) consisting of 10 parts by weight of a complex, 7 parts by weight of glycolic acid, and 5 parts by weight of potassium chloride was used.

(6) The resin composite for the lower layer (viscosity: 1.5 Pa · s) described in B above was applied to both surfaces of the substrate by using a roll coater within 24 hours after preparation, and was applied in a horizontal state. After leaving it for 60 minutes, drying (prebaking) was performed at 60 ° C. for 30 minutes. Then, after preparing the upper layer resin composite (viscosity: 7 Pa · s) described in A above,
The coating was performed using a roll coater within a period of time, and similarly left standing for 20 minutes in a horizontal state, followed by drying (prebaking) at 60 ° C. for 30 minutes to obtain a resin composite layer 2 having a thickness of 35 μm.
a and 2b were formed (see FIG. 3B).

(7) A photomask film on which a black circle having a diameter of 85 μm is printed is brought into close contact with both surfaces of the substrate on which the resin composite layer has been formed in the above (6), and 500 μm is applied by an ultra-high pressure mercury lamp.
After exposure at an intensity of mJ / cm ² , it was spray-developed with a DMDG solution. Thereafter, the substrate is further exposed to an ultrahigh pressure mercury lamp at 3000 mJ / cm ² intensity, and subjected to a heat treatment at 100 ° C. for 1 hour, 120 ° C. for 1 hour, and 150 ° C. for 3 hours, and corresponds to a photomask film. A resin insulating layer 2 having a thickness of 35 μm and a via hole opening 6 having a diameter of 85 μm and excellent in dimensional accuracy was formed (see FIG. 3C). The roughened surface of the lower conductor circuit 4 was exposed at the opening serving as the via hole.

(8) The substrate on which the via hole opening 6 was formed was immersed in a chromic acid aqueous solution (7500 g / l) for 19 minutes to dissolve and remove the epoxy resin particles present on the surface of the resin insulating layer. Was roughened to obtain a roughened surface. Then, it was immersed in a neutralizing solution (manufactured by Shipley) and washed with water (see FIG. 3D). Further, by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate subjected to the surface roughening treatment, catalyst nuclei were attached to the surface of the insulating material layer and the inner wall surface of the via hole opening.

(9) Next, the substrate was immersed in an electroless copper plating aqueous solution having the following composition, and the thickness of the substrate was reduced to 0.6 to 1.
An electroless copper plating film 12 of 2 μm was formed (FIG. 4A)
reference). [Electroless plating solution] _{CuSO 4 · 5H 2 O 10g /} l HCHO 8g / l NaOH 8g / l Rochelle salt 45 g / l additive 30 ml / l [Electroless plating condition] 25 minutes at a liquid temperature of 35 ° C.

(10) Next, electrolytic plating was performed on the entire surface of the electroless copper plating film under the following conditions to form an electrolytic plating film 13 having a thickness of 7.5 μm (see FIG. 4B). [Electrolytic plating solution] _{CuSO 4 · 5H 2 O 210g /} l sulfuric acid 150g / ^l Cl - 40mg / ^l polyethylene glycol 300 mg / l bis disulphide 100 mg / l [electrolytic plating conditions] current density 1.0A / dm ² hours 35 minutes Temperature 25 ° C

(11) A commercially available photosensitive dry film is adhered to the electrolytic copper plating film 13, a mask is placed thereon, and the
Exposure was performed at J / cm ² , and development was performed with a 0.8% aqueous sodium carbonate solution to provide an etching resist 3 having a thickness of 15 μm (see FIG. 4C).

(12) Further, portions other than the conductor circuits were etched by spray etching using a sulfuric acid-hydrogen peroxide aqueous solution. Subsequently, the resist film was peeled and removed in a 40 g / l NaOH aqueous solution at 50 ° C. Thereafter, the substrate was subjected to a heat treatment at 150 ° C. for 1 hour to form a 15 μm-thick conductor circuit including the metal layer and the electrolytic copper plating film and a field via (see FIG. 4D).

(13) With respect to the substrate on which the conductor circuit is formed,
By performing the same process as in (5), a roughened surface was formed on the surface of the conductor circuit including the field via (see FIG. 5A). (14) Subsequently, the above steps (6) to (13) were repeated to form an upper-layer conductive circuit, thereby obtaining an eight-layer multilayer printed wiring board. In the figures, six layers are shown for easy understanding of the structure (FIGS. 5B to 6).
(C)).

(15) Next, a cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) dissolved in diethylene glycol dimethyl ether (DMDG) so as to have a concentration of 60% by weight was used. 46.67 parts by weight of an oligomer for imparting properties (molecular weight: 4000), 15 parts by weight of a bisphenol A type epoxy resin (trade name: Epicoat 1001 manufactured by Yuka Shell Co., Ltd.) dissolved in methyl ethyl ketone, and 15 parts by weight of an imidazole curing agent ( (Shikoku Chemicals, trade name: 2E4MZ-CN)
6 parts by weight, 3 parts by weight of polyvalent acrylic monomer (trade name: R604, manufactured by Nippon Kayaku Co., Ltd.), which is a photosensitive monomer, and polyvalent acrylic monomer (trade name: DPE, manufactured by Kyoei Chemical Co., Ltd.)
6A) 1.5 parts by weight, dispersion antifoaming agent (manufactured by San Nopco Co., Ltd.)
1. Trade name: S-65) 0.71 part by weight is placed in a container, and a mixed composition is prepared by stirring and mixing. 0 parts by weight and 0.2 parts by weight of Michler's ketone (manufactured by Kanto Chemical Co., Ltd.) as a photosensitizer were added to adjust the viscosity
A solder resist resin composition adjusted to 2.0 Pa · s at 5 ° C. was obtained. The viscosity was measured using a B-type viscometer (DVL-B type, manufactured by Tokyo Keiki Co., Ltd.) for 60 min ^-1 (60 rpm).
In the case of the rotor No. In the case of 4, 6 min ^-1 (6 rpm), the rotor No. According to 3.

(16) Next, the above (1) is placed on both sides of the multilayer wiring board.
After preparing the solder resist resin composition described in 5), this was applied in a thickness of 20 μm, and dried at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes. 5m thickness on which pattern is drawn
m photomask in close contact with the solder resist layer
The resultant was exposed to ultraviolet light of 000 mJ / cm ² and developed with a DMTG solution to form an opening having a diameter of 200 μm. Then, at 80 ° C. for 1 hour, at 100 ° C. for 1 hour, 12
Heat treatment is performed at 0 ° C. for 1 hour and at 150 ° C. for 3 hours, respectively, to cure the solder resist layer.
A solder resist layer (organic resin insulating layer) 14 having a thickness of 20 μm was formed in which a 00 μm solder pad portion (including a via hole and its land portion) was opened.

(17) Next, a solder resist layer (organic resin
The substrate on which the insulating layer (14) is formed is coated with nickel chloride (2.3).
× 10^-1mol / l), sodium hypophosphite (2.8
× 10 ^-1mol / l), sodium citrate (1.6 ×
10^-1mol / l) and pH = 4.5
Immersion in a plating solution for 20 minutes, and a 5 μm thick
A nickel plating layer 15 was formed. In addition, the board
Potassium gold cyanide (7.6 × 10^-3mol / l), salt
Ammonium iodide (1.9 × 10^-1mol / l), quenched
Sodium acid (1.2 × 10^-1mol / l), phosphorus hypophosphite
Sodium acid (1.7 × 10^-1mol / l)
Immerse in a plating solution at 80 ° C for 7.5 minutes,
0.03 μm thick gold plating layer on the Kell plating layer 15
No. 16 was formed.

(18) Thereafter, a solder paste is printed on the openings of the solder resist layer 14 and reflowed at 200 ° C. to form the solder bumps 17, thereby manufacturing a multilayer wiring printed board having the solder bumps 17 ( FIG. 7A).

Example 2 A. Manufacturing method of printed wiring board (1) Glass epoxy resin or BT with a thickness of 0.8 mm
A copper-clad laminate in which 18 μm copper foils 8 were laminated on both sides of a substrate 1 made of (bismaleimide triazine) resin was used as a starting material (see FIG. 8A). First, the copper-clad laminate was drilled, subjected to electroless plating, and etched in a pattern to form a lower conductor circuit 4 and through holes 9 on both surfaces of the substrate 1.

(2) Through-hole 9 and lower conductor circuit 4
After the substrate on which is formed is washed with water and dried, the following etching solution is sprayed on both surfaces of the substrate by spraying to etch the lower layer conductor circuit 4 and the land surface and inner wall of the through hole 9, thereby including the through hole 9. Roughened surfaces 4a and 9a were formed on the entire surface of the lower conductor circuit 4.
(B)). As the etching solution, a mixture of 10 parts by weight of an imidazole copper (II) complex, 7 parts by weight of glycolic acid, 5 parts by weight of potassium chloride, and 78 parts by weight of ion-exchanged water was used.

(3) Next, a resin filler containing a polyolefin resin as a main component is applied to both surfaces of the substrate by using a printing machine to form a space between the lower conductor circuits 4 and through holes 9.
And heat-dried (see FIG. 8 (c)). That is, by this step, the resin filler 10 is filled between the lower conductor circuits 4 and in the through holes 9.

(4) One side of the substrate after the treatment of the above (3) is subjected to belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku Co., Ltd.) to fill the resin formed on the outer edge of the conductor circuit. The upper portion of the layer of the material 10 and the layer of the resin filler 10 formed on the portion where the conductive circuit was not formed were polished, and then buffing was performed to remove the scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. If necessary, the lands 9a of the through holes 9 and the roughened surface 4a formed in the lower conductor circuit 4 may be planarized by etching before and after polishing. Thereafter, a heat treatment was performed at 100 ° C. for 1 hour and at 150 ° C. for 1 hour to completely cure the resin filler layer.

In this way, the surface layer of the resin filler 10 and the surface of the lower conductor circuit 4 formed in the through hole 9 and the portion where the conductor circuit is not formed are flattened, and the resin filler 10 and the side surfaces of the lower conductor circuit 4 are flattened. 4a is firmly adhered through the roughened surface, and the inner wall surface 9a of the through hole 9 and the resin filler 10
And an insulating substrate tightly adhered through the roughened surface (see FIG. 8D).

(5) The substrate is washed with water, acid-degreased, soft-etched, and then sprayed with an etchant on both sides of the substrate by spraying, and then sent by a transport roll to form a through hole with the surface of the lower conductive circuit 4. By etching the land surface of the hole 9, roughened surfaces 4 a and 9 a having a thickness of 3 μm were formed on the entire surface of the lower conductor circuit 4. The same etchant as that used in the above step (2) was used.

(6) A thermosetting polyolefin resin sheet having a thickness of 50 μm is placed on both sides of the substrate at a temperature of 50 to 150 ° C.
0.5MPa (5kgf / cm
Vacuum lamination was performed in ² ) to provide a resin insulating layer made of a polyolefin resin. The degree of vacuum during vacuum compression
The pressure was set to 1330 Pa (10 mmHg) (see FIG. 9A).

(7) Using a carbon dioxide (CO ₂ ) gas laser, a beam diameter of 5 mm, a top hat mode, a pulse width of 50 μsec, a mask hole diameter of 0.5 mm, and three shots were formed on both sides of the substrate provided with the resin insulating layer. A via hole opening 6 having a diameter of 80 μm was provided under the following conditions. (See FIG. 9B). Thereafter, a desmear treatment was performed using oxygen plasma.

(8) The substrate on which the via hole opening 6 was formed was subjected to plasma treatment to roughen the surface of the resin insulating layer (see FIG. 9C). At this time, SV-4 manufactured by Nippon Vacuum Engineering Co., Ltd. was used under the conditions of argon gas as an inert gas, electric power of 200 W, gas pressure of 0.6 Pa, and temperature of 70 ° C.
Using 540, plasma treatment was performed for 2 minutes.

(9) Next, on a substrate whose surface layer of the resin insulating layer was roughened, sputtering was performed using SV-4540 manufactured by Japan Vacuum Engineering Co., Ltd. with a target of an alloy of Ni and Cu at a pressure of 0. 6Pa, temperature 80 ° C, power 200W,
This was performed under the condition of a time of 5 minutes to form the Ni—Cu alloy layer 12 on the surface of the resin insulating layer 2 (see FIG. 9D). At this time, the thickness of the formed Ni—Cu alloy layer was 0.2 μm. Further, the substrate was conditioned, and the catalyst was applied in an alkaline catalyst for 5 minutes.

(10) Next, electrolytic plating was performed on the entire surface of the Ni—Cu alloy layer 12 under the following conditions to form an electrolytic plating film 13 having a thickness of 5 μm (see FIG. 10A). [Electrolytic plating solution] _{CuSO 4 · 5H 2 O 140g /} l sulfuric acid 120g / ^l Cl - 50mg / ^l gelatin 300 mg / l acid amide 100 mg / l [electrolytic plating conditions] current density 0.8 A / dm ² hours 30 minutes Temperature 25 ° C

(11) A commercially available photosensitive dry film was stuck on the electrolytic copper plating film 13, a mask was placed thereon, and a 100 m
Exposure was performed at J / cm ² , and development processing was performed with a 0.8% aqueous sodium carbonate solution to provide an etching resist 3 having a thickness of 20 μm (see FIG. 10B).

(12) Further, portions other than the conductor circuits were etched by spray etching using a sulfuric acid-hydrogen peroxide aqueous solution. Subsequently, the resist film was peeled and removed in a 40 g / l NaOH aqueous solution at 50 ° C. Thereafter, the substrate was heat-treated at 150 ° C. for 1 hour to form a 15 μm-thick conductor circuit 5 composed of a metal layer and an electrolytic copper plating film and a field via 7. The height difference between the upper surface of the formed conductor circuit and the upper surface of the field via from the resin substrate 1 is 1
μm or less, they were on substantially the same plane, and no recess was formed on the upper surface of the via hole (see FIG. 10C).

(13) Subsequently, the above steps (7) to (13) are repeated to form a further upper layer conductive circuit, and
A multilayer printed wiring board having three layers was obtained. It should be noted that FIG. 11 shows a structure with six layers so that the structure can be easily understood.
(A) to FIG. 13 (a)). The surface conductor circuit was also etched using the same etchant used in the above step (2) to form a roughened surface.

(14) Next, a cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) dissolved in diethylene glycol dimethyl ether (DMDG) to a concentration of 60% by weight was used. 46.67 parts by weight of an oligomer for imparting properties (molecular weight: 4000), 15 parts by weight of a bisphenol A type epoxy resin (trade name: Epicoat 1001 manufactured by Yuka Shell Co., Ltd.) dissolved in methyl ethyl ketone, and 15 parts by weight of an imidazole curing agent ( (Shikoku Chemicals, trade name: 2E4MZ-CN)
6 parts by weight, 3 parts by weight of polyvalent acrylic monomer (trade name: R604, manufactured by Nippon Kayaku Co., Ltd.), which is a photosensitive monomer, and polyvalent acrylic monomer (trade name: DPE, manufactured by Kyoei Chemical Co., Ltd.)
6A) 1.5 parts by weight, dispersion antifoaming agent (manufactured by San Nopco Co., Ltd.)
1. Trade name: S-65) 0.71 part by weight is placed in a container, and a mixed composition is prepared by stirring and mixing. 0 parts by weight and 0.2 parts by weight of Michler's ketone (manufactured by Kanto Chemical Co., Ltd.) as a photosensitizer were added to adjust the viscosity
A solder resist resin composition adjusted to 2.0 Pa · s at 5 ° C. was obtained. The viscosity was measured using a B-type viscometer (DVL-B type, manufactured by Tokyo Keiki Co., Ltd.) for 60 min ^-1 (60 rpm).
In the case of the rotor No. In the case of 4, 6 min ^-1 (6 rpm), the rotor No. According to 3.

(15) Next, the above (1) is placed on both sides of the multilayer wiring board.
After preparing the solder resist resin composition described in 5), this was applied in a thickness of 20 μm, and dried at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes. 5m thickness on which pattern is drawn
m photomask in close contact with the solder resist layer
The resultant was exposed to ultraviolet light of 000 mJ / cm ² and developed with a DMTG solution to form an opening having a diameter of 200 μm.

Further, at 80 ° C. for 1 hour, 100
The solder resist layer is cured by performing a heat treatment under the conditions of 1 hour at 120 ° C., 1 hour at 120 ° C., and 3 hours at 150 ° C., and a solder pad portion having an opening diameter of 200 μm (including a via hole and its land portion). , A solder resist layer (organic resin insulation layer) 1 having a thickness of 20 μm
4 was formed.

(16) Next, a solder resist layer (organic resin
The substrate on which the insulating layer (14) is formed is coated with nickel chloride (2.3).
× 10^-1mol / l), sodium hypophosphite (2.8
× 10 ^-1mol / l), sodium citrate (1.6 ×
10^-1mol / l) and pH = 4.5
Immersion in a plating solution for 20 minutes, and a 5 μm thick
A nickel plating layer 15 was formed. In addition, the board
Potassium gold cyanide (7.6 × 10^-3mol / l), salt
Ammonium iodide (1.9 × 10^-1mol / l), quenched
Sodium acid (1.2 × 10^-1mol / l), phosphorus hypophosphite
Sodium acid (1.7 × 10^-1mol / l)
Immerse in a plating solution at 80 ° C for 7.5 minutes,
0.03 μm thick gold plating layer on the Kell plating layer 15
No. 16 was formed.

(17) Thereafter, a solder paste is printed on the openings of the solder resist layer 14 and reflowed at 200 ° C. to form the solder bumps 17, thereby manufacturing a multilayer wiring printed board having the solder bumps 17 ( FIG. 13 (b)
reference).

Example 3 A. Preparation of film composed of resin composite Bisphenol A type epoxy resin (epoxy equivalent 46
9. Yuka Shell Epoxy Epicoat 1001) 3
0 parts by weight, 40 parts by weight of a cresol novolac type epoxy resin (epoxy equivalent: 215, Epicron N-673 manufactured by Dainippon Ink and Chemicals, Inc.), a triazine structure-containing phenol novolak resin (phenolic hydroxyl group equivalent: 120,
FENOLITE KA-705 manufactured by Dainippon Ink and Chemicals, Inc.
2) 30 parts by weight were dissolved by heating in 20 parts by weight of ethyl diglycol acetate and 20 parts by weight of solvent naphtha while stirring, and epoxidized polybutadiene rubber (Denalex R-45EPT manufactured by Nagase Kasei Kogyo Co., Ltd.) was added thereto.
15 parts by weight, 1.5 parts by weight of a pulverized product of 2-phenyl-4,5-bis (hydroxymethyl) imidazole, 2 parts by weight of finely divided silica, and 0.5 part by weight of a silicon-based antifoaming agent were added to the resin composite. A solution was obtained. The solution of the obtained resin composite was dried on a PET film having a thickness of 38 μm to a thickness of 50 μm.
m using a roll coater, and then 8
By drying at 0 to 120 ° C. for 10 minutes, a resin composite film was produced.

B. Method for Manufacturing Printed Wiring Board (1) In the same manner as in the steps (1) to (4) of Example 2, a substrate having a layer of the resin filler 10 formed in the through holes 9 and the portions where the conductor circuit is not formed is prepared. Then, by etching the surface of the lower conductor circuit 4, the land surface of the through hole 9, and the inner wall in the same manner as in the step (5) of the second embodiment,
A roughened surface 4a having a thickness of 3 μm on the entire surface of the lower conductor circuit 4;
9a was formed (see FIGS. 8A to 9A).

(2) The resin composite film described in A above was attached to both sides of the substrate by using a vacuum laminator according to the following method to form a resin composite film layer, and then thermosetting. Thus, a resin insulating layer 2 was formed (see FIG. 9A). That is, the resin composite film was attached at a degree of vacuum of 75 Pa and a pressure of 0.4 MP.
a, the temperature was 80 ° C., and the pressing time was 60 seconds. The thermosetting was performed at 100 ° C. for 30 minutes and at 150 ° C. for 1 hour.

(3) Next, using a CO ₂ gas laser having a wavelength of 10.4 μm, a beam diameter of 4.0 mm, a top hat mode, and a pulse width were formed on the resin insulating layer 2 through a mask in which a through hole was formed. 8.0 μsec, diameter of mask through hole 1.0 m
m, a diameter of 60 μm was applied to the resin insulation layer 2 under the condition of 2 shots.
The via hole opening 6 was formed (see FIG. 9B). Thereafter, a desmear treatment was performed using oxygen plasma. The roughened surface of the lower conductor circuit 4 was exposed in the via hole opening 6.

(4) The substrate having the via hole opening 6 formed thereon was immersed in a chromic acid aqueous solution (7500 g / l) for 19 minutes to dissolve and remove the epoxy resin particles present on the surface of the resin insulating layer. Was roughened to obtain a roughened surface. Then, it was immersed in a neutralization solution (manufactured by Shipley) and washed with water (see FIG. 9C). Further, by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate subjected to the surface roughening treatment, catalyst nuclei were attached to the surface of the insulating material layer and the inner wall surface of the via hole opening 6.

(5) Thereafter, as in Example 2, (9) to (17)
(See FIGS. 9D to 13B) to manufacture a multilayer printed wiring board having solder bumps on the surface layer.

Example 4 Example 3 was repeated except that a resin composite film formed of a resin composite of an epoxy resin (thermosetting resin) and a phenoxy resin (thermoplastic resin) was used. A multilayer printed wiring board was manufactured in substantially the same manner as described above.

(Example 5) As an additive of an electrolytic plating solution, gelatin 400 mg / l, bisdisulfide 150
A multilayer printed wiring board was manufactured in substantially the same manner as in Example 1 except that ml / l was used.

(Example 6) Gelatin 400 mg / l, bis-disulfide 150
A multilayer printed wiring board was manufactured in substantially the same manner as in Example 2 except that ml / l was used.

(Example 7) As additives for the electrolytic plating solution, gelatin 400 mg / l, bisdisulfide 150
A multilayer printed wiring board was manufactured in substantially the same manner as in Example 3 except that ml / l was used.

Example 8 A multilayer printed wiring board was manufactured in substantially the same manner as in Example 1, except that 400 mg / l of polyethylene glycol and 150 ml / l of sulfonamide were used as additives for the electrolytic plating solution.

Example 9 A multilayer printed wiring board was manufactured in substantially the same manner as in Example 2, except that 400 mg / l of polyethylene glycol and 150 ml / l of sulfonamide were used as additives for the electrolytic plating solution.

Example 10 A multilayer printed wiring board was manufactured in substantially the same manner as in Example 3, except that 400 mg / l of polyethylene glycol and 150 ml / l of sulfonamide were used as additives for the electrolytic plating solution.

(Example 11) As additives for the electroplating solution, gelatin 400 mg / l, bisdisulfide 150
A multilayer printed wiring board was manufactured in substantially the same manner as in Example 4 except that ml / l was used.

Example 12 A multilayer printed wiring board was manufactured in substantially the same manner as in Example 4, except that 400 mg / l of polyethylene glycol and 150 ml / l of sulfonic amide were used as additives for the electrolytic plating solution.

(Comparative Example 1) Preparation of the resin composite (upper layer adhesive), preparation of the resin composite (lower layer adhesive), and preparation of the resin filler were performed in the same manner as in Example 1.

B. Manufacturing method of printed wiring board (1) 0.6 mm thick glass epoxy resin or BT
Except that a substrate made of (bismaleimide triazine) resin was used, a thickness of 35% was obtained in the same manner as (1) to (6) of Example 1.
A layer of a resin composite having a thickness of μm was formed (FIGS.
(B)).

(2) Next, the same as (7) of Example 1 except that a photomask film on which a black circle having a diameter of 90 μm was printed was adhered to both surfaces of the substrate on which the resin composite layer was formed. Thus, a 35-μm-thick resin insulating layer having a 90 μm-diameter via hole opening was formed (see FIG. 3C). The roughened surface of the lower conductor circuit was exposed in the opening serving as the via hole.

(3) Further, after conditioning the substrate on which the opening for the via hole was formed and applying the catalyst in an alkali catalyst for 5 minutes, the substrate was activated to obtain an aqueous electroless copper plating solution having the following composition. The substrate was immersed therein to form an electroless copper plating film having a thickness of 1.1 μm on the entire rough surface. [Aqueous solution of electroless plating] CuSO ₄ .5H ₂ O 10 g / l HCHO 8 g / l NaOH 8 g / l Rochelle salt 45 g / l Additive 30 ml / l [Electroless plating condition] 25 minutes at a liquid temperature of 34 ° C.

(4) Next, electrolytic plating was performed on the entire surface of the electroless copper plating film under the following conditions to form an electrolytic plating film 13 having a thickness of 11 μm. [Electrolytic plating solution] _{CuSO 4 · 5H 2 O 80g /} l sulfuric acid 180g / ^l Cl - 40mg / ^l additive 0.5 ml / l [electrolytic plating conditions] current density 1.0A / dm ² hours and 50 minutes temperature 27 ° C.

(5) A commercially available photosensitive dry film was stuck on the electrolytic copper plating film, a mask was placed, and 100 mJ /
exposed with cm ^2, by developing with 0.8% aqueous sodium carbonate, thickness 20μm, L / S = 20/ 1
A plating resist of 0 μm was provided.

(6) Further, portions other than the conductor circuit were etched by spray etching using a sulfuric acid-hydrogen peroxide aqueous solution. Subsequently, the resist film was peeled off and removed in a 40 g / l NaOH aqueous solution at 50 ° C. afterwards,
The substrate was heat-treated at 150 ° C. for 1 hour to form a conductor circuit including the metal layer and the electrolytic copper plating film and a field via.

(7) With respect to the substrate on which the conductor circuit is formed,
By performing the same treatment as in (5), a roughened surface having a thickness of 2 μm was formed on the surface of the conductor circuit including the field via. (8) Subsequently, the step of forming the resin composite layer of the above (1) [the steps (1) to (7) of Example 1) is repeated to form a further upper layer conductive circuit, An eight-layer multilayer printed wiring board was obtained.

(9) Next, a solder resist resin composition was obtained in the same manner as in (15) of Example 1. Further, in Example 1,
In the same manner as in (16) to (18), a multilayer wiring printed board having solder bumps was manufactured.

The multilayer printed wiring board having the solder bumps obtained in the examples and comparative examples was cut with a cutter, and the cross section thereof was observed under a microscope. The height difference between the upper surface of the field via and the resin substrate was substantially the same as 1 μm or less, and no recess was formed on the upper surface of the via hole. On the other hand, in the multilayer printed wiring board according to the comparative example, the opening for the via hole was not completely filled with metal, and a recess was formed on the upper surface of the via hole.

Further, the multilayer wiring printed circuit board according to the example had a stacked via structure, and as a result of a conduction test and the like, conduction was also obtained in the stacked via structure.
On the other hand, in the multilayer printed wiring board according to the comparative example, as a result of the conduction test and the like, conduction was not obtained in the portion of the stacked via structure.

[0171]

As described above, according to the method of manufacturing a multilayer printed wiring board of the present invention, the metal is completely filled in the via hole opening, and the upper surface of the via hole and the conductor circuit in the same layer are formed. A multilayer printed wiring board having an upper surface substantially on the same plane can be manufactured, and a multilayer printed wiring board having a stacked via structure can be manufactured.

Since the multilayer printed wiring board thus obtained has the above-described structure, peeling or cracking may occur between the conductive circuit including the via hole and the resin insulating layer, or the upper layer of the conductive circuit may be removed. The connection reliability can be improved without disconnection of the conductor circuit. In addition, the multilayer printed wiring board may have a stacked via structure in which the wiring distance is shortened in order to achieve higher speed and finer printed wiring boards.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a cross section of a multilayer printed wiring board manufactured by a method for manufacturing a multilayer printed wiring board according to the present invention.

FIGS. 2A to 2D are cross-sectional views showing a part of the manufacturing process of the method for manufacturing a multilayer printed wiring board according to the present invention.

FIGS. 3A to 3D are cross-sectional views illustrating a part of the manufacturing process of the method for manufacturing a multilayer printed wiring board according to the present invention.

FIGS. 4A to 4D are cross-sectional views illustrating a part of the manufacturing process of the method for manufacturing a multilayer printed wiring board according to the present invention.

5 (a) to 5 (c) are cross-sectional views showing a part of the manufacturing process of the method for manufacturing a multilayer printed wiring board according to the present invention.

FIGS. 6A to 6C are cross-sectional views showing a part of the manufacturing process of the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 7A is a cross-sectional view showing a part of the manufacturing process of the method for manufacturing a multilayer printed wiring board according to the present invention.

FIGS. 8A to 8D are cross-sectional views illustrating another example of the method for manufacturing a multilayer printed wiring board according to the present invention.

FIGS. 9A to 9D are cross-sectional views illustrating another example of the method for manufacturing a multilayer printed wiring board according to the present invention.

FIGS. 10A to 10C are cross-sectional views illustrating another example of the method for manufacturing a multilayer printed wiring board according to the present invention.

11A to 11C are cross-sectional views illustrating another example of the method for manufacturing a multilayer printed wiring board according to the present invention.

FIGS. 12A to 12C are cross-sectional views illustrating another example of the method for manufacturing a multilayer printed wiring board according to the present invention.

FIGS. 13A and 13B are cross-sectional views illustrating another example of the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 14 is a micrograph showing a cross section of a via hole of a multilayer printed wiring board manufactured by the method for manufacturing a multilayer printed wiring board of the present invention.

FIG. 15 is a micrograph showing a cross section of a via hole of a multilayer printed wiring board manufactured by a conventional method for manufacturing a multilayer printed wiring board.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2a, 2b Resin composite 2 Resin insulating layer 4 Lower conductor circuit 4a Roughened surface 5 Upper layer conductor circuit 6 Via hole opening 7 Via hole 8 Copper foil 9 Through hole 9a Roughened surface 10 Resin filler 11 Roughening Layer 12 Ni-Cu alloy layer 13 Electroplating layer 14 Solder resist layer 15 Nickel plating film 16 Gold plating film 17 Solder bump

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) C25D 3/38 101 C25D 3/38 101 7/00 7/00 J H05K 3/18 H05K 3/18 G F Terms (Reference) 4K023 AA19 BA06 CA01 CA03 CA08 CB14 CB15 CB17 CB32 CB40 4K024 AA09 AB01 AB15 AB17 BA09 BA14 BB11 FA07 FA08 GA01 GA02 4K044 AA16 AB02 BA06 BA08 BB02 BB03 BC05 BC09 CA13 CA15 CA18 5A343 AA7 DD33 DD76 EE02 EE33 ER16 ER18 GG08 5E346 CC04 CC08 CC09 CC14 CC32 CC55 DD03 DD12 DD25 FF03 FF05 FF07 FF15 FF22 GG22 HH07 HH25

Claims (6)

[Claims] 1. At least the following steps (a) to (d):
That is, (a) a step of forming a resin insulating layer having a via hole opening by performing exposure and development processing or laser processing; and (b) Cu, Cu on the surface of the resin insulating layer and the via hole opening. Forming at least one metal layer selected from the group consisting of Ni, P, Pd, Co and W; (c) 50-300 g / l copper sulfate, 30-200 g / l sulfuric acid, 25-25 g / l 90mg /
forming an electrolytic plating film on the metal layer using an electrolytic plating solution containing 1 to 1000 mg / l of an additive consisting of 1 chlorine ion and at least a leveling agent and a brightener, (d) Forming an etching resist on the electrolytic plating film and then performing etching to form a conductive circuit. 2. In the step (b), the metal layer comprises:
The method for producing a multilayer printed wiring board according to claim 1, wherein the method is formed by performing sputtering, plating, or sputtering and plating. 3. The method according to claim 1, wherein the resin insulating layer is made of at least one selected from the group consisting of a fluororesin, a polyolefin resin, and a polyphenylene resin. 4. The resin insulating layer is made of a resin composite containing a thermoplastic resin and a thermosetting resin.
3. The method for producing a multilayer printed wiring board according to item 1. 5. In the step (c), at least one selected from the group consisting of polyethylene, derivatives thereof, gelatin and derivatives thereof is used as a leveling agent contained in the electrolytic plating solution. The method for producing a multilayer printed wiring board according to any one of the above. 6. The brightener contained in the electrolytic plating solution in the step (c) is selected from the group consisting of sulfur oxides, related compounds, hydrogen sulfide, related compounds, and other sulfur compounds. The method for producing a multilayer printed wiring board according to claim 1, wherein at least one kind is used.